LTC5583
1
DESCRIPTION
Demonstration circuit
1599A
is a Mean-Squared Power
Detector featuring the LTC
®
5583 IC. LTC5583 is a
dual-channel RMS power detector, capable of
measuring two AC signals. It provides 40dB of
channel to channel isolation with no frequency
separation at 2140MHz that is suited for measuring
VSWR.
The LTC5583 is a wide dynamic range Mean Squared
RF Power Detector, operational from 40MHz to 6GHz.
The input dynamic range with ±1dB nonlinearity is
60dB depending on frequency(from –58dBm to
+2dBm, single-ended 50 input). The detector output
voltage slope is normally 30mV/dB, and the typical
output variation over temperature is ±0.5dB at
880MHz.
The DC1599A Demo Circuit is ideal for frequency
operation below 3.0GHz. It has the single ended input
drive to LTC5583. The input A to output B (or input B
to output A) isolation is 33dB at 2.7GHz, and degrades
as input frequency increases. As a result, operating
above 3GHz may require differential input matching for
improved isolation. Temperature performance is
optimized for 2140MHz. Contact LTC applications for
more information.
LTC is a trademark of Linear Technology Corporation
Design files for this circuit board are available. Call the
LTC factory.
Typical Performance Summary (VCC = 3.3V, EN = HIGH, TA = 25°C, unless otherwise noted. Test circuit shown in Figure 1.)
PARAMETER CONDITION VALUE
Supply Voltage 3.1V to 3.5V
Supply Current Envelope detector off 80.5mA
Envelope detector on 90.1mA
Shutdown Current EN = Lo 0.1μA
EN Voltage Low, Chip Disabled
HIGH, Chip Enabled
0.3V max
2V min
EN Input Current V
EN
= 0V
V
EN
= 3.3V
0μA
100μA
Output Start Voltage No Input Signal Present 0.45V
Rise Time 0.5V to 2.2V, 10% to 90%, C
FLTR
A
=C
FLTRB
= 8.2nF, FRF = 100 MHz 140nS
Fall Time 2.2V to 0.5V, 90% to 10%, C
FLTR
A
=C
FLTRB
=8.2nF, FRF = 100 MHz 3.5uS
Input Frequency Range Operation over wider frequency range with reduced performance 40MHz to 6GHz
f =450MHz
Linear Dynamic Range ±1 dB linearity error 63 dB
RF Input Power Range CW, 50Ω, ±1dB Linearity Error -59 to 4 dBm
Slope 29.6mV/dB
Logarithmic Intercept -78.5dBm
DEMO CIRCUI
T
1599
A
QUICK START GUIDE
LTC558
3
DUAL 6GHz RMS POWER DETECTO
R
LTC5583
2
Deviation from CW Response 12 dB peak-to-average ratio (4 carrier WCDMA) 0.4
INA to VOB isolation P
INB
= -45dBm, VOB= VOB p
INB
±1 dB, Frequency Separation=0Hz 50dB
INB to VOA isolation P
INA
= -45dBm, VOA= VOA p
INA
±1 dB, Frequency Separation=0Hz 50dB
f =2140MHz
Linear Dynamic Range ±1 dB linearity error 60 dB
RF Input Power Range CW, 50Ω, ±1dB Linearity Error -58 to 2 dBm
Slope 29.6mV/dB
Logarithmic Intercept -77.4dBm
Deviation from CW Response 12 dB peak-to-average ratio (4 carrier WCDMA) 0.3
INA to VOB isolation P
INB
= -45dBm, VOB= VOB p
INB
±1 dB, Frequency Separation=0Hz 40dB
INB to VOA isolation P
INA
= -45dBm, VOA= VOA p
INA
±1 dB, Frequency Separation=0Hz 40dB
f =2700MHz
Linear Dynamic Range ±1 dB linearity error 59 dB
RF Input Power Range CW, 50Ω, ±1dB Linearity Error -56 to 3 dBm
Slope 30mV/dB
Logarithmic Intercept -74.9dBm
Deviation from CW Response 12 dB peak-to-average ratio (WiMAX OFDM) 0.6dB
INA to VOB isolation P
INB
= -45dBm, VOB= VOB p
INB
±1 dB, Frequency Separation=0Hz 33dB
INB to VOA isolation P
INA
= -45dBm, VOA= VOA p
INA
±1 dB, Frequency Separation=0Hz 33dB
Table 1.
Jumper Description
JUMPER FUNCTION RANGE/SETTING (DEFAULT)
JP1 Chip Enable. EN for High, DIS for Lo EN
JP2 VCCN. Power supply to the envelop detector for both channels. HI=on, LO=off LO
JP3 INV. Swap control for the polarity of VODF. HI=(VOB-VOA)+VOS, LO=(VOA-VOB)+VOS LO
QUICK START PROCEDURE
Demonstration circuit
1599
A is easy to set up to
evaluate the performance of the LTC5583. Refer to
Figure 1
for measurement equipment setup and follow
the procedure below:
1.
Connect voltmeter’s negative (-) lead to demo
board GND test point(TP8 or TP9).
2.
Connect voltmeter’s positive (+) lead to the demo
board VOA(TP2) and VOB(TP5) to measure
channel A and channel B output respectively.
3.
Connect DC power supply’s negative (-) output to
demo board GND(TP8 or TP9).
4.
Connect DC power supply’s positive (+) output
(3.1V to 3.5V) to demo board V
CC
test point(TP7).
Do not exceed 3.8V, the absolute maximum
supply voltage.
Set VCCN jumper to LO, to turn off the envelope
detector if not needed.
Set the Swap jumper to LO for:
VODF= (VOA-VOB)+VOS.
Set swap to HI for:
VODF=(VOB-VOA)+VOS
5.
Connect signal generator’s output to demo board
INPUT port (SMA connector J1 for channel A
input, or J2 for channel B input) via coaxial cable.
LTC5583
3
6.
A 3dB attenuator may be inserted for broadband
input match, the detected power range is shifted
higher by 3dB.
7.
Set the JP1 to EN to enable the IC. Now the detec-
tor is enabled (on) and is ready for measurement.
8.
Apply RF input signal and measure OUTPUT DC
voltages at VOA and VOB.
Do not exceed +18dBm, the absolute maximum RF input
power.
NOTES:
1. The voltage on the EN test point must never exceed V
CC
+ 0.3V.
2. For digitally modulated signals, an oscilloscope can be used to observe the AC components of the output.
3. Suggest to set VCCN LO when envelope detector is not used. This will result in lower power consumption.
4. Temperature compensation values for RT1 and RT2 may be different at different frequencies. See table 1 for
additional information.
Figure 1. Proper Test Equipment Setup
LTC5583
4
Table 2. Suggested RT1 and RT2 values for the
optimum temperature performance at various RF
input frequencies.
Frequency
(MHz)
RP1
(kΩ)
RP2
(kΩ)
RT1
(kΩ)
RT2
(kΩ)
450Open011.51.13
880Open011.51.13
900Open0110.953
1800Open012.11.5
2140Open09.761.1
2300Open010.51.43
2500Open010.51.43
2700Open08.871.21
LTC5583
5
R1 0
TP6 ENVB
1
C8
1nF
C23
100nF
C28
10nF
C15
1nF
TP8
GND 1
C27
1uF
C19
1nF
C14
1nF
C13
1nF
C24
0.3pF
C16
1nF
R9 0
C10
1nF
JP1
EN
DIS
1
3
2
VCC
C31 100pF
J1
INA
C30 100pF
VCC
C29
0.3pF
U1
LTC5583IUF
DECA
1
VCCA
2
VCCR
3
EN
4
VCCB
5
DECB
6
INPB
7
INNB
8
RP2
9
FLTRB
10
ENVB
11
INV
12
VOB 13
RT2 14
VOS 15
VODF 16
RT1 17
VOA 18
VCCN 19
ENVA 20
FLTRA 21
RP1 22
INNA 23
INPA 24
C17
1nF
TP1 ENVA
1
TP7
VCC 1
C2
100nF
C11
1nF
C12
1nF
C5 OPT
C6 1nF
R12 OPT
1. ALL CAP ACITORS AND RESISTORS ARE 0402.
NOTE: UNLESS OTHERWISE SP ECIFIED,
0603
R10
75
L1 0
R4 OPT
C22 1nF
R8
OPT
R3 1
C9 20pF
C3 20pF
VCC
VCC
C21 1nF
C25 1nF
C26 20pF
C18 20pF
L2 0
TP9
GND
R13 OPT C32 OPT
JP2 VCCN
HI
LO
1
3
2
VCC
VCC
R7 OPT
R2
75
J2
INB
C7
1nF
VCC
C20
1nF
JP3 INV
LO
HI
1
3
2
VCC
TP3
VODF
1
TP2
VOA
1
C1 1nF
R6 1.10k
1%
3. 1V - 3. 5V
R5 9.76k
1%
TP5
VOB
1
R11
0
TP4
VOS
1
C4 1nF
LTC5583
6
Bill of Materials:
