October 1987
Revised January 1999
MM88C29 • MM88C30 Quad Single-Ended Line Driver • Dual Differential Line Driver
© 1999 Fairchild Semicond uctor Corpor ation DS005908.prf www.fairchildsemi.com
MM88C29 • MM88C30
Quad Single-Ended Line Driver •
Dual Differential Line Driver
General Descript ion
The MM88C30 is a dual differential line driver that also per-
forms the dual four-input NAND or dual four-input AND
function . T he abs ence of a clamp d i ode to VCC in the input
protection circuitry of the MM88C30 allows a CMOS user to
interface systems operating at different voltage levels.
Thus, a CMOS dig ital signal source can operate at a VCC
voltage greater than the V CC voltage of the MM88C30 line
driver. The differential output of the MM88C30 eliminates
ground-loop errors.
The MM88C29 is a non-inverting single-wire transmission
line driver. Since the output ON resistance is a low 20Ω
typ., the device can be used to drive lamps, relays, sole-
noids, and clock lines, besides driving data lines.
Features
■Wide supply voltage range: 3V to 15V
■High noise immunity: 0.45 VCC (typ.)
■Low output ON resistance: 20Ω (typ.)
Ordering Code:
Devices also available in Tape and Reel. Spec if y by appending suffix let t er “X” to the or dering code.
Connection Diagrams
Pin Assignments for DIP
MM88C29
Top View
Pin Assignments for DIP and SOIC
MM88C30
Top View
Order Number Package Number Package Description
MM88C29N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM88C30M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
MM88C30N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
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MM88C29 • MM88C30
Logic Diagrams
1/4 MM88C29
1/2 MM88C30
3 www.fairchildsemi.com
MM88C29 • MM88C30
Absolute Maximum Ratings(Note 1)
Note 1: “ Absolute Ma ximum Rating s” are those values beyond which the
safety of the device c annot be guaranteed. Ex c ept for “Operating Temp era-
ture Rang e” they are not meant to imp ly that the devices shoul d be oper-
ated at t hese limits. The E lec t rical Ch arac t eris tics t ables provide c onditions
for actual device operation.
Note 2: AC Parameters ar e guarante ed by DC corre lat ed testing.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Voltage at Any Pin (Note 2) −0.3V to VCC +16V
Operating Temperature Range −40°C to +85°C
Storage Temperature −65°C to +150°C
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Operating VCC Range 3V to 15V
Absolute Maximum VCC 18V
Average Current at Output
MM88C30 50 mA
MM88C29 25 mA
Maximum Junction Temperature, Tj150°C
Lead Temperature
(Soldering, 10 seconds) 260°C
Symbol Parameter Conditions Min Typ Max Units
CMOS TO CMOS
VIN(1) Logical “1” Input Voltage VCC = 5V 3.5 V
VCC = 10V 8 V
VIN(0) Logical “0” Input Voltage VCC = 5V 1.5 V
VCC = 10V 2 V
IIN(1) Logical “1” Input Current VCC = 15V, VIN = 15V 0.005 1 µA
IIN(0) Logical “0” Input Current VCC = 15V, VIN = 0V −1−0.005 µA
ICC Supply Current VCC = 5V 0.05 100 mA
OUTPUT DRIVE
ISOURCE Output Source Current VOUT = VCC − 1.6V,
VCC ≥ 4.75V, Tj = 25°C−47 −80 mA
Tj = 85°C−32 −60 mA
MM88C29 VOUT = VCC − 0.8V −2−20 mA
MM88C30 VCC ≥ 4.5V
ISINK Output Sink Current VOUT = 0.4V, VCC = 4.75V,
Tj = 25°C9.522mA
Tj = 85°C818mA
VOUT = 0.4V, VCC = 10V,
Tj = 25°C1940mA
Tj = 125°C 15.5 33 mA
ISOURCE Output Source Resistance VOUT = VCC − 1.6V,
VCC ≥ 4.75V, Tj = 25°C2034Ω
Tj = 85°C2750Ω
ISINK Output Sink Resistance VOUT = 0.4V, VCC = 4.75V,
Tj = 25°C1841Ω
Tj = 85°C2250Ω
VOUT = 0.4V, VCC = 10V,
Tj = 25°C1021Ω
Tj = 85°C1226Ω
Output Resistance
Temperature Coefficient
Source 0.55 %/°C
Sink 0.40 %/°C
θJA Thermal Resistance 150 °C/W
(N-Package)
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MM88C29 • MM88C30
AC Electri cal Characteristics (Note 2)
TA = 25°C, CL = 50 pF
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power cons umption of any CM OS device. For comple t e expla nation se e Family Character is t ic s applicati on note
AN-9 0 (C M OS Logic Databook).
AC Test Circuits
FIGURE 1.
FIGURE 2.
Symbol Parameter Conditions Min Typ Max Units
tpd Propagation Delay Time to
Logical “1” or “0” (See Figure 1)
MM88C29 VCC = 5V 80 200 ns
VCC = 10V 35 100 ns
MM88C30 VCC = 5V 110 350 ns
VCC = 10V 50 150 ns
tpd Differential Propagation Delay RL = 100Ω, CL = 5000 pF
Time to Logical “1” or “0” (See Figure 2)
MM88C30 VCC = 5V 400 ns
VCC = 10V 150 ns
CIN Input Capacitance
MM88C29 (Note 3) 5.0 pF
MM88C30 (Note 3) 5.0 pF
CPD Power Dissipation Capacitance
MM88C29 (Note 3) 150 pF
MM88C30 (Note 3) 200 pF
5 www.fairchildsemi.com
MM88C29 • MM88C30
Typical Applications
Digital Data Transmission
Note A: E xa c t value depends on line length.
Note B: O pt ional to control res ponse time.
Note C: VCC= 4.5V to 5.5V for the DS7820, VCC=4.5V to 15V for the DS78C20.
VCC is 3V to 15V.
Typical Data Rate vs Transmission Line Length
Note: The transm ission line us ed was #22 gauge unshielded twisted p air
(40k termi nation).
Note: The curves generated assume that both drivers are driving equal
lines, and t hat the m ax im um pow er is 500 mW/ package.
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MM88C29 • MM88C30
Typical Performance Characteristics
MM88C29
Typical Propagation Delay
vs Load Capacitance
MM88C29
Typical Propagation Delay
vs Load Capacitance
MM88C30
Typical Propagation Delay
vs Load Capacitance
MM88C30
Ty pical Propagati on Del ay
vs Load Capacitance
Typical Sink Current vs
Output Voltage
Typical Source Current
vs Output Voltag e
7 www.fairchildsemi.com
MM88C29 • MM88C30
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
Package Number M14A
F airchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM88C29 • MM88C30 Quad Single-Ended Line Driver • Dual Differential Line Driver
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or sys tem s ar e devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A criti cal comp onent in any comp onent of a l ife suppor t
device or system whose failure to perform can be rea-
sonably expected to cau se the failure of the li fe support
device or system, or to affect its safety or effectiveness.
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Package Number N14A
