March 2007
LM48555
Ceramic Speaker Driver
General Description
The LM48555 is an audio power amplifier designed to drive
ceramic speakers in applications such as cell phones, smart
phones, PDAs and other portable devices. The LM48555 pro-
duces 15.7VP-P with less than 1% THD+N while operating
from a 3.2V power supply. The LM48555 features a low power
shutdown mode, and differential inputs for improved noise
rejection.
The LM48555 includes advanced click and pop suppression
that eliminates audible turn-on and turn-off transients. Addi-
tionally, the integrated boost regulator features a soft start
function that minimizes transient current during power-up
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal number of
external components. The LM48555 does not require boot-
strap capacitors, or snubber circuits.
The LM48555 is unity-gain stable and uses external gain-set-
ting resistors.
Key Specifications
■ IDDQ (Boost Converter + Amplifier)
at VDD = 5V 7.5mA (typ)
■ Output Voltage Swing
VDD = 3.2V, THD 1% 15.7VP-P (typ)
■ Power Supply Rejection Ratio
f = 217Hz 80dB (typ)
Features
Fully differential amplifier
Externally configurable gain
Soft start function
Low power shutdown mode
Under voltage lockout
Applications
Mobile phones
PDA's
Digital cameras
Typical Application
300099c9
* CF+ and CF- are optional. Refer to “Selecting Input and Feedback Capacitor and Resistor for Audio Amplifier” section.
FIGURE 1. Typical Audio Amplifier Application Circuit
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 300099 www.national.com
LM48555 Ceramic Speaker Driver
Connection Diagrams
LM48555TL Bumps Down View
300099c8
Top View
Order Number LM48555TL
See NS Package Number TLA12Z1A
LM48555TL Marking Drawing
30009956
Top View
X = One digit date code
V = Die traceability
G = Boomer Family
I4 = LM48555TL
TLA12 Package View (Bumps Up)
30009931
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LM48555
Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VDD)9.5V
Storage Temperature −65°C to +150°C
Input Voltage −0.3V to VDD + 0.3V
Power Dissipation (Note 3) Internally limited
ESD Susceptibility (Note 4) 2000V
ESD Susceptibility (Note 5) 200V
Junction Temperature 150°C
Thermal Resistance
 θJA (Note 10) 114°C/W
Operating Ratings
Temperature Range
TMIN TA TMAX (Note 10) −40°C TA +85°C
Supply Voltage (VDD) 2.7V VDD 6.5V
Electrical Characteristics (Notes 1, 2)
The following specifications apply for VDD = 3.2V and the conditions shown in “Typical Audio Amplifier Application Circuit” (see
Figure 1), unless otherwise specified. Limits apply for TA = 25°C.
Symbol Parameter Conditions
LM48555 Units
(Limits)
Typical
(Note 6)
Limit
(Notes 7, 8)
IDD
Quiescent Power Supply Current
in Boosted Ringer Mode
VIN = 0V, No Load
VDD = 5.0V 7.5 mA
VDD = 3.6V 10 mA
VDD = 3.2V 12 15 mA (max)
ISD Shutdown Current SD = GND (Note 9) 0.1 1 µA (max)
VLH Logic High Threshold Voltage 1.2 V (min)
VLL Logic Low Threshold Voltage 0.4 V (max)
RPULLDOWN Pulldown Resistor on SD pin 80 53 kΩ (min)
TWU Wake-up Time CSS = 0.1μF100 ms
VAMP
Boost Converter Output Voltage Voltage on
VAMP Pin 88.5
7.5
V (max)
V (min)
VOUT Output Voltage Swing THD = 1% (max); f = 1kHz 15.7 15 VP-P (min)
THD+N Total Harmonic Distortion + Noise VOUT = 14VP-P, f = 1kHz 0.05 0.5 % (max)
εOS Output Noise A-Weighted Filter, VIN = 0V 70 µV
PSRR Power Supply Rejection Ratio VRIPPLE = 200mVp-p, f = 217Hz,
AV = 20dB 80 72 dB (min)
ISW Switch Current Limit 2 A
VOS Output Offset Voltage 0.5 4.5 mV (max)
CMRR Common Mode Rejection Ratio Input referred 70 65 dB (min)
UVLO Under-Voltage Lock Out 2.5 2.6 V (max)
RDS(ON) Switch ON resistance 0.3
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LM48555
Note 1: All voltages are measured with respect to the GND pin, unless otherwise specified.
Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions
which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters
where no limit is given, however, the typical value is a good indication of device performance.
Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum
allowable power dissipation is PDMAX = (TJMAX − TA) / θJA or the given in Absolute Maximum Ratings, whichever is lower.
Note 4: Human body model, 100pF discharged through a 1.5k resistor.
Note 5: Machine Model, 220pF–240pF discharged through all pins.
Note 6: Typicals are measured at 25°C and represent the parametric norm.
Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 9: Shutdown current is measured in a normal room environment. The SD pin should be driven as close as possible to GND for minimum shutdown current.
Note 10: The value for θJA is measured with the LM48555 mounted on a 3” x 1.5” (76.2mm x 3.81mm) four layer board. The copper thickness for all four layers
is 0.5oz (roughly 0.18mm).
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LM48555
Typical Performance Characteristics
THD+N vs Frequency
VO = 4.95VRMS, VDD = 3.2V,
ZL = 1μF + 20
30009950
THD+N vs Frequency
VO = 4.95VRMS, VDD = 4.2V,
ZL = 1μF + 20
30009951
THD+N vs Frequency
VO = 4.95VRMS, VDD = 5V,
ZL = 1μF + 20
30009952
THD+N vs Output Voltage Swing
VDD = 3.2V, ZL = 1μF + 20
30009964
THD+N vs Output Voltage Swing
VDD = 4.2V, ZL = 1μF + 20
30009965
THD+N vs Output Voltage Swing
VDD = 5V, ZL = 1μF + 20
30009969
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LM48555
CMRR vs Frequency
VDD = 3.2V, ZL = 1μF + 20
VIN = 100mVP-P
30009957
CMRR vs Frequency
VDD = 4.2V, ZL = 1μF + 20
VIN = 100mVP-P
30009958
CMRR vs Frequency
VDD = 5V, ZL = 1μF + 20
VIN = 100mVP-P
30009959
PSRR vs Frequency
VDD = 3.2V, ZL = 1μF + 20
VRIPPLE = 200mVP-P
30009961
PSRR vs Frequency
VDD = 4.2V, ZL = 1μF + 20
VRIPPLE = 200mVP-P
30009962
PSRR vs Frequency
VDD = 5V, ZL = 1μF + 20
VRIPPLE = 200mVP-P
30009963
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LM48555
Inductor Current vs Output Voltage Swing
ZL = 1μF + 20, f = 1kHz,
VDD = 3V, 4.2V, 5V
30009960
Supply Current vs Supply Voltage
30009967
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LM48555
Application Information
CHARACTERISTICS OF CERAMIC SPEAKERS
Because of their ultra-thin profile piezoelectric ceramic speak-
ers are ideal for portable applications. Piezoelectric materials
have high dielectric constants and their component electrical
property is like a capacitor. Therefore, piezoelectric ceramic
speakers essentially represent capacitive loads over frequen-
cy. Because these speakers are capacitive rather than resis-
tive, they require less current than traditional moving coil
speakers. However, ceramic speakers require high driving
voltages (approximately 15VP-P). To achieve these high out-
put voltages in battery operated applications, the LM48555
integrates a boost converter with an audio amplifier. High
quality piezoelectric ceramic speakers are manufactured by
TayioYuden (www.t-yuden.com) and muRata
(www.murata.com). Tayio Yuden's MLS-A Series Ceramic
Speaker and Murata's piezoelectric speaker VSL series are
recommended.
DIFFERENTIAL AMPLIFIER EXPLANATION
The LM48555 includes a fully differential audio amplifier that
features differential input and output stages. Internally this is
accomplished by two circuits: a differential amplifier and a
common mode feedback amplifier that adjusts the output volt-
ages so that the average value remains VDD/2. When setting
the differential gain, the amplifier can be considered to have
"halves". Each half uses an input and feedback resistor (RIN_
and RF_) to set its respective closed-loop gain (see Figure 1).
With RIN+ = RIN- and RF+ = RF-, the gain is set at -RF/RIN
for each half. This results in a differential gain of
AVD = -RF/RIN (1)
It is extremely important to match the input resistors, as well
as the feedback resistors to each other for best amplifier per-
formance. A differential amplifier works in a manner where the
difference between the two input signals is amplified. In most
applications, this would require input signals that are 180° out
of phase with each other. The LM48555 can be used, how-
ever, as a single-ended input amplifier while still retaining its
fully differential benefits. In fact, completely unrelated signals
may be placed at the input pins. The LM48555 simply ampli-
fies the difference between them.
The LM48555 provides what is known as a "bridged mode"
output (bridge-tied-load, BTL). This results in output signals
at OUT+ and OUT- that are 180° out of phase with respect to
each other. Bridged mode operation is different from the tra-
ditional single-ended amplifier configuration that connects the
load between the amplifier output and ground. A bridged am-
plifier design has advantages over the single-ended configu-
ration: it provides differential drive to the load, thus doubling
maximum possible output swing for a specific supply voltage.
Up to four times the output power is possible compared with
a single-ended amplifier under the same conditions.
A bridged configuration, such as the one used in the
LM48555, also creates a second advantage over single-end-
ed amplifiers. Since the differential outputs, OUT+ and OUT-,
are biased at half-supply, no net DC voltage exists across the
load. This assumes that the input resistor pair and the feed-
back resistor pair are properly matched. BTL configuration
eliminates the output coupling capacitor required in single
supply, single-ended amplifier configurations. If an output
coupling capacitor is not used in a single-ended output con-
figuration, the half-supply bias across the load would result in
both increased internal IC power dissipation as well as per-
manent loudspeaker damage.
BOOST CONVERTER POWER DISSIPATION
At higher duty cycles, the increased ON-time of the switch
FET means the maximum output current will be determined
by power dissipation within the LM48555 FET switch. The
switch power dissipation from ON-time conduction is calcu-
lated by Equation 2.
PD(SWITCH) = DC x (IINDUCTOR(AVE))2 x RDS(ON) (W) (2)
where DC is the duty cycle.
There will be some switching losses in addition to the power
loss calculated in Eqaution 3, so some derating needs to be
applied when calculating IC power dissipation. See “Maxi-
mum Power Dissipation” section.
MAXIMUM AMPLIFIER POWER DISSIPATION
Power dissipation is a major concern when designing a suc-
cessful amplifier, whether the amplifier is bridged or single-
ended. A direct consequence of the increased power
delivered to the load by a bridge amplifier is an increase in
internal power dissipation. Since the amplifier portion of the
LM48555 has two operational amplifiers, the maximum inter-
nal power dissipation is 4 times that of a single-ended ampli-
fier. The maximum power dissipation for a given BTL
application can be derived from Equation 3.
PDMAX(AMP) = (2VDD2) / (π2RO) (W) (3)
MAXIMUM TOTAL POWER DISSIPATION
The total power dissipation for the LM48555 can be calculated
by adding Equation 2 and Equation 3 together to establish
Equation 4:
PDMAX(TOTAL) = (2VDD2) / (π2EFF2RO) (W) (4)
where
EFF = Efficiency of boost converter
The result from Equation 4 must not be greater than the power
dissipation that results from Equation 5:
PDMAX = (TJMAX - TA) / θJA (W) (5)
For the TLA12Z1A, θJA = 114°C/W. TJMAX = 150°C for the
LM48555. Depending on the ambient temperature, TA, of the
system surroundings, Equation 5 can be used to find the
maximum internal power dissipation supported by the IC
packaging. If the result of Equation 4 is greater than that of
Equation 5, then either the supply voltage must be decreased,
the load impedance increased or TA reduced. For typical ap-
plications, power dissipation is not an issue. Power dissipa-
tion is a function of output power and thus, if typical operation
is not around the maximum power dissipation point, the am-
bient temperature may be increased accordingly.
STARTUP SEQUENCE
Correct startup sequencing is important for optimal device
performance. Using the correct startup sequence will improve
click and pop performance as well as avoid transients that
could reduce battery life. The device should be in Shutdown
mode when the supply voltage is applied. Once the supply
voltage has been supplied the device can be released from
Shutdown mode.
SHUTDOWN FUNCTION
In many applications, a microcontroller or microprocessor
output is used to control the shutdown circuitry to provide a
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LM48555
quick, smooth transition into shutdown. Another solution is to
use a single-pole, single-throw switch connected between
VDD and Shutdown pins.
BOOTSTRAP PIN
The bootstrap pin provides a voltage supply for the internal
switch driver. Connecting the bootstrap pin to VAMP (See
Figure 1) allows for a higher voltage to drive the gate of the
switch thereby reducing the RDS(ON). This configuration is
necessary in applications with heavier loads. The bootstrap
pin can be connected to VDD when driving lighter loads to im-
prove device performance (IDD, THD+N, Noise, etc.).
PROPER SELECTION OF EXTERNAL COMPONENTS
Proper selection of external components in applications using
integrated power amplifiers, and switching DC-DC convert-
ers, is critical for optimizing device and system performance.
Consideration to component values must be used to maxi-
mize overall system quality. The best capacitors for use with
the switching converter portion of the LM48555 are multi-layer
ceramic capacitors. They have the lowest ESR (equivalent
series resistance) and highest resonance frequency, which
makes them optimum for high frequency switching convert-
ers. When selecting a ceramic capacitor, only X5R and X7R
dielectric types should be used. Other types such as Z5U and
Y5F have such severe loss of capacitance due to effects of
temperature variation and applied voltage, they may provide
as little as 20% of rated capacitance in many typical applica-
tions. Always consult capacitor manufacturer’s data curves
before selecting a capacitor. High-quality ceramic capacitors
can be obtained from Taiyo-Yuden and Murata.
POWER SUPPLY BYPASSING
As with any amplifier, proper supply bypassing is critical for
low noise performance and high power supply rejection. The
capacitor location on both V1 and VDD pins should be as close
to the device as possible.
SELECTING INPUT AND FEEDBACK CAPACITORS AND
RESISTOR FOR AUDIO AMPLIFIER
Special care must be taken to match the values of the feed-
back resistors (RF+ and RF-) to each other as well as match-
ing the input resistors (RIN+ and RIN-) to each other (see
Figure 1). Because of the balanced nature of differential am-
plifiers, resistor matching differences can result in net DC
currents across the load. This DC current can increase power
consumption, internal IC power dissipation, reduce PSRR,
and possibly damage the loudspeaker. To achieve best per-
formance with minimum component count, it is highly recom-
mended that both the feedback and input resistors match to
1% tolerance or better.
The input coupling capacitors, CIN, forms a first order high
pass filter which limits low frequency response. This value
should be chosen based on needed frequency response.
High value input capacitors are both expensive and space
hungry in portable designs. A certain value capacitor is need-
ed to couple in low frequencies without severe attenuation.
Ceramic speakers used in portable systems, whether internal
or external, have little ability to reproduce signals below
100Hz to 150Hz. Thus, using a high value input capacitor may
not increase actual system performance. In addition to sys-
tem cost and size, click and pop performance is affected by
the value of the input coupling capacitor, CIN. A high value
input coupling capacitor requires more charge to reach its
quiescent DC voltage (nominally 1/2 VDD). This charge comes
from the output via the feedback and is apt to create pops
upon device enable. Thus, by minimizing the capacitor value
based on desired low frequency response, turn-on pops can
be minimized.
The LM48555 is unity-gain stable which gives the designer
maximum system flexibility. However, to drive ceramic speak-
ers, a typical application requires a closed-loop differential
gain of 10V/V. In this case, feedback capacitors (CF+, CF-)
may be needed as shown in Figure 1 to bandwidth limit the
amplifier. If the available input signal is bandwith limited, then
capacitors CF+ and CF- can be eliminated. These feedback
capacitors create a low pass filter that eliminates possible
high frequency noise. Care should be taken when calculating
the -3dB frequency (from equation 6) because an incorrect
combination of RF and CF will cause rolloff before the desired
frequency.
f–3dB = 1 / 2πRF*CF (6)
SELECTING OUTPUT CAPACITOR (CO) FOR BOOST
CONVERTER
A single 4.7μF to 10μF ceramic capacitor will provide suffi-
cient output capacitance for most applications. If larger
amounts of capacitance are desired for improved line support
and transient response, tantalum capacitors can be used.
Aluminum electrolytics with ultra low ESR such as Sanyo Os-
con can be used. Typical electrolytic capacitors are not suit-
able for switching frequencies above 500 kHz because of
significant ringing and temperature rise due to self-heating
from ripple current. An output capacitor with excessive ESR
can also reduce phase margin and cause instability. In gen-
eral, if electrolytics are used, it is recommended that they be
paralleled with ceramic capacitors to reduce ringing, switch-
ing losses, and output voltage ripple.
SELECTING A POWER SUPPLY BYPASS CAPACITOR
A supply bypass capacitor is required to serve as an energy
reservoir for the current which must flow into the coil each time
the switch turns on. This capacitor must have extremely low
ESR, so ceramic capacitors are the best choice. A nominal
value of 4.7μF is recommended, but larger values can be
used. Since this capacitor reduces the amount of voltage rip-
ple seen at the input pin, it also reduces the amount of EMI
passed back along that line to other circuitry.
SELECTING A SOFT-START CAPACITOR (CSS)
The soft-start function charges the boost converter reference
voltage slowly. This allows the output of the boost converter
to ramp up slowly thus limiting the transient current at startup.
Selecting a soft-start capacitor (CSS) value presents a trade
off between the wake-up time and the startup transient cur-
rent. Using a larger capacitor value will increase wake-up time
and decrease startup transient current while the apposite ef-
fect happens with a smaller capacitor value. A general guide-
line is to use a capacitor value 1000 times smaller than the
output capacitance of the boost converter (CO). A 0.1uF soft-
start capacitor is recommended for a typical application.
SELECTING DIODES
The external diode used in Figure 1 should be a Schottky
diode. A 20V diode such as the MBR0520 from Fairchild
Semiconductor or ON Semiconductor is recommended. The
MBR05XX series of diodes are designed to handle a maxi-
mum average current of 0.5A. For applications exceeding
0.5A average but less than 1A, a Microsemi UPS5817 can be
used.
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LM48555
OUTPUT VOLTAGE OF BOOST CONVERTER
The output voltage is set using two internal resistors. The
output voltage of the boost converter is set to 8V (typ).
DUTY CYCLE
The maximum duty cycle of the boost converter determines
the maximum boost ratio of output-to-input voltage that the
converter can attain in continuous mode of operation. The
duty cycle for a given boost application is defined by equation
7:
Duty Cycle = (VAMP+VDIODE -VDD)/(VAMP+VDIODE-VSW) (7)
This applies for continuous mode operation.
INDUCTANCE VALUE
Inductor value involves trade-offs in performance. Larger in-
ductors reduce inductor ripple current, which typically means
less output voltage ripple (for a given size of output capacitor).
Larger inductors also mean more load power can be delivered
because the energy stored during each switching cycle is:
E = L/2 x IP2(8)
Where “lp” is the peak inductor current. The LM48555 will limit
its switch current based on peak current. With IP fixed, in-
creasing L will increase the maximum amount of power avail-
able to the load. Conversely, using too little inductance may
limit the amount of load current which can be drawn from the
output. Best performance is usually obtained when the con-
verter is operated in “continuous” mode at the load current
range of interest, typically giving better load regulation and
less output ripple. Continuous operation is defined as not al-
lowing the inductor current to drop to zero during the cycle.
Boost converters shift over to discontinuous operation if the
load is reduced far enough, but a larger inductor stays con-
tinuous over a wider load current range.
INDUCTOR SUPPLIERS
The recommended inductors for the LM48555 are the Taiyo-
Yuden NR4012, NR3010, and CBC3225 series and Murata's
LQH3NPN series. When selecting an inductor, the continu-
ous current rating must be high enough to avoid saturation at
peak currents. A suitable core type must be used to minimize
core (switching) losses, and wire power losses must be con-
sidered when selecting the current rating.
CALCULATING OUTPUT CURRENT OF BOOST
CONVERTER (IAMP)
The load current of the boost converter is related to the av-
erage inductor current by the relation:
IAMP = IINDUCTOR(AVE) x (1 - DC) (A) (9)
Where "DC" is the duty cycle of the application.
The switch current can be found by:
ISW = IINDUCTOR(AVE) + 1/2 (IRIPPLE) (A) (10)
Inductor ripple current is dependent on inductance, duty cy-
cle, supply voltage and frequency:
IRIPPLE = DC x (VDD-VSW) / (f x L) (A) (11)
where f = switching frequency = 1MHz
combining all terms, we can develop an expression which al-
lows the maximum available load current to be calculated:
IAMP(max) = (1–DC)x[ISW(max)–DC(V-VSW)]/2fL (A) (12)
The equation shown to calculate maximum load current takes
into account the losses in the inductor or turn-off switching
losses of the FET and diode.
DESIGN PARAMETERS VSW AND ISW
The value of the FET "ON" voltage (referred to as VSW in
equations 9 thru 12) is dependent on load current. A good
approximation can be obtained by multiplying the on resis-
tance (RDS(ON) of the FET times the average inductor current.
The maximum peak switch current the device can deliver is
dependent on duty cycle.
EVALUATION BOARD AND PCB LAYOUT GUIDELINES
For information on the LM48555 demo board and PCB layout
guidelines refer to Application Notes (AN-1611).
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LM48555
Revision History
Rev Date Description
0.1 03/15/07 Initial Web Release
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LM48555
Physical Dimensions inches (millimeters) unless otherwise noted
Thin micro SMD
Order Number LM48555TL
NS Package Number TLA12Z1A
X1 = 1.463±0.03mmX2 = 1.970±0.03mmX3 = 0.600±0.075mm
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LM48555
Notes
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LM48555
Notes
LM48555 Ceramic Speaker Driver
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