DBV (SOT-23) PACKAGE
(TOP VIEW)
1
2
3
5
4
VIN
GND
ON/OFF
VOUT
BYPASS
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
150-mA LOW-NOISE LOW-DROPOUT REGULATOR WITH SHUTDOWN
Check for Samples: LP2985
–2000-V Human-Body Model (A114-A)
1FEATURES
–200-V Machine Model (A115-A)
•Output Tolerance of
–1% (A Grade) PORTABLE APPLICATIONS
–1.5% (Standard Grade) •Cellular Phones
•Ultra-Low Dropout, Typically •Palmtop and Laptop Computers
–280 mV at Full Load of 150 mA •Personal Digital Assistants (PDAs)
–7 mV at 1 mA •Digital Cameras and Camcorders
•Wide VIN Range: 16 V Max •CD Players
•Low IQ: 850 μA at Full Load at 150 mA •MP3 Players
•Shutdown Current: 0.01 μA Typ
•Low Noise: 30 μVRMS With 10-nF Bypass
Capacitor
•Stable With Low-ESR Capacitors, Including
Ceramic
•Overcurrent and Thermal Protection
•High Peak-Current Capability
•ESD Protection Exceeds JESD 22
DESCRIPTION/ORDERING INFORMATION
The LP2985 family of fixed-output, low-dropout regulators offers exceptional, cost-effective performance for both
portable and nonportable applications. Available in voltages of 1.8 V, 2.5 V, 2.8 V, 2.9 V, 3 V, 3.1 V, 3.3 V, 5 V,
and 10 V, the family has an output tolerance of 1% for the A version (1.5% for the non-A version) and is capable
of delivering 150-mA continuous load current. Standard regulator features, such as overcurrent and
overtemperature protection, are included.
The LP2985 has a host of features that makes the regulator an ideal candidate for a variety of portable
applications:
•Low dropout: A PNP pass element allows a typical dropout of 280 mV at 150-mA load current and 7 mV at
1-mA load.
•Low quiescent current: The use of a vertical PNP process allows for quiescent currents that are considerably
lower than those associated with traditional lateral PNP regulators.
•Shutdown: A shutdown feature is available, allowing the regulator to consume only 0.01 μA when the
ON/OFF pin is pulled low.
•Low-ESR-capacitor friendly: The regulator is stable with low-ESR capacitors, allowing the use of small,
inexpensive, ceramic capacitors in cost-sensitive applications.
•Low noise: A BYPASS pin allows for low-noise operation, with a typical output noise of 30 μVRMS, with the
use of a 10-nF bypass capacitor.
•Small packaging: For the most space-constrained needs, the regulator is available in the SOT-23 package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright ©2004–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
ORDERING INFORMATION(1)
PART VOUT ORDERABLE TOP-SIDE
TJPACKAGE(2)
GRADE (NOM) PART NUMBER MARKING(3)
Reel of 3000 LP2985A-18DBVR
1.8 V Reel of 250 LP2985A-18DBVT LPT_
Reel of 10000 LP2985A-18DBVJ
Reel of 3000 LP2985A-25DBVR
2.5 V LPU_
Reel of 250 LP2985A-25DBVT
Reel of 3000 LP2985A-28DBVR
2.8 V LPJ_
Reel of 250 LP2985A-28DBVT
Reel of 3000 LP2985A-29DBVR
2.9 V LPZ_
Reel of 250 LP2985A-29DBVT
A grade: Reel of 3000 LP2985A-30DBVR
1% tolerance 3.0 V LRA_
Reel of 250 LP2985A-30DBVT
Reel of 3000 LP2985A-31DBVR
3.1 V PREVIEW
Reel of 250 LP2985A-31DBVT
Reel of 3000 LP2985A-33DBVR
3.3 V LPK_
Reel of 250 LP2985A-33DBVT
Reel of 3000 LP2985A-50DBVR
5.0 V LRI_
Reel of 250 LP2985A-50DBVT
Reel of 3000 LP2985A-10DBVR
10.0 V LRD_
–40°C to 125°C SOT-23-5 –DBV Reel of 250 LP2985A-10DBVT
Reel of 3000 LP2985-18DBVR
1.8 V LPH_
Reel of 250 LP2985-18DBVT
Reel of 3000 LP2985-25DBVR
2.5 V LPL_
Reel of 250 LP2985-25DBVT
Reel of 3000 LP2985-28DBVR
2.8 V LPG_
Reel of 250 LP2985-28DBVT
Reel of 3000 LP2985-29DBVR
2.9 V LPM_
Reel of 250 LP2985-29DBVT
Reel of 3000 LP2985-30DBVR
Standard grade: 3.0 V LPN_
1.5% tolerance Reel of 250 LP2985-30DBVT
Reel of 3000 LP2985-31DBVR
3.1 V PREVIEW
Reel of 250 LP2985-31DBVT
Reel of 3000 LP2985-33DBVR
3.3 V LPF_
Reel of 250 LP2985-33DBVT
Reel of 3000 LP2985-50DBVR
5.0 V LPS_
Reel of 250 LP2985-50DBVT
Reel of 3000 LP2985-10DBVR
10. 0 V LRC_
Reel of 250 LP2985-10DBVT
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) The actual top-side marking has one additional character that designates the wafer fab/assembly site.
2Copyright ©2004–2011, Texas Instruments Incorporated
VIN
VOUT
ON/OFF
Overcurrent/
Overtemperature
Protection
VREF 1.23 V −
+
BYPASS
VOUT
2.2 µF
(see Note A)
10 nF
(see Note C)
1 µF
(see Note A)
VIN 1
ON/OFF
(see Note B)
2GND
3
5
4BYPASS
LP2985
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
FUNCTIONAL BLOCK DIAGRAM
Figure 1. BASIC APPLICATION CIRCUIT
A. Minimum COUT value for stability (can be increased without limit for improved stability and transient response)
B. ON/OFF must be actively terminated. Connect to VIN if shutdown feature is not used.
C. Optional BYPASS capacitor for low-noise operation
Copyright ©2004–2011, Texas Instruments Incorporated 3
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
Absolute Maximum Ratings(1)
over virtual junction temperature range (unless otherwise noted) MIN MAX UNIT
VIN Continuous input voltage range(2) –0.3 16 V
VON/ OFF ON/OFF input voltage range –0.3 16 V
Output voltage range(3) –0.3 9 V
Internally limited
IOOutput current(4) (short-circuit protected)
θJA Package thermal impedance(4) (5) 206 °C/W
TJOperating virtual junction temperature 150 °C
Tstg Storage temperature range –65 150 °C
Human-Body Model (HBM) 2000
ESD Electrostatic discharge protection V
Machine Model (MM) 200
(1) Stresses beyond those listed under "absolute maximum ratings"may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions"is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The PNP pass transistor has a parasitic diode connected between the input and output. This diode normally is reverse biased
(VIN >VOUT), but will be forward biased if the output voltage exceeds the input voltage by a diode drop (see Application Information for
more details).
(3) If load is returned to a negative power supply in a dual-supply system, the output must be diode clamped to GND.
(4) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD= (TJ(max) –TA)/θJA. Operating at the absolute maximum TJof 150°C can affect reliability.
(5) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions MIN MAX UNIT
VIN Supply input voltage 2.2(1) 16 V
VON/ OFF ON/OFF input voltage 0 VIN V
IOUT Output current 150 mA
TJVirtual junction temperature –40 125 °C
(1) Recommended minimum VIN is the greater of 2.5 V or VOUT(max) + rated dropout voltage (max) for operating IL.
4Copyright ©2004–2011, Texas Instruments Incorporated
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
Electrical Characteristics
at specified virtual junction temperature range, VIN = VOUT(NOM) + 1 V, VON/ OFF = 2 V, CIN = 1 μF, IL= 1 mA, COUT = 4.7 μF
(unless otherwise noted) LP2985A-xx LP2985-xx
PARAMETER TEST CONDITIONS TJUNIT
MIN TYP MAX MIN TYP MAX
IL= 1 mA 25°C–1 1 –1.5 1.5
25°C–1.5 1.5 –2.5 2.5
1 mA ≤IL≤50 mA
Output voltage
ΔVOUT –40°C to 125°C–2.5 2.5 –3.5 3.5 %VNOM
tolerance 25°C–2.5 2.5 –3 3
1 mA ≤IL≤150 mA –40°C to 125°C–3.5 3.5 –4 4
25°C 0.007 0.014 0.007 0.014
Line regulation VIN = [VOUT(NOM) + 1 V] to 16 V %/V
–40°C to 125°C 0.032 0.032
25°C 1 3 1 3
IL= 0 –40°C to 125°C 5 5
25°C 7 10 7 10
IL= 1 mA –40°C to 125°C 15 15
25°C 40 60 40 60
VIN –VOUT Dropout voltage(1) IL= 10 mA mV
–40°C to 125°C 90 90
25°C 120 150 120 150
IL= 50 mA –40°C to 125°C 225 225
25°C 280 350 280 350
IL= 150 mA –40°C to 125°C 575 575
25°C 65 95 65 95
25°C (LP2985-10) 125 125
IL= 0 –40°C to 125°C 125 125
–40°C to 125°C160 160
(LP2985-10)
25°C 75 110 75 110
IL= 1 mA 25°C (LP2985-10) 140 140
–40°C to 125°C 170 170
25°C 120 220 120 220
IL= 10 mA 25°C (LP2985-10) 250 250
IGND GND pin current μA
–40°C to 125°C 400 400
25°C 350 600 350 600
IL= 50 mA 25°C (LP2985-10) 650 650
–40°C to 125°C 1000 1000
25°C 850 1500 850 1500
IL= 150 mA 25°C (LP2985-10) 1800 1800
–40°C to 125°C 2500 2500
VON/ OFF <0.3 V (OFF) 25°C 0.01 0.8 0.01 0.8
–40°C to 105°C 0.05 2 0.05 2
VON/ OFF <0.15 V (OFF) –40°C to 125°C 5 5
25°C 1.4 1.4
VON/ OFF = HIGH →O/P ON –40°C to 125°C 1.6 1.6
VON/ OFF ON/OFF input voltage(2) V
25°C 0.55 0.55
VON/ OFF = LOW →O/P OFF –40°C to 125°C 0.15 0.15
25°C 0.01 0.01
VON/ OFF = 0 –40°C to 125°C–2–2
ION/ OFF ON/OFF input current μA
25°C 5 5
VON/ OFF = 5 V –40°C to 125°C 15 15
(1) Dropout voltage is defined as the input-to-output differential at which the output voltage drops 100 mV below the value measured with a
1-V differential.
(2) The ON/OFF input must be driven properly for reliable operation (see Application Information).
Copyright ©2004–2011, Texas Instruments Incorporated 5
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
Electrical Characteristics (continued)
at specified virtual junction temperature range, VIN = VOUT(NOM) + 1 V, VON/ OFF = 2 V, CIN = 1 μF, IL= 1 mA, COUT = 4.7 μF
(unless otherwise noted) LP2985A-xx LP2985-xx
PARAMETER TEST CONDITIONS TJUNIT
MIN TYP MAX MIN TYP MAX
BW = 300 Hz to 50 kHz,
VnOutput noise (RMS) COUT = 10 μF, 25°C 30 30 μV
CBYPASS = 10 nF
ΔVOUT/ f = 1kHz, COUT = 10 μF,
Ripple rejection 25°C 45 45 dB
ΔVIN CBYPASS = 10 nF
IOUT(PK) Peak output current VOUT ≥VO(NOM) –5% 25°C 350 350 mA
IOUT(SC) Short-circuit current RL= 0 (steady state)(3) 25°C 400 400 mA
(3) See Figure 7 in Typical Performance Characteristics.
6Copyright ©2004–2011, Texas Instruments Incorporated
3.295
3.305
3.315
3.325
3.335
3.345
−50 −25 0 25 50 75 100 125 150
Output Voltage − V
VI = 4.3 V
VO = 3.3 V
Ci = 1 µF
Co = 4.7 µF
IO = 1 mA
Temperature − °C
9.85
9.90
9.95
10.00
10.05
10.10
10.15
10.20
-50 -25 0 25 50 75 100 125 150
Temperature – °C
Output Voltage – V
VI= 11 V
VO= 10 V
CI= 1 µF
CO= 4.7 µF
IO= 1 mA
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
−50 −25 0 25 50 75 100 125 150
VO = 3.3 V
Cbyp = 10 nF
Dropout − V
150 mA
50 mA
10 mA
1 mA
Temperature − °C
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
−500 0 500 1000 1500 2000
Time − ms
Short-Circuit Current − A
VI = 6 V
VO = 3.3 V
Ci = 1 µF
Cbyp = 0.01 µF
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
TYPICAL PERFORMANCE CHARACTERISTICS
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
OUTPUT VOLTAGE OUTPUT VOLTAGE
vs vs
TEMPERATURE TEMPERATURE
Figure 2. Figure 3.
DROPOUT VOLTAGE SHORT-CIRCUIT CURRENT
vs vs
TEMPERATURE TIME
Figure 4. Figure 5.
Copyright ©2004–2011, Texas Instruments Incorporated 7
−100 100 300 500 700
Time − ms
VI = 16 V
VO = 3.3 V
Ci = 1 µF
Cbyp = 0.01 µF
Short-Circuit Current − A
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
200
220
240
260
280
300
320
0 0.5 1 1.5 2 2.5 3 3.5
Output Voltage − V
ISC − mA
VO = 3.3 V
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
020 40 60 80 100 120 140
Load Current − mA 160
VO = 3.3 V
Cbyp = 10 nF
Ground Pin Current − µA
0
10
20
30
40
50
60
70
80
90
100
10 100 1k 10k 100k 1M
Frequency − Hz
Ripple Rejection − dB
VI = 5 V
VO = 3.3 V
Co = 10 µF
Cbyp = 0 nF
50 mA
150 mA
1 mA
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
SHORT-CIRCUIT CURRENT SHORT-CIRCUIT CURRENT
vs vs
TIME OUTPUT VOLTAGE
Figure 6. Figure 7.
GROUND-PIN CURRENT RIPPLE REJECTION
vs vs
LOAD CURRENT FREQUENCY
Figure 8. Figure 9.
8Copyright ©2004–2011, Texas Instruments Incorporated
0
10
20
30
40
50
60
70
80
90
100
10 100 1k 10k 100k 1M
Frequency − Hz
Ripple Rejection − dB
50 mA
150 mA
1 mA
VI = 3.7 V
VO = 3.3 V
Co = 10 µF
Cbyp = 0 nF
0
10
20
30
40
50
60
70
80
90
100
10 100 1k 10k 100k 1M
Frequency − Hz
Ripple Rejection − dB
VI = 5 V
VO = 3.3 V
Co = 4.7 µF
Cbyp = 10 nF
50 mA
150 mA
1 mA
0
10
20
30
40
50
60
70
80
90
100
10 100 1k 10k 100k 1M
Frequency − Hz
Ripple Rejection − dB
VI = 5 V
VO = 3.3 V
Co = 4.7 µF
Cbyp = 10 nF
10 mA
100 mA
1 mA
0.001
0.01
0.1
1
10
10 100 1k 10k 100k 1M
Frequency − Hz
Ci = 1 µF
Co = 10 µF
VO = 3.3 V
10 mA
100 mA
1 mA
Output Impedance − Ω
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
RIPPLE REJECTION RIPPLE REJECTION
vs vs
FREQUENCY FREQUENCY
Figure 10. Figure 11.
RIPPLE REJECTION OUTPUT IMPEDANCE
vs vs
FREQUENCY FREQUENCY
Figure 12. Figure 13.
Copyright ©2004–2011, Texas Instruments Incorporated 9
0.01
0.1
1
10
100 1k 10k 100k
Frequency − Hz
Noise Density − µV/
Cbyp = 1 nF
Cbyp = 10 nF
Cbyp = 100 pF
ILOAD = 150 mA
Hz
0.001
0.01
0.1
1
10
10 100 1k 10k 100k 1M
Frequency − Hz
Ci = 1 µF
Co = 4.7 µF
VO = 3.3 V
10 mA
100 mA
1 mA
Output Impedance − Ω
0.01
0.1
1
10
100 1k 10k 100k
Frequency − Hz
Noise Density − µV/
ILOAD = 1 mA
Cbyp = 1 nF
Cbyp = 10 nF
Cbyp = 100 pF
Hz
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
0 1 2 3 4 5 6
Input Voltage − V
Input Current − mA
RL = Open
RL = 3.3 kΩ
VO = 3.3 V
Cbyp = 10 nF
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
OUTPUT IMPEDANCE OUTPUT NOISE DENSITY
vs vs
FREQUENCY FREQUENCY
Figure 14. Figure 15.
OUTPUT NOISE DENSITY INPUT CURRENT
vs vs
FREQUENCY INPUT VOLTAGE
Figure 16. Figure 17.
10 Copyright ©2004–2011, Texas Instruments Incorporated
0
200
400
600
800
1000
1200
1400
−50 −25 0 25 50 75 100 125 150
Ground Current − C
0 mA
Temperature − °C
150 mA
50 mA
10 mA
1 mA
VO = 3.3 V
Cbyp = 10 nF
3.22
3.24
3.26
3.28
3.3
3.32
3.34
3.36
3.38
3.4
Output Voltage − V
−250
−200
−150
−100
−50
0
50
100
150
200
Load Current − mA
20 µs/div"
VO = 3.3 V
Cbyp = 10 nF
∆IL = 100 mA
IL
VO
3.22
3.24
3.26
3.28
3.3
3.32
3.34
3.36
3.38
3.4
−250
−200
−150
−100
−50
0
50
100
150
200
Output Voltage − V
Load Current − mA
IL
VO
VO = 3.3 V
Cbyp = 0 nF
∆IL = 150 mA
20 µs/div"
Output Voltage − V
Load Current − mA
3.22
3.24
3.26
3.28
3.3
3.32
3.34
3.36
3.38
3.4
−250
−200
−150
−100
−50
0
50
100
150
200
VO = 3.3 V
Cbyp = 10 nF
∆IL = 150 mA
IL
VO
20 µs/div"
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
GROUND-PIN CURRENT
vs
TEMPERATURE LOAD TRANSIENT RESPONSE
Figure 18. Figure 19.
LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 20. Figure 21.
Copyright ©2004–2011, Texas Instruments Incorporated 11
3.27
3.29
3.31
3.33
3.35
3.37
3.39
3.41
2
2.5
3
3.5
4
4.5
5
5.5
VI
VO
Output Voltage − V
Input Voltage − V
20 µs/div"
VO = 3.3 V
Cbyp = 0 nF
IO = 150 mA
Output Voltage − V
3.27
3.29
3.31
3.33
3.35
3.37
3.39
3.41
2
2.5
3
3.5
4
4.5
5
5.5
VO = 3.3 V
Cbyp = 10 nF
IO = 150 mA
Input Voltage − V
VI
VO
20 µs/div"
3.27
3.29
3.31
3.33
3.35
3.37
3.39
3.41
2
2.5
3
3.5
4
4.5
5
5.5
Output Voltage − V
VO = 3.3 V
Cbyp = 10 nF
IO = 1 mA
Input Voltage − V
VIN
VO
100 µs/div"
Output Voltage − V
3.27
3.29
3.31
3.33
3.35
3.37
3.39
3.41
2
2.5
3
3.5
4
4.5
5
5.5
VO = 3.3 V
Cbyp = 0 nF
IO = 1 mA
Input Voltage − V
VI
VO
20 µs/div"
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
LINE TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 22. Figure 23.
LINE TRANSIENT RESPONSE LINE TRANSIENT RESPONSE
Figure 24. Figure 25.
12 Copyright ©2004–2011, Texas Instruments Incorporated
0
2
4
6
8
10
−4
−3
−2
−1
0
1
2
3
4
Output Voltage − V
VON/OFF − V
VO
VON/OFF
100 µs/div"
VO = 3.3 V
Cbyp = 0
IO = 150 mA
−4
−3
−2
−1
0
1
2
3
4
0
2
4
6
8
10
Output Voltage − V
VON/OFF − V
VO
VON/OFF
200 µs/div"
VO = 3.3 V
Cbyp = 100 pF
ILOAD = 150 mA
Output Voltage − V
−4
−3
−2
−1
0
1
2
3
4
0
2
4
6
8
10
VON/OFF − V
Input
Output
VO = 3.3 V
Cbyp = 10 nF
ILOAD = 150 mA
20 ms/div"
−4
−3
−2
−1
0
1
2
3
4
0
2
4
6
8
10
Output Voltage − V
VON/OFF − V
VO
VON/OFF
2 ms/div"
VO = 3.3 V
Cbyp = 1 nF
ILOAD = 150 mA
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
CIN = 1 μF, COUT = 4.7 μF, VIN = VOUT(NOM) + 1 V, TA= 25°C, ON/OFF pin tied to VIN (unless otherwise specified)
TURN-ON TIME TURN-ON TIME
Figure 26. Figure 27.
TURN-ON TIME TURN-ON TIME
Figure 28. Figure 29.
Copyright ©2004–2011, Texas Instruments Incorporated 13
ESR ( )Ω
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
APPLICATION INFORMATION
Capacitors
Input Capacitor (CIN)
A minimum value of 1 μF (over the entire operating temperature range) is required at the input of the LP2985. In
addition, this input capacitor should be located within 1 cm of the input pin and connected to a clean analog
ground. There are no equivalent series resistance (ESR) requirements for this capacitor, and the capacitance
can be increased without limit.
Output Capacitor (COUT)
As an advantage over other regulators, the LP2985 permits the use of low-ESR capacitors at the output,
including ceramic capacitors that can have an ESR as low as 5 mΩ. Tantalum and film capacitors also can be
used if size and cost are not issues. The output capacitor also should be located within 1 cm of the output pin
and be returned to a clean analog ground.
As with other PNP LDOs, stability conditions require the output capacitor to have a minimum capacitance and an
ESR that falls within a certain range.
•Minimum COUT: 2.2 μF (can be increased without limit to improve transient response stability margin)
•ESR range: see Figure 30 through Figure 32
Figure 30. 2.2-μF Stable ESR Range Figure 31. 4.7-μF Stable ESR Range
for Output Voltage ≤2.3 V for Output Voltage ≤2.3 V
Figure 32. 2.2-μF/3.3-μF Stable ESR Range
for Output Voltage ≥2.5 V
It is critical that both the minimum capacitance and ESR requirement be met over the entire operating
temperature range. Depending on the type of capacitors used, both these parameters can vary significantly with
temperature (see capacitor characteristics).
14 Copyright ©2004–2011, Texas Instruments Incorporated
VOUT
VIN
LP2985
www.ti.com
SLVS522N –JULY 2004–REVISED JUNE 2011
Noise Bypass Capacitor (CBYPASS)
The LP2985 allows for low-noise performance with the use of a bypass capacitor that is connected to the internal
bandgap reference via the BYPASS pin. This high-impedance bandgap circuitry is biased in the microampere
range and, thus, cannot be loaded significantly, otherwise, its output –and, correspondingly, the output of the
regulator –changes. Thus, for best output accuracy, dc leakage current through CBYPASS should be minimized as
much as possible and never should exceed 100 nA.
A 10-nF capacitor is recommended for CBYPASS. Ceramic and film capacitors are well suited for this purpose.
Capacitor Characteristics
Ceramics
Ceramic capacitors are ideal choices for use on the output of the LP2985 for several reasons. For capacitances
in the range of 2.2 μF to 4.7 μF, ceramic capacitors have the lowest cost and the lowest ESR, making them
choice candidates for filtering high-frequency noise. For instance, a typical 2.2-μF ceramic capacitor has an ESR
in the range of 10 mΩto 20 mΩand, thus, satisfies minimum ESR requirements of the regulator.
Ceramic capacitors have one major disadvantage that must be taken into account –a poor temperature
coefficient, where the capacitance can vary significantly with temperature. For instance, a large-value ceramic
capacitor (≥2.2 μF) can lose more than half of its capacitance as the temperature rises from 25°C to 85°C. Thus,
a 2.2-μF capacitor at 25°C drops well below the minimum COUT required for stability, as ambient temperature
rises. For this reason, select an output capacitor that maintains the minimum 2.2 μF required for stability over the
entire operating temperature range. Note that there are some ceramic capacitors that can maintain a ±15%
capacitance tolerance over temperature.
Tantalum
Tantalum capacitors can be used at the output of the LP2985, but there are significant disadvantages that could
prohibit their use:
•In the 1-μF to 4.7-μF range, tantalum capacitors are more expensive than ceramics of the equivalent
capacitance and voltage ratings.
•Tantalum capacitors have higher ESRs than their equivalent-sized ceramic counterparts. Thus, to meet the
ESR requirements, a higher-capacitance tantalum may be required, at the expense of larger size and higher
cost.
•The ESR of a tantalum capacitor increases as temperature drops, as much as double from 25°C to –40°C.
Thus, ESR margins must be maintained over the temperature range to prevent regulator instability.
ON/OFF Operation
The LP2985 allows for a shutdown mode via the ON/OFF pin. Driving the pin LOW (≤0.3 V) turns the device
OFF; conversely, a HIGH (≥1.6 V) turns the device ON. If the shutdown feature is not used, ON/OFF should be
connected to the input to ensure that the regulator is on at all times. For proper operation, do not leave ON/OFF
unconnected, and apply a signal with a slew rate of ≥40 mV/μs.
Reverse Input-Output Voltage
There is an inherent diode present across the PNP pass element of the LP2985.
With the anode connected to the output, this diode is reverse biased during normal operation, since the input
voltage is higher than the output. However, if the output is pulled higher than the input for any reason, this diode
Copyright ©2004–2011, Texas Instruments Incorporated 15
VOUT
VIN
Schottky
LP2985
LP2985
SLVS522N –JULY 2004–REVISED JUNE 2011
www.ti.com
is forward biased and can cause a parasitic silicon-controlled rectifier (SCR) to latch, resulting in high current
flowing from the output to the input. Thus, to prevent possible damage to the regulator in any application where
the output may be pulled above the input, an external Schottky diode should be connected between the output
and input. With the anode on output, this Schottky limits the reverse voltage across the output and input pins to
∼0.3 V, preventing the regulator’s internal diode from forward biasing.
16 Copyright ©2004–2011, Texas Instruments Incorporated