HT12A/HT12E
212 Series of Encoders
Selection Table
Function Address
No.
Address/
Data No.
Data
No. Oscillator Trigger Package Carrier
Output
Negative
Polarity
Part No.
HT12A 8 0 4 455kHz
resonator D8~D11 18 DIP
20 SOP 38kHz No
HT12E 8 4 0 RC
oscillator TE 18 DIP
20 SOP No No
Note: Address/Data represents pins that can be address or data according to the decoder require-
ment.
1 April 11, 2000
General Description
The 212 encoders are a series of CMOS LSIs for
remote control system applications. They are
capable of encoding information which consists
of N address bits and 12-N data bits. Each ad-
dress/data input can be set to one of the two
logic states. The programmed addresses/data
are transmitted together with the header bits
via an RF or an infrared transmission medium
upon receipt of a trigger signal. The capability
to select a TE trigger on the HT12E or a DATA
trigger on the HT12A further enhances the ap-
plication flexibility of the 212 series of encoders.
The HT12A additionally provides a 38kHz car-
rier for infrared systems.
Features
·Operating voltage
-2.4V~5V for the HT12A
-2.4V~12V for the HT12E
·Low power and high noise immunity CMOS
technology
·Low standby current: 0.1mA (typ.) at
VDD=5V
·HT12A with a 38kHz carrier for infrared
transmission medium
·Minimum transmission word
-Four words for the HT12E
-One word for the HT12A
·Built-in oscillator needs only 5% resistor
·Data code has positive polarity
·Minimal external components
·HT12A/E: 18-pin DIP/20-pin SOP package
Applications
·Burglar alarm system
·Smoke and fire alarm system
·Garage door controllers
·Car door controllers
·Car alarm system
·Security system
·Cordless telephones
·Other remote control systems
Block Diagram
TE trigger
HT12E
DATA trigger
HT12A
Note: The address data pins are available in various combinations (refer to the address/data table).
HT12A/HT12E
2 April 11, 2000
O s c illa to r ¸3 D ivider
OSC1OSC2
VDD VSS
12 Transm ission
G a te C irc u it
¸ 12 C ounter &
1 of 12 D ecoder
Binary D etector
TE
A0
A7
DOUT
D ata Select
& Buffer
Sync.
Circuit
AD8 AD11
O scillator ¸576 D ivider
VDD VSS
12 Transm ission
G a te C irc u it
¸ 12 C ounter &
1 of 12 D ecoder
Binary D etector
DOUT
D ata Select
& Buffer
Sync.
Circuit
L/M B
X2 X1
A0
A7
D8 D11
Pin Assignment
Pin Description
Pin Name I/O Internal
Connection Description
A0~A7 I
CMOS IN
Pull-high
(HT12A)
Input pins for address A0~A7 setting
These pins can be externally set to VSS or left open
NMOS
TRANSMISSION
GATE
PROTECTION
DIODE
(HT12E)
AD8~AD11 I
NMOS
TRANSMISSION
GATE
PROTECTION
DIODE
(HT12E)
Input pins for address/data AD8~AD11 setting
These pins can be externally set to VSS or left open
D8~D11 I CMOS IN
Pull-high
Input pins for data D8~D11 setting and transmission en-
able, active low
These pins should be externally set to VSS or left open
(see Note)
DOUT O CMOS OUT Encoder data serial transmission output
L/MB I CMOS IN
Pull-high
Latch/Momentary transmission format selection pin:
Latch: Floating or VDD
Momentary: VSS
HT12A/HT12E
3 April 11, 2000
8-A ddress
4-D ata
A0
A1
A2
A3
A4
A5
A6
A7
VSS
VDD
DOUT
X1
X2
L/M B
D11
D10
D9
D8
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
8-A ddress
4-D ata
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
VDD
DOUT
X1
X2
L/M B
D11
D10
D9
D8
NC
A0
A1
A2
A3
A4
A5
A6
A7
VSS
HT12A
18 D IP
HT12A
20 SO P
8-A ddress
4-A ddress/D ata
A0
A1
A2
A3
A4
A5
A6
A7
VSS
VDD
DOUT
OSC1
OSC2
TE
AD11
AD10
AD9
AD8
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
H T 1 2 E
1 8 D IP
8-A ddress
4-A ddress/D ata
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
NC
VDD
DOUT
OSC1
OSC2
TE
AD11
AD10
AD9
AD8
NC
A0
A1
A2
A3
A4
A5
A6
A7
VSS
H T 1 2 E
2 0 S O P
Pin Name I/O Internal
Connection Description
TE ICMOS IN
Pull-high Transmission enable, active low (see Note)
OSC1 I OSCILLATOR 1 Oscillator input pin
OSC2 O OSCILLATOR 1 Oscillator output pin
X1 I OSCILLATOR 2 455kHz resonator oscillator input
X2 O OSCILLATOR 2 455kHz resonator oscillator output
VSS I ¾Negative power supply, grounds
VDD I ¾Positive power supply
Note: D8~D11 are all data input and transmission enable pins of the HT12A.
TE is a transmission enable pin of the HT12E.
Approximate internal connections
Absolute Maximum Ratings
Supply Voltage (HT12A) ..............-0.3V to 5.5V Supply Voltage (HT12E) ...............-0.3V to 13V
Input Voltage....................VSS-0.3 to VDD+0.3V Storage Temperature.................-50°Cto125°C
Operating Temperature...............-20°Cto75°C
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maxi-
mum Ratings²may cause substantial damage to the device. Functional operation of this device
at other conditions beyond those listed in the specification is not implied and prolonged expo-
sure to extreme conditions may affect device reliability.
HT12A/HT12E
4 April 11, 2000
NMOS
TRANSM ISSION
GATE
CMOS IN
Pull-high CMOS OUT OSCILLATOR 1
OSC2
OSC1
OSCILLATOR 2
X1 X2
EN
NMOS TRANSMISSION GATE
PROTECTION DIODE
VDD
Electrical Characteristics
HT12A Ta=25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage ¾¾ 2.4 3 5 V
ISTB Standby Current 3V Oscillator stops ¾0.1 1 mA
5V ¾0.1 1 mA
IDD Operating Current 3V No load
fOSC=455kHz
¾200 400 mA
5V ¾400 800 mA
IDOUT Output Drive Current 5V
VOH=0.9VDD (Source) -1-1.6 ¾mA
VOL=0.1VDD (Sink) 2 3.2 ¾mA
VIH ²H²Input Voltage ¾¾
0.8VDD ¾VDD V
VIL ²L²Input Voltage ¾¾ 0¾0.2VDD V
RDATA D8~D11 Pull-high
Resistance 5V VDATA=0V ¾150 300 kW
HT12E Ta=25°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VDD Operating Voltage ¾¾ 2.4 5 12 V
ISTB Standby Current 3V Oscillator stops ¾0.1 1 mA
12V ¾24
mA
IDD Operating Current 3V No load
fOSC=3kHz
¾40 80 mA
12V ¾150 300 mA
IDOUT Output Drive Current 5V
VOH=0.9VDD (Source) -1-1.6 ¾mA
VOL=0.1VDD (Sink) 1 1.6 ¾mA
VIH ²H²Input Voltage ¾¾
0.8VDD ¾VDD V
VIL ²L²Input Voltage ¾¾ 0¾0.2VDD V
fOSC Oscillator Frequency 5V ROSC=1.1M
3¾kHz
RTE TE Pull-high Resistance 5V VTE=0V ¾1.5 3 MW
HT12A/HT12E
5 April 11, 2000
Functional Description
Operation
The 212 series of encoders begin a 4-word transmission cycle upon receipt of a transmission enable
(TE for the HT12E or D8~D11 for the HT12A, active low). This cycle will repeat itself as long as the
transmission enable (TE or D8~D11) is held low. Once the transmission enable returns high the en-
coder output completes its final cycle and then stops as shown below.
HT12A/HT12E
6 April 11, 2000
4 w ords 4 w ords
Encoder
DOUT
Transm itted
C ontinuously
< 1 w ord
TE
Transmission timing for the HT12E
Encoder
DOUT
T ra n s m itte d
C ontinuously
< 1 w ord
D8~D11
Key-in
1 w ord
w ith 38kH z carrier
1 w ord
Transmission timing for the HT12A (L/MB=Floating or VDD)
Encoder
DOUT
Transm itted
C ontinuously
D8~D11
Key-in
1 w o rd
< 1 w ord
7 w ords
1 w ord
7 w ords
(all data=1)
(all data=1)
Transmission timing for the HT12A (L/MB=VSS)
Information word
If L/MB=1 the device is in the latch mode (for use with the latch type of data decoders). When the trans-
mission enable is removed during a transmission, the DOUT pin outputs a complete word and then
stops. On the other hand, if L/MB=0 the device is in the momentary mode (for use with the momentary
type of data decoders). When the transmission enable is removed during a transmission, the DOUT
outputs a complete word and then adds 7 words all with the ²1²data code.
An information word consists of 4 periods as illustrated below.
Address/data waveform
Each programmable address/data pin can be externally set to one of the following two logic states as
shown below.
HT12A/HT12E
7 April 11, 2000
1/3 bit sync. period
pilot period (12 bits)
address code period period
data code
Composition of information
"O n e "
"Zero"
f
OSC
Address/
Data Bit
Address/Data bit waveform for the HT12E
"O n e "
"Zero"
fOSC
Data Bit
Data Bit
"O n e "
"Zero"
Address B it
Address B it
38kH z
carrier
Address/Data bit waveform for the HT12A
The address/data bits of the HT12A are transmitted with a 38kHz carrier for infrared remote con-
troller flexibility.
Address/data programming (preset)
The status of each address/data pin can be individually pre-set to logic ²high²or ²low². If a transmis-
sion-enable signal is applied, the encoder scans and transmits the status of the 12 bits of ad-
dress/data serially in the order A0 to AD11 for the HT12E encoder and A0 to D11 for the HT12A
encoder.
During information transmission these bits are transmitted with a preceding synchronization bit. If
the trigger signal is not applied, the chip enters the standby mode and consumes a reduced current of
less than 1mA for a supply voltage of 5V.
Usual applications preset the address pins with individual security codes using DIP switches or PCB
wiring, while the data is selected by push buttons or electronic switches.
The following figure shows an application using the HT12E:
The transmitted information is as shown:
Pilot
&
Sync.
A0
1
A1
0
A2
1
A3
0
A4
0
A5
0
A6
1
A7
1
AD8
1
AD9
1
AD10
1
AD11
0
HT12A/HT12E
8 April 11, 2000
TE
VDD A0 A1 A2 A3 A4 A5 A6 A7 VSS AD8 AD9 AD10 AD11
OSC1 OSC2
DOUT Transm ission
m edium
VDD
VSS
Address/Data sequence
The following provides the address/data sequence table for various models of the 212 series of
encoders. The correct device should be selected according to the individual address and data require-
ments.
Part No. Address/Data Bits
01234567891011
HT12A A0 A1 A2 A3 A4 A5 A6 A7 D8 D9 D10 D11
HT12E A0 A1 A2 A3 A4 A5 A6 A7 AD8 AD9 AD10 AD11
Transmission enable
For the HT12E encoders, transmission is enabled by applying a low signal to the TE pin. For the
HT12A encoders, transmission is enabled by applying a low signal to one of the data pins D8~D11.
Two erroneous HT12E application circuits
The HT12E must follow closely the application circuits provided by Holtek (see the ²Application cir-
cuits²).
·Error: AD8~AD11 pins input voltage > VDD+0.3V
HT12A/HT12E
9 April 11, 2000
H T12E
OSC2
OSC1
TE
VSS
VDD
AD11
AD10
AD9
AD8
12V
·Error: The IC¢s power source is activated by pins AD8~AD11
Flowchart
·HT12A ·HT12E
Note: D8~D11 are transmission enables of the HT12A.
TE is the transmission enable of the HT12E.
HT12A/HT12E
10 April 11, 2000
HT12E
OSC2
OSC1
VSS
TE
VDD
12V
AD11
AD10
AD9
AD8
Standby m ode
D ata enable?
No
No
D a ta w ith c a rrie r
serial output
D ata still enabled ?
L/M B=G N D ?
Send the
la s t c o d e
No
Yes
Yes
Yes
Send
²1² 7 tim e s fo r
all of the data codes
Power on
Standby m ode
Transm ission
enabled ?
No
No
Yes
Yes
4 data w ords
transm itted
Transm ission
s till enabled
4 data w ords
transm itted
continuously
Power on
Oscillator frequency vs supply voltage
The recommended oscillator frequency is fOSCD (decoder) @50 fOSCE (HT12E encoder)
@1
3fOSCE (HT12A encoder)
HT12A/HT12E
11 April 11, 2000
2 3 4 5 6 7 8 9 10 11 12 13
1.00
2.00
(3kH z)3.00
4.00
5.00
6.00
7.00
V
DD
(V D C )
f
OSC
(Scale)
2.0M
1.5M
1.2M
1.0M
910k
820k
750k
680k
620k
560k
510k
470k
R
OSC
(
W
)
Application Circuits
HT12A/HT12E
12 April 11, 2000
455K
0 6 )
1 0 M 9
100pF
100pF
8 0 5 0
100
9
1
2
3
4
5
6
7
8
9
A 0
A 4
A 5
A 6
A 7
VSS
A 1
A 2
A 3
V D D
D O U T
X 1
X 2
L / M B
D 1 1
D 1 0
D 9
D 8
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
1 0 k
9
V
D D
T r a n s m i t t e r C i r c u i t
0 6 -
A 0
A 1
A 2
A 3
A 4
A 5
A 6
A 7
V S S
V D D
D O U T
O S C 1
O S C 2
T E
A D 1 1
A D 1 0
A D 9
A D 8
1
2
3
4
5
6
7
8
9
1 8
1 7
1 6
1 5
1 4
1 3
1 2
1 1
1 0
R
O S C
V
D D
HT12A/HT12E
13 April 11, 2000
Copyright Ó2000 by HOLTEK SEMICONDUCTOR INC.
The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek
assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are
used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications
will be suitable without further modification, nor recommends the use of its products for application that may pres-
ent a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior
notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
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Tel: 886-2-2782-9635
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