TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G – JUNE 1983 – REVISED MARCH 2001
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
A-Suffix Versions Offer 5-mV VIO
D
B-Suffix Versions Offer 2-mV VIO
D
Wide Range of Supply Voltages
1.4 V to 16 V
D
True Single-Supply Operation
D
Common-Mode Input Voltage Includes the
Negative Rail
D
Low Noise . . . 25 nV/Hz Typ at f = 1 kHz
(High-Bias Version)
description
The TLC254, TLC254A, TLC254B, TLC25L4,
TLC254L4A, TLC254L4B, TLC25M4, TLC25M4A
and TL25M4B are low-cost, low-power quad
operational amplifiers designed to operate with
single or dual supplies. These devices utilize the
Texas Instruments silicon gate LinCMOS
process, giving them stable input-offset voltages that are available in selected grades of 2, 5, or 10 mV
maximum, very high input impedances, and extremely low input offset and bias currents. Because the input
common-mode range extends to the negative rail and the power consumption is extremely low, this series is
ideally suited for battery-powered or energy-conserving applications. The series offers operation down to a
1.4-V supply, is stable at unity gain, and has excellent noise characteristics.
These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures
at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.1. However , care should be exercised
in handling these devices as exposure to ESD may result in degradation of the device parametric performance.
Because of the extremely high input impedance and low input bias and offset currents, applications for these
devices include many areas that have previously been limited to BIFET and NFET product types. Any circuit
using high-impedance elements and requiring small offset errors is a good candidate for cost-ef fective use of
these devices. Many features associated with bipolar technology are available with LinCMOS operational
amplifiers without the power penalties of traditional bipolar devices.
A vailable options
VIOmax
PACKAGED DEVICES
CHIP FORM
TA
V
IO
max
AT 25°CSMALL OUTLINE
(D) PLASTIC DIP
(N) TSSOP
(PW)
CHIP
FORM
(Y)
10 mV TLC254CD TLC254CN TLC254CPW TLC254Y
5 mV TLC254ACD TLC254ACN
2 mV TLC254BCD TLC254BCN
10 mV TLC25L4CD TLC25L4CN TLC25L4CPW TLC25L4Y
0°C to 70°C5 mV TLC25L4ACD TLC25L4ACN
2 mV TLC25L2BCD TLC25L4BCN
10 mV TLC25M4CD TLC25M4CN TLC25M4CPW TLC25M4Y
5 mV TLC25M4ACD TLC25M4ACN
2 mV TLC25M4BCD TLC25M4BCN
The D package is available taped and reeled. Add the suf fix R to the device type (e.g., TLC254CDR). Chips
are tested at 25°C.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LinCMOS is a trademark of Texas Instruments.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN
1IN+
VDD
2IN+
2IN
2OUT
4OUT
4IN
4IN+
VDD/GND
3IN+
2IN
3OUT
D, N, OR PW PACKAGE
(TOP VIEW)
symbol (each amplifier)
+
OUT
IN+
IN
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
General applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and
signal buffering are all easily designed with these devices. Remote and inaccessible equipment applications
are possible using their low-voltage and low-power capabilities. These devices are well suited to solve the
difficult problems associated with single-battery and solar-cell-powered applications. This series includes
devices that are characterized for the commercial temperature range and are available in 14-pin plastic dip and
the small-outline packages. The device is also available in chip form.
These devices are characterized for operation from 0°C to 70°C.
DEVICE FEATURES
PARAMETER TLC25L4_C
(LOW BIAS) TLC25M4_C
(MEDIUM BIAS) TLC254_C
(HIGH BIAS)
Supply current (Typ) 40 µA 600 µA 4000 µA
Slew rate (Typ) 0.04 V/µA0.6 V/µA4.5 V/µA
Input offset voltage (Max)
TLC254C, TLC25L4C, TLC25M4C
TLC254AC, TLC25L4AC, TLC25M4AC
TLC254BC, TLC25L4BC, TLC25M4BC
10 mV
5 mV
2 mV
10 mV
5 mV
2 mV
10 mV
5 mV
2 mV
Offset voltage drift (Typ) 0.1 µV/month0.1 µV/month0.1 µV/month
Offset voltage temperature coef ficient (Typ) 0.7 µV/°C 2 µV/°C 5 µV/°C
Input bias current (Typ) 1 pA 1 pA 1 pA
Input of fset current (Typ) 1 pA 1 pA 1 pA
The long-term drift value applies after the first month.
equivalent schematic (each amplifier)
VDD
IN+
IN
VDD/GND
OUT
ESD-
Protective
Network
ESD-
Protective
Network
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
chip information
These chips, when properly assembled, display characteristics similar to the TLC25_4C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
1OUT
1IN+
1IN
VDD
(4)
(6)
(3)
(2)
(5)
(1)
+
(7) 2IN+
2IN
2OUT
(11)
VDD/GND
+
3OUT
3IN+
3IN
(13)
(10)
(9)
(12)
(8)
+
(14)
4OUT 4IN+
4IN
BONDING PAD ASSIGNMENTS
68
108
(14) (13) (12) (11) (10) (9) (8)
(7)
(6)(5)(5)(4)(3)(2)(1)
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage (see Note 2) ±18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range (any input) 0.3 V to 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit at (or below) 25°C free-air temperature (see Note 3) unlimited. . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to VDD/GND.
2. Differential voltages are at IN+, with respect to IN.
3. The output may be shorted to either supply . T emperature and/or supply voltages must be limited to ensure the maximum dissipation
rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
T
A
25°CDERATING F ACTOR T
A
= 70°C
PACKAGE
A
POWER RATING ABOVE TA = 25°C
A
POWER RATING
D725 mW 5.8 mW/°C464 mW
N1050 mW 9.2 mW/°C 736 mW
PW 700 mW 5.6 mW/°C448 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage, VDD 1.4 16 V
VDD = 1.4 V 0 0.2
Common mode in
p
ut voltage VIC
VDD = 5 V 0.2 4
V
Common
-
mode
input
voltage
,
V
IC VDD = 10 V 0.2 9
V
VDD = 16 V 0.2 14
Operating free-air temperature, TA0 70 °C
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
TM
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
electrical characteristics at specified free-air temperature, VDD = 1.4 V (unless otherwise noted)
TEST CONDITIONS
T
TLC254_C TLC25L4_C TLC25M4_C
UNIT
TEST
CONDITIONS
T
AMIN TYP MAX MIN TYP MAX MIN TYP MAX
UNIT
TLC25 4C
25°C 10 10 10
TLC25
_
4C
0°C to 70°C 12 12 12
VIO
In
p
ut offset voltage
TLC25 4AC
VO=02V
RS=50
25°C 5 5 5
mV
V
IO
Input
offset
voltage
TLC25
_
4AC
V
O =
0
.
2
V
,
R
S =
50
0°C to 70°C 6.5 6.5 6.5
mV
TLC25 4BC
25°C 2 2 2
TLC25
_
4BC
0°C to 70°C 3 3 3
aVIO
Avera
g
e temperature coefficient of
25
°
Cto70
°
C
1
1
1
µV/
°
C
a
VIO
g
input offset voltage
25°C
to
70°C
1
1
1
µ
V/°C
IIO
In
p
ut offset current
VO=02V
25°C 1 60 1 60 1 60 p
A
I
IO
Input
offset
current
V
O =
0
.
2
V
0°C to 70°C 300 300 300
pA
IIB
In
p
ut bias current
VO=02V
25°C 1 60 1 60 1 60 p
A
I
IB
Input
bias
current
V
O =
0
.
2
V
0°C to 70°C 600 600 600
pA
VICR Common-mode input voltage range 25°C0 to
0.2 0 to
0.2 0 to
0.2 V
VOM Peak output voltage swingVID = 100 mV 25°C 450 700 450 700 450 700 mV
AVD Large-signal differential voltage
amplification VO = 100 to 300 mV,
RS = 50 25°C 10 20 20 V/mV
CMRR Common-mode rejection ratio VO = 0.2 V,
VIC = VICRmin 25°C 60 77 60 77 60 77 dB
IDD Supply current VO = 0.2 V, No load 25°C 600 750 50 68 400 500 µA
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Unless otherwise noted, an output load resistor is
connected from the output to ground and has the following value: for low bias, RL = 1 M, for medium bias RL = 100 kΩ, and for high bias RL = 10 kΩ.
The output swings to the potential of VDD/GND.
operating characteristics, VDD = 1.4 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TLC254_C TLC25L4_C TLC25M4_C
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNIT
SR Slew rate at unity gain See Figure 1 0.1 0.001 0.01 V/µs
B1Unity-gain bandwidth AV = 40 dB,
RS = 50 ,CL = 10 pF,
See Figure 1 12 12 12 kHz
Overshoot factor See Figure 1 30% 35% 35%
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS T
A
TLC254, TLC254AC,
TLC254BC UNIT
A
MIN TYP MAX
TLC254C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC254C
O,
RS = 50 ,
IC ,
RL = 10 kFull range 12
VIO
In
p
ut offset voltage
TLC254AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC254AC
O,
RS = 50 ,
IC ,
RL = 10 kFull range 6.5
mV
TLC254BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.34 2
TLC254BC
O,
RS = 50 ,
IC ,
RL = 10 kFull range 3
αVIO
Avera
g
e temperature coefficient of input 25°C to
18
µV/°C
αVIO
g
offset voltage 70°C
1
.
8
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 40 600
pA
VICR
Common-mode input volta
g
e ran
g
e25°C0.2
to
4
0.3
to
4.2
V
V
ICR
gg
(see Note 5) Full range 0.2
to
3.5
V
0°C 3 3.8
VOH High-level output voltage VID = 100 mV, RL = 10 k25°C 3.2 3.8 V
70°C 3 3.8
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 4 27
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 10 k25°C 5 23 V/mV
am lification
70°C 4 20
0°C 60 84
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 80 dB
70°C 60 85
0°C 60 94
kSVR Supply-voltage rejection ratio (VDD/VIO)V
DD = 5 V to 10 V, VO = 1.4 V 25°C65 95 dB
70°C 60 96
V25V
V25V
0°C 3.1 7.2
IDD Supply current (four amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,25°C2.7 6.4 mA
No
load
70°C 2.3 5.2
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS T
A
TLC254C, TLC254AC,
TLC254BC UNIT
A
MIN TYP MAX
TLC254C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC254C
O,
RS = 50 ,
IC ,
RL = 10 kFull range 12
VIO
In
p
ut offset voltage
TLC254AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC254AC
O,
RS = 50 ,
IC ,
RL = 10 kFull range 6.5
mV
TLC254BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.39 2
TLC254BC
O,
RS = 50 ,
IC ,
RL = 10 kFull range 3
VIO
Avera
g
e temperature coefficient of input 25°C to
2
µV/°C
VIO
g
offset voltage 70°C
2
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 50 600
pA
VICR
Common-mode input volta
g
e ran
g
e 25°C0.2
to
9
0.3
to
9.2
V
V
ICR
gg
(see Note 5) Full range 0.2
to
8.5
V
0°C 7.8 8.5
VOH High-level output voltage VID = 100 mV, RL = 10 k25°C8 8.5 V
70°C 7.8 8.4
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 7.5 42
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 10 k25°C10 36 V/mV
am lification
70°C 7.5 32
0°C 60 88
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 85 dB
70°C 60 88
S l lt j ti ti
0°C 60 94
kSVR Supply-voltage rejection ratio
(VDD/VIO)
VDD = 5 V to 10 V, VO = 1.4 V 25°C65 95 dB
(VDD/VIO)
70°C 60 96
V5V
V5V
0°C 4.5 8.8
IDD Supply current (four amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
,25°C3.8 8 mA
No
load
70°C 3.2 6.8
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS T
A
TLC254C, TLC254AC,
TLC254BC UNIT
A
MIN TYP MAX
VI(PP) =1V
0°C 4
V
I(PP) =
1
V
25°C 3.6
SR
Slew rate at unity gain
R
L
= 10 kΩ, C
L
= 20 pF, VI(PP) = 1 V 70°C 3
V/µs
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 3.1
V/
µ
s
VI
(
PP
)
= 2.5 V 25°C 2.9
()
70°C 2.5
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 25 nV/Hz
VV
C20F
R10k
0°C 340
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 10 kΩ, 25°C320 kHz
See
Figure
1
70°C 260
0°C 2
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C1.7 MHz
70°C 1.3
V10mV
fB
C20pF
0°C 47°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C46°
See
Figure
3
70°C 43°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS T
A
TLC254C, TLC254AC,
TLC254BC UNIT
A
MIN TYP MAX
0°C 5.9
VI
(
PP
)
= 1 V 25°C 5.3
SR
Slew rate at unity gain
R
L
= 10 kΩ, C
L
= 20 pF,
()
70°C 4.3
V/µs
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 5.1
V/
µ
s
VI
(
PP
)
= 5.5 V 25°C 4.6
()
70°C 3.8
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 25 nV/Hz
VV
C20F
R10k
0°C 220
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 10 kΩ, 25°C200 kHz
See
Figure
1
70°C 140
0°C 2.5
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C2.2 MHz
70°C 1.8
V10mV
fB
C20pF
0°C 50°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C49°
See
Figure
3
70°C 46°
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
TLC25L4C
TLC25L4AC
TLC25L4BC UNIT
MIN TYP MAX
TLC25L4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC25L4C
O,
RS = 50 ,
IC ,
RL = 1 MFull range 12
VIO
In
p
ut offset voltage
TLC25L4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC25L4AC
O,
RS = 50 ,
IC ,
RL = 1 MFull range 6.5
mV
TLC25L4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.24 2
TLC25L4BC
O,
RS = 50 ,
IC ,
RL = 1 MFull range 3
VIO
Avera
g
e temperature coefficient of input 25°C to
11
µV/°C
VIO
g
offset voltage 70°C
1
.
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 40 600
pA
VICR
Common-mode input volta
g
e ran
g
e 25°C0.2
to
4
0.3
to
4.2 V
V
ICR
gg
(see Note 5) Full range 0.2
to
3.5 V
0°C 3 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 M25°C3.2 4.1 V
70°C 3 4.2
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 50 680
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 1 M25°C 50 520 V/mV
am lification
70°C 50 380
0°C 60 95
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 94 dB
70°C 60 95
S l lt j ti ti
0°C 60 97
kSVR Supply-voltage rejection ratio
(VDD/VIO)
VDD = 5 V to 10 V, VO = 1.4 V 25°C70 98 dB
(VDD/VIO)
70°C 60 97
V25V
V25V
0°C 48 84
IDD Supply current (four amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,25°C40 68 µA
No
load
70°C 31 56
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
TLC25L4C
TLC25L4AC
TLC25L4BC UNIT
MIN TYP MAX
TLC25L4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC25L4C
O,
RS = 50 ,
IC ,
RL = 1 MFull range 12
VIO
In
p
ut offset voltage
TLC25L4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC25L4AC
O,
RS = 50 ,
IC ,
RL = 1 MFull range 6.5
mV
TLC25L4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.26 2
TLC25L4BC
O,
RS = 50 ,
IC ,
RL = 1 MFull range 3
αVIO
Avera
g
e temperature coefficient of 25°C to
1
µV/°C
αVIO
g
input offset voltage 70°C
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =.
5
V
70°C 50 600
pA
VICR
Common-mode input volta
g
e ran
g
e (see 25°C0.2
to
9
0.3
to
9.2 V
V
ICR
gg(
Note 5) Full range 0.2
to
8.5 V
0°C 7.8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 M25°C8 8.9 V
70°C 7.8 8.9
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C 0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 50 1025
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 M25°C50 870 V/mV
am lification
70°C 50 660
0°C 60 97
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 97 dB
70°C 60 97
S l lt j ti ti
0°C 60 97
kSVR Supply-voltage rejection ratio
(VDD/VIO)
VDD = 5 V to 10 V, VO = 1.4 V 25°C70 97 dB
(VDD/VIO)
70°C 60 98
V5V
V5V
0°C 72 132
IDD Supply current (four amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
,25°C57 92 µA
No
load
70°C 44 80
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC25L4C
TLC25L4AC
TLC25L4BC UNIT
MIN TYP MAX
0°C 0.04
VI
(
PP
)
= 1 V 25°C 0.03
SR
Slew rate at unity gain
R
L
= 1 MΩ, C
L
= 20 pF,
()
70°C 0.03
V/µs
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 0.03
V/
µ
s
VI
(
PP
)
= 2.5 V 25°C 0.03
()
70°C 0.02
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 70 nV/Hz
VV
C20F
R1M
0°C 6
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 1 MΩ, 25°C5kHz
See
Figure
1
70°C 4.5
0°C 100
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C85 kHz
70°C 65
V10mV
fB
C20pF
0°C 36°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C34°
See
Figure
3
70°C 30°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC25L4C
TLC25L4AC
TLC25L4BC UNIT
MIN TYP MAX
0°C 0.05
VI
(
PP
)
= 1 V 25°C 0.05
SR
Slew rate at unity gain
R
L
= 1 MΩ, C
L
= 20 pF,
()
70°C 0.04
V/µs
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 0.05
V/
µ
s
VI(PP) = 5.5 V 25°C 0.04
()
70°C 0.04
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 70 nV/Hz
VV
C20F
R1M
0°C 1.3
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 1 MΩ, 25°C1kHz
See
Figure
1
70°C 0.9
0°C 125
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C110 kHz
70°C 90
V10mV
fB
C20pF
0°C 40°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C38°
See
Figure
3
70°C 34°
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
12 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
TLC25M4C
TLC25M4AC
TLC25M4BC UNIT
MIN TYP MAX
TLC25M4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC25M4C
O,
RS = 50 ,
IC ,
RL = 100 kFull range 12
VIO
In
p
ut offset voltage
TLC25M4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC25M4AC
O,
RS = 50 ,
IC ,
RL = 100 kFull range 6.5
mV
TLC25M4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.25 2
TLC25M4BC
O,
RS = 50 ,
IC ,
RL = 100 kFull range 3
VIO
Avera
g
e temperature coefficient of 25°C to
17
µV/°C
VIO
g
input offset voltage 70°C
1
.
7
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 40 600
pA
VICR
Common-mode input volta
g
e ran
g
e25°C0.2
t0
4
0.3
to
4.2 V
V
ICR
gg
(see Note 5) Full range 0.2
to
3.5 V
0°C 3 3.9
VOH High-level output voltage VID = 100 mV, RL = 100 k25°C3.2 3.9 V
70°C 3 4
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C 0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 15 200
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 100 k25°C25 170 V/mV
am lification
70°C 15 140
0°C 60 91
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 91 dB
70°C 60 92
S l lt j ti ti
0°C 60 92
kSVR Supply-voltage rejection ratio
(VDD/VIO)
VDD = 5 V to 10 V, VO = 1.4 V 25°C70 93 dB
(VDD/VIO)
70°C 60 94
V25V
V25V
0°C 500 1280
IDD Supply current (four amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,25°C420 1120 µA
No
load
70°C 340 880
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
TLC25M4C
TLC25M4AC
TLC25M4BC UNIT
MIN TYP MAX
TLC25M4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC25M4C
O,
RS = 50 ,
IC ,
RL = 100 kFull range 12
VIO
In
p
ut offset voltage
TLC25M4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
V
IO
Input
offset
voltage
TLC25M4AC
O,
RS = 50 ,
IC ,
RL = 100 kFull range 6.5
mV
TLC25M4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.26 2
TLC25M4BC
O,
RS = 50 ,
IC ,
RL = 100 kFull range 3
αVIO
Avera
g
e temperature coefficient of input 25°C to
21
µV/°C
αVIO
g
offset voltage 70°C
2
.
1
µ
V/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 60 p
A
I
IO
Input
offset
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 7 300
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 60 p
A
I
IB
Input
bias
current
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 50 600
pA
VICR
Common-mode input volta
g
e ran
g
e (see 25°C0.2
to
9
0.3
to
9.2 V
V
ICR
gg(
Note 5) Full range 0.2
to
8.5 V
0°C 7.8 8.7
VOH High-level output voltage VID = 100 mV, RL = 100 k25°C8 8.7 V
70°C 7.8 8.7
0°C 0 50
VOL Low-level output voltage VID = 100 mV, IOL = 0 25°C 0 50 mV
70°C 0 50
L i l diff ti l lt
0°C 15 320
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 100 k25°C25 275 V/mV
am lification
70°C 15 230
0°C 60 94
CMRR Common-mode rejection ratio VIC = VICRmin 25°C 65 94 dB
70°C 60 94
0°C 60 92
kSVR Supply-voltage rejection ratio (VDD/VIO)V
DD = 5 V to 10 V, VO = 1.4 V 25°C70 93 dB
70°C 60 94
V5V
V5V
0°C 690 1600
IDD Supply current (four amplifiers)
V
O =
5
V
,
No load
V
IC =
5
V
,25°C570 1200 µA
No
load
70°C 440 1120
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC25M4C
TLC25M4AC
TLC25M4BC UNIT
MIN TYP MAX
V1V
0°C 0.46 V/µs
VI(PP) = 1 V 25°C 0.43 V/µs
SR
Slew rate at unity gain
R
L
= 100 kΩ, C
L
= 20 pF, 70°C 0.36
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 0.43
V/µs
VI
(
PP
)
= 2.5 V 25°C 0.40
V/
µ
s
()
70°C 0.34
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 32 nV/Hz
VV
C20F
R 100 k
0°C 60
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 100 kΩ, 25°C55 kHz
See
Figure
1
70°C 50
0°C 610
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C525 kHz
70°C 400
V10mV
fB
C20pF
0°C 41°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C40°
See
Figure
3
70°C 39°
operating characteristics, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC25M4C
TLC25M4AC
TLC25M4BC UNIT
MIN TYP MAX
0°C 0.67
VI
(
PP
)
= 1 V 25°C 0.62
SR
Slew rate at unity gain
R
L
= 100 kΩ, C
L
= 20 pF,
()
70°C 0.51
V/µs
SR
Slew
rate
at
unity
gain
L,
See Figure 1
L,
0°C 0.61
V/
µ
s
VI(PP) = 5.5 V 25°C 0.56
()
70°C 0.46
VnEquivalent input noise voltage f = 1 kHz, RS = 20 ,See Figure 2 25°C 32 nV/Hz
VV
C20F
R 100 k
0°C 40
BOM Maximum output-swing bandwidth VO = VOH,
See Figure 1
CL = 20 pF, RL = 100 kΩ, 25°C35 kHz
See
Figure
1
70°C 30
0°C 710
B1Unity-gain bandwidth VI = 10 mV, CL = 20 pF, See Figure 1 25°C635 kHz
70°C 510
V10mV
fB
C20pF
0°C 44°
φmPhase margin
V
I =
10
m
V
,
See Figure 3
f
=
B
1,
C
L =
20
p
F
,25°C43°
See
Figure
3
70°C 42°
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
TEST TLC254Y TLC25L4Y TLC25M4Y
UNIT
PARAMETER
CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNIT
VIO Input of fset voltage
VO = 1.4 V,
VIC = 0 V,
RS = 50 ,
See Note 6
1.1 10 1.1 10 1.1 10 mV
αVIO Average temperature
coefficient of input
offset voltage 1.8 1.1 1.7 µV/°C
IIO Input offset current
(see Note 4) VO = VDD/2,
VIC = VDD/2 0.1 60 0.1 60 0.1 60 pA
IIB Input bias current
(see Note 4) VO = VDD/2,
VIC = VDD/2 0.6 60 0.6 60 0.6 60 pA
VICR Common-mode input
voltage range
(see Note 5)
0.2
to
4
0.3
to
4.2
0.2
to
4
0.3
to
4.2
0.2
to
4
0.3
to
4.2 V
VOH High-level output
voltage VID = 100 mV,
RL = 100 k3.2 3.8 3.2 4.1 3.2 3.9 V
VOL Low-level output voltage VID = 100 mV,
IOL = 0 0 50 0 50 0 50 mV
AVD Large-signal differential
voltage amplification VO = 0.25 V,
See Note 6 5 23 50 520 25 170 V/mV
CMRR Common-mode rejection
ratio VIC = VICRmin 65 80 65 94 65 91 dB
kSVR Supply-voltage rejection
ratio (VDD/VIO)VDD = 5 V to 10 V,
VO = 1.4 V 65 95 70 97 70 93 dB
IDD Supply current VO = VDD/2,
VIC = VDD/2,
No load 2.7 6.4 0.04 0.068 0.42 1.12 mA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6. For low-bias mode, RL = 1 M, for medium-bias mode, RL = 100 k, and for high-bias mode, RL = 10 kΩ.
operating characteristics, VDD = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TLC254Y TLC25L4Y TLC25M4Y
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
UNIT
SR
Slew rate at C
L
= 20 pF, VI(PP) = 1 V 3.6 0.03 0.43
V/µs
SR
unity gain
L,
See Note 6 VI(PP) = 2.5 V 2.9 0.03 0.40
V/
µ
s
VnEquivalent
input noise
voltage f = 1 kHz, RS = 20 2.5 70 32 nV/Hz
BOM Maximum
output-swing
bandwidth
VO = VOH,
RL = 10 kCL = 20 pF, 320 5 55 kHz
B1Unity-gain
bandwidth VI = 10 mV, CL = 20 pF 1.7 0.085 0.525 MHz
φmPhase margin f = B1,
CL = 20 pF VI = 10 mV, 46°34°40°
NOTE 6: For low-bias mode, RL = 1 M, for medium-bias mode, RL = 100 k, and for high-bias mode, RL = 10 kΩ.
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
16 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC25_4, TLC25_4A, and TLC25_4B are optimized for single-supply operation, circuit
configurations used for the various tests often present some inconvenience since the input signal, in many
cases, must be offset from ground. This inconvenience can be avoided by testing the device with split supplies
and the output load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is
shown below. The use of either circuit gives the same result.
+
+
VDD
VI
CLRL
VO
VDD+
VDD
VIVO
CLRL
(a) SINGLE-SUPPLY (b) SPLIT-SUPPLY
Figure 1. Unity-Gain Amplifier
+
+
1/2 VDD
VDD
20
20
2 k
VDD
VOVO
20 20
(a) SINGLE-SUPPLY
2 k
VDD+
(b) SPLIT-SUPPLY
Figure 2. Noise-Test Circuit
+
+
10 k
1/2 VDD
100
VO
VDD
VIVI100
(a) SINGLE-SUPPLY (b) SPLIT-SUPPLY
10 k
VDD+
VDD
CLCL
VO
Figure 3. Gain-of-100 Inverting Amplifier
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
IDD
Su
pp
ly current
vs Suppl
y
volta
g
e 4
I
DD
Supply
current
yg
vs Free-air temperature 5
Low bias vs Frequency 6
AVD Large-signal differential voltage amplification Medium bias vs Frequency 7
High bias vs Frequency 8
Low bias vs Frequency 6
Phase shift Medium bias vs Frequency 7
High bias vs Frequency 8
Figure 4
100
0024681012
1000
10000
14 16
10
ICC Supply Current xA
DD
IAµ
18 20
VDD Supply Voltage V
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
VO = VIC = 0.2 VDD
No Load
TA = 25°C
High-Bias Versions
Medium-Bias Versions
Low-Bias Versions
Figure 5
100
00 102030405060
1000
10000
70 80
10
ICC Supply Current xA
DD
IAµ
TA Free-Air Temperature °C
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
VDD = 10 V
VIC = 0
VO = 2 V
No Load
High-Bias Versions
Medium-Bias Versions
Low-Bias Versions
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
18 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
0.1 1 10 100 10 k 100 k
Phase Shift
0°
30°
60°
90°
120°
150°
106
105
104
103
102
101
1
AVD (left scale)
Phase Shift
(right scale)
107
0.1
VDD = 10 V
RL = 1 M
TA = 25°C
180°
LOW-BIAS LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Frequency Hz
1 k
AVD Low-Bias Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 6
1 10 100 1 k 10 k 100 k 1 M
Frequency Hz
Phase Shift
0°
30°
60°
90°
120°
150°
106
105
104
103
102
101
1
AVD (left scale)
Phase Shift
(right scale)
107
0.1
VDD = 10 V
RL = 100 k
TA = 25°C
180°
MEDIUM-BIAS LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
AVD Medium-Bias Large-Signal Differential
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 7
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Phase Shift
0°
30°
60°
90°
120°
150°
106
105
104
103
102
101
1
AVD (left scale)
Phase Shift (right scale)
107
0.1
VDD = 10 V
RL = 10 k
TA = 25°C
180°
HIGH-BIAS LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
10 100 1 k 10 k 100 k 1 M 10 M
Frequency Hz
AVD High-Bias Large-Signal Differential
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 8
TLC254, TLC254A, TLC254B, TLC254Y, TLC25L4, TLC25L4A, TLC25L4B
TLC25L4Y, TLC25M4, TLC25M4A, TLC25M4B, TLC25M4Y
LinCMOS QUAD OPERATIONAL AMPLIFIERS
SLOS003G JUNE 1983 REVISED MARCH 2001
20 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
latch-up avoidance
Junction-isolated CMOS circuits have an inherent parasitic PNPN structure that can function as an SCR. Under
certain conditions, this SCR may be triggered into a low-impedance state, resulting in excessive supply current.
To avoid such conditions, no voltage greater than 0.3 V beyond the supply rails should be applied to any pin.
In general, the operational amplifiers supplies should be established simultaneously with, or before, application
of any input signals.
output stage considerations
The amplifiers output stage consists of a source-follower-connected pullup transistor and an open-drain
pulldown transistor. The high-level output voltage (VOH) is virtually independent of the IDD selection and
increases with higher values of VDD and reduced output loading. The low-level output voltage (VOL) decreases
with reduced output current and higher input common-mode voltage. With no load, VOL is essentially equal to
the potential of VDD/GND.
supply configurations
Even though the TLC25_4C series is are characterized for single-supply operation, they can be used effectively
in a split-supply configuration if the input common-mode voltage (VICR), output swing (VOL and VOH), and supply
voltage limits are not exceeded.
circuit layout precautions
Whenever extremely high circuit impedances are used, care must be exercised in layout, construction, board
cleanliness, and supply filtering to avoid hum and noise pickup as well as excessive dc leakages.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC254ACD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254ACDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC254ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC254BCD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254BCDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254BCN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC254BCNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC254CD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254CDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC254CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC254CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25L4ACN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25L4ACNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25L4BCD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25L4BCDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25L4BCN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25L4BCNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25L4CD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25L4CDB OBSOLETE SSOP DB 14 TBD Call TI Call TI
TLC25L4CDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25L4CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TLC25L4CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25M4ACDR PREVIEW SOIC D 14 TBD Call TI Call TI
TLC25M4ACN OBSOLETE PDIP N 14 TBD Call TI Call TI
TLC25M4BCD OBSOLETE SOIC D 14 TBD Call TI Call TI
TLC25M4BCN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25M4BCNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25M4CD ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25M4CDG4 ACTIVE SOIC D 14 50 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC25M4CN ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TLC25M4CNE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2011
Addendum-Page 3
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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