1
TM
Ordering Information
PART NUMBER TEMPERATURE RANGE SCREENING LEVEL PACKAGE
HCTS85DMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead SBDIP
HCTS85KMSR -55oC to +125oC Intersil Class S Equivalent 16 Lead Ceramic Flatpack
HCTS85D/Sample +25oC Sa mp le 16 Lead SBDIP
HCTS85K/Sample +25oC Sample 16 Lead Ceramic Flatpack
HCTS85HMSR +25oCDie Die
HCTS85MS
Radiation Hardened
4-Bit Magnitude Comparator
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
16 LEAD CERAMIC ME TAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
2
3
4
5
6
7
8
116
15
14
13
12
11
10
9
B3
(A<B)IN
(A=B)IN
(A>B)IN
(A<B)OUT
(A=B)OUT
GND
(A>B)OUT
VCC
B2
A2
A1
B1
A0
B0
A3
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets : >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si) /s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Fanout (Over Temperature Range)
-Standar d Ou tputs: 10 LSTTL Loads
• Military Temperat ure Range: -55oC to +125oC
• Signif icant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5. 5V
• LSTTL Input Compatibilit y
-VIL = 0.8V Max
-VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
Description
The Intersil HCTS85MS is a Radiation Hardened 4-bit high
speed magnitude comparator. This device compares two
binary, BCD, or other monotonic codes and presents the
three possible magnitude results at the outputs (A>B, A<B,
and A=B). The 4-bit input words are weighted (A0 to A3 and
B0 to B3), where A3 and B3 are the most significant bits.
The HCTS85MS is expandable without external gating, both
serial and parallel operation.
The HCTS85MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family
with TTL input compatibility.
The HCTS 85M S i s supp lie d in a 16 l ead Ce ra mic f latpa ck
(K su ffix ) o r a S BDIP P ac kag e (D s uf fix) .
September 1995
Spec Number 518624
FN3059.1
CA UTI ON: These devices are sensitiv e to electr ostat i c disc harge; follow proper IC H andling Procedu r es .
1-888-INTERSIL or 321-724-7143 |Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
2
HCTS85MS
Functional Block Diagram
TRUTH TABLE
COMPARING INPUTS CASCADING INPUTS OUTPUTS
A3, B3 A2, B2 A1, B1 A0, B0 A>B A<B A=B A>B A<B A=B
A3>B3XXXXXXHLL
A3<B3XXXXXXLHL
A3=B3A2>B2XXXXXHLL
A3=B3A2<B2XXXXXLHL
A3=B3A2=B2A1>B1XXXXHLL
A3=B3A2=B2A1<B1XXXXLHL
A3=B3 A2=B2 A1=B1 A0>B0 X X X H L L
A3=B3 A2=B2 A1=B1 A0<B0 X X X L H L
A3=B3 A2=B2 A1=B1 A0=B0 H L L H L L
A3=B3 A2=B2 A1=B1 A0=B0 L H L L H L
A3=B3 A2=B2 A1=B1 A0=B0 L L H L L H
A3=B3 A2=B2 A1=B1 A0=B0 X X H L L H
A3=B3A2=B2A1=B1A0=B0HHLLLL
A3=B3 A2=B2 A1=B1 A0=B0 L L L H H L
NOTE: L = Log ic L evel Low, H = Logic Level High, x = Immaterial
B3
A3
B2
A2
B1
A1
(A>B)
B0
A0
(A=B)
(A<B)
B3
B3
A3
A3
B2
B2
A2
A2
B1
B1
A1
A1
B0
B0
A0
A0
A2
B2
A3
B3
A1
B1
B0
A0
B0
A0
(A>B)
1
15
14
13
11
12
4
9
10
3
2
IN
IN
IN A1
B1
A3
B3
A2
B2
OUT
(A=B)
OUT
(A<B)
OUT
5
6
7
Single Device
OR
Serie s Cascading
Par allel Cascading
Spec Num ber 518624
3
Specifications HCTS85M S
Absolute Maximum Ratings Reliability Informati on
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
DC Drain Current, An y One Output. . . . . . . . . . . . . . . . . . . . . . . ±25mA
(All Voltage Reference to the VSS Terminal)
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (Soldering 10sec). . . . . . . . . . . . . . . . . . +265oC
Junction Temperature (TJ). . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Resistance θJA θJC
SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W
Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W
Maximum Package Power Dissipa tion at +125oC Ambien t
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W
If device power exceeds package dissipation capability, provide
heat sinking or derate linearl y at the following rate:
SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC
Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under “Absolute Maximum Ratings” may be applied to devices (one at a time) without resulting in permanent
damage. T his is a stress rating o nly. Expos ure t o a bso lute m aximum rati ng co nditions for exten ded periods m ay affect device r eliability. The c onditions liste d
under “Electrical Performance Characteristics” are the only conditions recommended for satisfactory device operation.
Ope rat i ng Condit io ns
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range (TA). . . . . . . . . . . . -55oC to +125oC
Input Rise and Fall Times at VCC = 4.5V (TR, TF) . . . . 500ns Max.
Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V
Input High Voltage (VIH). . . . . . . . . . . . . . . . . . . . . . . . 2.0V to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL (NOTE 1)
CONDITIONS
GROUP
A SUB-
GROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Quiescent Current ICC VC C = 5.5V,
VIN = VCC or GND 1+25
oC-40µA
2, 3 +125oC, -55oC-750µA
Output Current
(Sink) IOL VCC = 4.5V, VIH = 4.5V,
VOUT = 0.4V, VIL = 0V 1+25
oC4.8-mA
2, 3 +125oC, -55oC4.0-mA
Output Current
(Source) IOH VCC = 4.5V, VIH = 4.5V,
VOUT = VCC - 0.4V,
VIL = 0V
1+25
oC-4.8-mA
2, 3 +125oC, -55oC-4.0-mA
Output Voltage Lo w VOL VC C = 4.5V, VIH = 2.25V,
IOL = 50 µA, VIL = 0.8V 1, 2, 3 + 25 oC, + 125oC, -55oC- 0.1 V
VCC = 5.5V, VIH = 2.75V,
IOL = 50 µA, VIL = 0.8V 1, 2, 3 + 25 oC, + 125oC, -55oC- 0.1 V
Output Voltage High VOH VCC = 4.5V, VIH = 2.25V,
IOH = -50µA, VIL = 0.8V 1, 2, 3 + 25 oC, + 125oC, -55oCVCC
-0.1 -V
VCC = 5.5V, VIH = 2.75V,
IOH = -50µA, VIL = 0.8V 1, 2, 3 + 25 oC, + 125oC, -55oCVCC
-0.1 -V
Input Le akage
Current IIN VCC = 5.5V, VIN = VCC or
GND 1+25
oC-±0.5 µA
2, 3 +125oC, -55oC-±5.0 µA
Nois e Immuni ty
Func tio n al Test FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V (Note 2) 7, 8A, 8B +25oC, +125oC, -55oC---
NOTES:
1. A ll volt ages referenced to device GND.
2. For fu nction al tests, VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is recognized as a logic “0”.
Spec Num ber 518624
4
Specifications HCTS85M S
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL (N OTES 1, 2)
CONDITIONS
GROUP
A SUB-
GROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
An to (A>B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 36 ns
10, 11 +125oC, -55oC 2 43 ns
Bn to (A>B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 57 ns
10, 11 +125oC, -55oC 2 66 ns
An, Bn to (A<B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 45 ns
10, 11 +125oC, -55oC 2 51 ns
An, Bn to (A=B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 42 ns
10, 11 +125oC, -55oC 2 50 ns
An, Bn to (A>B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 29 ns
10, 11 +125oC, -55oC 2 35 ns
(A>B)IN to
(A>B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 34 ns
10, 11 +125oC, -55oC 2 39 ns
(A=B)IN to
(A=B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 28 ns
10, 11 +125oC, -55oC 2 37 ns
(A<B)IN to
(A<B)OUT TPHL,
TPLH VCC = 4.5V 9 +25oC 2 35 ns
10, 11 +125oC, -55oC 2 40 ns
NOTES:
1. A ll volt ages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND , VIH = 3V.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Capacitance Power
Dissipation CPD VCC = 5.0V, f = 1MHz 1 +25oC - 39 pF
1+125
oC, -55oC - 92 pF
Input Capacitance CIN VCC = 5.0V, f = 1MHz 1 +25oC - 10 pF
1+125
oC, -55oC - 10 pF
Output Transition
Time TTHL,
TTLH VCC = 4.5V 1 +25oC - 15 ns
1+125
oC, -55oC - 22 ns
NOTE:
1. The parameters listed in Table 3 are c ontrolled vi a design or process parameters. Min and Max Limits are guaranteed b ut not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
Spec Num ber 518624
5
Specifications HCTS85M S
TABLE 4. DC POST RADIATI ON ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL (N OTES 1, 2)
CONDITIONS TEMPERATURE
200K RAD
LIMITS
UNITSMIN MAX
Quiescent Current ICC VCC = 5.5V, VIN = VCC or GND +25oC-0.750mA
Output Current (Sink) IOL VCC = 4.5V, VIN = VCC or GND,
VOUT = 0.4V +25oC4.0-mA
Output Current
(Source) IOH VCC = 4.5V, VIN = VCC or GND,
VOUT = VCC -0.4V +25oC-4.0-mA
Output Voltage Low VOL VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOL = 50µA+25oC-0.1V
Output Voltage High VOH VCC = 4.5V and 5.5V, VIH = VCC/2,
VIL = 0.8V, IOH = -50µA+25oCVCC
-0.1 -V
Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND +25oC-±5µA
Nois e Immuni ty
Func tio n al Test FN VCC = 4.5V, VIH = 2.25V,
VIL = 0.8V, (Note 3) +25oC ---
An to (A>B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 43 ns
Bn to (A>B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 66 ns
An, Bn to (A<B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 51 ns
An, Bn to (A=B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 50 ns
(A<B)IN to (A<B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 35 ns
(A>B)IN to (A>B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 40 ns
(A=B)IN to (A=B)OUT TPHL,
TPLH VCC = 4.5V +2 5oC 2 37 ns
NOTES:
1. A ll volt ages referenced to device GND.
2. AC measurements assume RL = 500Ω, CL = 50pF, Input TR = TF = 3ns, VIL = GND , VIH = 3V.
3. For fu nction al tests VO ≥ 4.0V is recognized as a logic “1”, and VO ≤ 0.5V is reco gnized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER GROUP B
SUBGROUP DELTA LIMIT
ICC 5 12µA
IOL/IOH 5 -15% of 0 Hour
Spec Num ber 518624
6
Specifications HCTS85M S
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS METHOD GROUP A SUBGROUPS READ AND RECORD
In iti al Te st (Prebu rn-In) 10 0% / 50 0 4 1, 7, 9 IC C , IO L/ H
Interim Test I (P os tb ur n -I n ) 10 0% / 50 0 4 1, 7, 9 IC C, I O L/ H
Interim Test II (P os tb ur n -I n ) 100%/50 0 4 1, 7, 9 IC C , IO L/ H
PD A 100%/5004 1, 7, 9, Deltas
Interim Test III (P os tb ur n -I n ) 100%/50 0 4 1, 7, 9
PD A 100%/5004 1, 7, 9, Deltas
Final Test 100%/5 004 2, 3, 8A, 8B , 10, 11
Group A (Note 1) Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample/5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11,
(Note 2)
Su bg r ou p B- 6 Sam p le / 50 05 1, 7, 9
Gr ou p D S am p le / 50 05 1, 7, 9
NOTES:
1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised.
2. Table 5 parameters only.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE
GROUPS METHOD
TEST READ AND REC ORD
PRE RAD POST RAD PR E RAD POS T RAD
Group E Su bg ro up 2 5005 1, 7, 9 T ab le 4 1, 9 Tabl e 4 (N ot e 1)
NOTE:
1. Except FN test which will be performed 100% Go/No-Go.
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS
OPEN GROUND 1/2 VCC = 3V ± 0.5V VCC = 6V ± 0.5V
OSCILLATOR
50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1)
5, 6, 7 1 - 4, 8 - 15 - 16 - -
STATIC BURN-IN II TEST CONNECTIONS (Note 1)
5, 6, 7 8 - 1 - 4, 9 - 16 - -
DYNAMIC BURN-IN TEST CONDITIONS (Note 2)
- 1, 8, 10, 11, 13 5, 6, 7 2, 3, 4, 16 12, 15 9, 14
NOTES:
1. Each pin except VCC and G ND will have a resistor of 10KΩ ± 5 % f or stati c bu r n-in.
2. Each pin except VCC and G ND will have a resistor of 1KΩ ± 5% for dynamic burn-in.
TABLE 9. IRRADIATION TEST CONNECTIONS
OPEN GROUND VCC = 5V ± 0.5V
5, 6, 7, 8 1 - 4, 9 - 16
NOTE: Each pin except VC C and GND will have a resistor of 47KΩ ± 5% for irradiatio n testing.
Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Num ber 518624
7
HCTS85MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verificat ion (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Reject s
100% Nond estructive Bond Pull, Meth od 2023
Sample - Wir e Bond Pull Moni tor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Meth od 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Cons tant Acceleration, Meth od 2001, Condition per
Method 5004
100% PIND, Method 2020, Co ndition A
100% External Vi sual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC m in. , Method 1015
100% Interim El ectri cal Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC m in. , Method 1015
100% Interim El ectri cal Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivale nt, Method 1015
100% Interim El ectri cal Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Not e 3)
100% External Visual, Method 2009
Sample - Group A, Metho d 5005 (Note 4)
100% Data Package Gen eration (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Al te r na te Grou p A te s tin g ma y be perf o rm ed as all ow e d by MIL - STD -88 3, Me t h od 500 5 .
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Cer tificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Num ber 518624
8
HCTS85MS
AC Timing Diagrams
AC VOLTA GE LEVELS
PARAMETER HCTS UNITS
VCC 4.50 V
VIH 3.00 V
VS 1.30 V
VIL 0 V
GND 0 V
VS INPUT
OUTPUT
OUTPUT
TTHL
80%
20%
80%
20%
VIH
VIL
VOH
VOL
VOH
VOL
TPLH TPHL
VS
TTLH
AC Load Circuit
DUT TEST
CL RL
POINT
CL = 50pF
RL = 500Ω
Spec Num ber 518624
9
All Intersil U.S. products are manufactured, assembled and tested utiliz ing ISO9000 quali ty syst em s.
Intersil Corporation’s quality cert if icatio ns can be vi ewed at www.inter sil.com/desi gn/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time wi thout
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its u se; nor for any infringements of patents or other rights of third parties which may result
from its use. No licens e is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For informat ion regar ding Intersil Corporati on and its products, see www.i ntersil.com
HCTS85MS
Die Charact eris tics
DIE DIMENSIONS:
100 x 100 mils
METALLIZATION:
Type: SiAl
Meta l Thi ckness: 11kÅ ± 1kÅ
GLASSIVATION:
Type: SiO2
Thickness: 13kÅ ± 2.6kÅ
WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2
BOND PAD SIZE:
100µm x 100µm
4 mils x 4 mils
Metallization Mask L ayout HCTS85MS
B3
(1)
(A<B)IN
(2)
(A=B)IN(3)
(A>B)IN(4)
(A<B)OUT(5)
(A=B)OUT(6)
(A>B)OUT
(7) GND
(8) B0
(9) A0
(10)
(11) B1
(12) A1
(13) A2
(14) B2
VCC
(16) A3
(15)
Spec Num ber 518624
