Application Hints (Continued)
curve in typical performance characteristics), the input volt-
age trip point (about 5V) will vary with the load current. The
output voltage trip point (approx. 4.75V) does not vary with
load.
The error comparator has an open-collector output which re-
quires an external pullup resistor. This resistor may be re-
turned to the output or some other supply voltage depending
on system requirements. In determining a value for this re-
sistor, note that while the output is rated to sink 400 µA, this
sink current adds to battery drain in a low battery condition.
Suggested values range from 100k to 1 MΩ. The resistor is
not required if this output is unused.
PROGRAMMING THE OUTPUT VOLTAGE (LP2951)
The LP2951 may be pin-strapped for the nominal fixed out-
put voltage using its internal voltage divider by tying the out-
put and sense pins together, and also tying the feedback and
V
TAP
pins together. Alternatively, it may be programmed for
any output voltage between its 1.235V reference and its 30V
maximum rating. As seen in
Figure 2
, an external pair of re-
sistors is required.
The complete equation for the output voltage is
where V
REF
is the nominal 1.235 reference voltage and I
FB
is
the feedback pin bias current, nominally −20 nA. The mini-
mum recommended load current of 1 µA forces an upper
limit of 1.2 MΩon the value of R
2
, if the regulator must work
with no load (a condition often found in CMOS in standby).
I
FB
will produce a 2%typical error in V
OUT
which may be
eliminated at room temperature by trimming R
1
. For better
accuracy, choosing R
2
=100k reduces this error to 0.17%
while increasing the resistor program current to 12 µA. Since
the LP2951 typically draws 60 µA at no load with Pin 2
open-circuited, this is a small price to pay.
REDUCING OUTPUT NOISE
In reference applications it may be advantageous to reduce
the AC noise present at the output. One method is to reduce
the regulator bandwidth by increasing the size of the output
capacitor. This is the only way noise can be reduced on the
3 lead LP2950 but is relatively inefficient, as increasing the
capacitor from 1 µF to 220 µF only decreases the noise from
430 µV to 160 µV rms for a 100 kHz bandwidth at 5V output.
Noise can be reduced fourfold by a bypass capacitor ac-
cross R
1
, since it reduces the high frequency gain from 4 to
unity. Pick
or about 0.01 µF. When doing this, the output capacitor must
be increased to 3.3 µF to maintain stability. These changes
reduce the output noise from 430 µV to 100 µV rms for a
100 kHz bandwidth at 5V output. With the bypass capacitor
added, noise no longer scales with output voltage so that im-
provements are more dramatic at higher output voltages.
DS008546-20
*When VIN ≤1.3V, the error flag pin becomes a high impedance, and the
error flag voltage rises to its pull-up voltage. Using VOUT as the pull-up
voltage (see
Figure 2
), rather than an external 5V source, will keep the
error flag voltage under 1.2V (typ.) in this condition. The user may wish to
divide down the error flag voltage using equal-value resistors (10 kΩ
suggested), to ensure a low-level logic signal during any fault condition,
while still allowing a valid high logic level during normal operation.
FIGURE 1. ERROR Output Timing
DS008546-7
*See Application Hints
**Drive with TTL-high to shut down. Ground or leave open if shutdown
feature is not to be used.
Note: Pins 2 and 6 are left open.
FIGURE 2. Adjustable Regulator
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