HSDL-3602
IrDA® Data 1.4 Compliant 4 Mb/s 3V Infrared Transceiver
Data Sheet
Description
The HSDL-3602 is a low prole infrared transceiver mod-
ule that provides interface between logic and IR signals
for through-air, serial, half-duplex IR data link. The mod-
ule is compliant to IrDA Data Physical Layer Specica-
tions 1.4 and IEC825-Class 1 Eye Safety Standard.
The HSDL-3602 contains a high-speed and high-e-
ciency 870 nm LED, a silicon PIN diode, and an integrat-
ed circuit. The IC contains an LED driver and a receiver
providing a single output (RXD) for all data rates sup-
ported.
Applications
• Digital imaging
— Digital still cameras
— Photo-imaging printers
• Data communication
— Notebook computers
— Desktop PCs
— Win CE handheld products
— Personal Digital Assistants (PDAs)
— Printers
— Fax machines, photocopiers
— Screen projectors
— Auto PCs
— Dongles
— Set-top box
• Telecommunication products
— Cellular phones
— Pagers
• Small industrial and medical instrumentation
— General data collection devices
— Patient and pharmaceutical data collection
devices
• IR LANs
HSDL-3602 Functional block diagram
Features
• Fully compliant to IrDA 1.1 specications:
— 9.6 kb/s to 4 Mb/s operation
— Excellent nose-to-nose operation
• Typical link distance > 1.5 m
• IEC825-Class 1 eye safe
• Wide operating voltage range — 2.7 V to 3.6 V
• Small module size — 4.0 x 12.2 x 4.9 mm (H x W x D)
• Complete shutdown — TXD, RXD, PIN diode
• Low shutdown current — 10 nA typical
• Adjustable optical power management — Adjust-
able LED drive-current to maintain link integrity
• Single Rx data output — FIR select pin switch to FIR
• Integrated EMI shield — Excellent noise immunity
• Edge detection input — Prevents the LED from long
turn-on time
• Interface to various super I/O and controller devices
• Designed to accommodate light loss with cosmetic
window
• Only 2 external components are required
• Lead free package
TXD (9)
MD0 (4)
MD1 (5)
RXD (8)
FIR_SEL (3)
GND (7)
AGND (2)
VCC (1)
R1
VCC
SP
HSDL-3602
CX1
CX2
LEDA (10)
2
I/O Pins Conguration Table
Pin Description Symbol
1 Supply Voltage VCC
2 Analog Ground AGND
3 FIR Select FIR_SEL
4 Mode 0 MD0
5 Mode 1 MD1
6 No Connection NC
7 Ground GND
8 Receiver Data Output RXD
9 Transmitter Data Output TXD
10 LED Anode LEDA
The HSDL-3602 can be completely shut down to
achieve very low power consumption. In the shut down
mode, the PIN diode is inactive, thus producing very lit-
tle photo-current even under very bright ambient light.
The HSDL-3602 also incorporates the capability for
adjustable optical power. With two programming pins;
MODE 0 and MODE 1, the optical power output can be
adjusted lower when the nominal desired link distance
is one-third or two-third of the full IrDA link.
The HSDL-3602 comes with a front view packaging
option (HSDL-3602-007/-037) and a top view packag-
ing option (HSDL-3602-008/-038). It has an integrated
shield that helps to ensure low EMI emission and high
immunity to EMI eld, thus enhancing reliable perfor-
mance.
Application Support Information
The Application Engineering group in Lite-On Tech-
nology is available to assist you with the Technical
understanding associated with HSDL-3602 infrared
transceiver module. You can contact them through your
local Lite-On Technologies' sales representatives for ad-
ditional details.
Back view (HSDL-3602-007/-037)
Bottom view (HSDL-3602-008/-038)
Ordering Information
Package Option Package Part Number Standard Package Increment
Front View HSDL-3602-007 400
Front View HSDL-3602-037 1800
Top View HSDL-3602-008 400
Top View HSDL-3602-038 1800
8 7 6 5 4 3 2 1910
BACK VIEW (HSDL-3602 #007/#017)
8 7 6 5 4 3 2 1910
BOTTOM VIEW (HSDL-3602-008/-038)
3
Transceiver Control Truth Table
Mode 0 Mode 1 FIR_SEL RX Function TX Function
1 0 X Shutdown Shutdown
0 0 0 SIR Full Distance Power
0 1 0 SIR 2/3 Distance Power
1 1 0 SIR 1/3 Distance Power
0 0 1 MIR/FIR Full Distance Power
0 1 1 MIR/FIR 2/3 Distance Power
1 1 1 MIR/FIR 1/3 Distance Power
X = Don't Care
Recommended Application Circuit Components
Component Recommended Value
R1 2.2 Ω ± 5%, 0.5 Watt, for 2.7 ≤ VCC ≤ 3.3 V operation
2.7 Ω ± 5%, 0.5 Watt, for 3.0 ≤ VCC ≤ 3.6 V operation
CX1[5] 0.47 µF ± 20%, X7R Ceramic
CX2[6] 6.8 µF ± 20%, Tantalum
Notes:
5. CX1 must be placed within 0.7 cm of the HSDL-3602 to obtain optimum noise immunity.
6. In "HSDL-3602 Functional Block Diagram" on page 1 it is assumed that Vled and VCC share the same supply voltage and lter capacitors. In case
the 2 pins are powered by dierent supplies CX2 is applicable for Vled and CX1 for VCC. In environments with noisy power supplies, including
CX2 on the VCC line can enhance supply rejection performance.
Transceiver I/O Truth Table
Inputs Outputs
Transceiver Mode FIR_SEL TXD EI LED RXD
Active X 1 X On Not Valid
Active 0 0 High[1] O Low[3]
Active 1 0 High[2] O Low[3]
Active X 0 Low O High
Shutdown X X[4] Low Not Valid Not Valid
X = Don't Care EI = In-Band Infrared Intensity at detector
Notes:
1. In-Band EI ≤ 115.2 kb/s and FIR_SEL = 0.
2. In-Band EI ≥ 0.576 Mb/s and FIR_SEL = 1.
3. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incident intensity.
4. To maintain low shutdown current, TXD needs to be driven high or low and not left oating.
4
Caution: The BiCMOS inherent to the design of this component increases the component’s susceptibility to damage
from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of
this component to prevent damage and/or degradation, which may be induced by ESD.
Marking Information
The HSDL-3602-007/-037 is marked ‘3602YYWW’ on
the shield where ‘YY’ indicates the unit’s manufacturing
year, and ‘WW’ refers to the work week in which the unit
is tested.
Absolute Maximum Ratings[7]
Parameter Symbol Minimum Maximum Unit Conditions
Storage Temperature TS –40 +100 ˚C
Operating Temperature TA –20 +70 ˚C
DC LED Current ILED (DC) 165 mA
Peak LED Current ILED (PK) 650 mA ≤ 90 µs pulse width,
≤ 25% duty cycle
750 mA ≤ 2 µs pulse width,
≤ 10% duty cycle
LED Anode Voltage VLEDA –0.5 7 V
Supply Voltage VCC 0 7 V
Transmitter Data Input Current ITXD (DC) –12 12 mA
Receiver Data Output Voltage VO –0.5 VCC + 0.5 V |IO(RXD)| = 20 µA
Note:
7. For implementations where case to ambient thermal resistance ≤ 50˚C/W.
ILED (A)
0.7
LEDA VOLTAGE (V)
0.3
HSDL-3602 Graph 1
1.7 2.1
0
0.1
1.3 2.3
0.5
1.5 1.9
0.6
0.4
0.2
LEDA vs LEDA
LOP (mW/sr)
450
ILED (A)
200
HSDL-3602 Graph 2
0.3 0.6
0
50
0 0.7
350
0.1 0.4
400
300
100
250
150
0.2 0.5
LIGHT OUTPUT POWER (LOP) vs ILED
5
Recommended Operating Conditions
Parameter Symbol Minimum Maximum Unit Conditions
Operating Temperature TA –20 +70 ˚C
Supply Voltage VCC 2.7 3.6 V
Logic High Input Voltage VIH 2 VCC/3 VCC V
for TXD, MD0, MD1, and
FIR_SEL
Logic Low Transmitter VIL 0 VCC/3 V
Input Voltage
LED (Logic High) Current ILEDA 400 650 mA
Pulse Amplitude
Receiver Signal Rate 0.0024 4 Mb/s
Electrical & Optical Specications
Specications hold over the Recommended Operating Conditions unless otherwise noted. Unspecied test condi-
tions can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Transceiver
Supply Current Shutdown ICC1 10 200 nA VSD ≥ VCC – 0.5
Idle ICC2 2.5 5 mA VI(TXD) ≤ VIL, EI = 0
Digital Input Logic IL/IH –1 1 µA 0 ≤ VI ≤ VCC
Current Low/High
Transmitter
Transmitter Logic High EIH 100 250 400 mW/sr VIH = 3.0 V
Radiant Intensity ILEDA = 400 mA
Intensity θ1/2 ≤ 15˚
Peak λp 875 nm
Wavelength
Spectral Line ∆λ1/2 35 nm
Half Width
Viewing Angle 2θ1/2 30 60
Optical tpw (EI) 1.5 1.6 1.8 µs tpw(TXD) = 1.6 µs at 115.2 kb/s
Pulse Width
148 217 260 ns tpw(TXD) = 217 ns at 1.15 Mb/s
115 125 135 ns tpw(TXD) = 125 ns at 4.0 Mb/s
Rise and tr (EI), 40 ns tpw(TXD) = 125 ns at 4.0 Mb/s
Fall Times tf (EI) tr/f(TXD) = 10 ns
Maximum tpw (max) 20 50 µs TXD pin stuck high
Optical
Pulse Width
LED Anode On State Voltage VON(LEDA) 2.4 V ILEDA = 400 mA, VI(TXD) ≥ VIH
LED Anode O State Leakage ILK(LEDA) 1 100 nA VLEDA = VCC = 3.6 V,
Current VI(TXD) ≤ VIL
˚
6
Notes:
8. An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is dened as 850 ≤ λp ≤ 900 nm, and the pulse characteristics are
compliant with the IrDA Serial Infrared Physical Layer Link Specication.
9. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity.
10. For in-band signals ≤ 115.2 kb/s where 3.6 µW/cm2 ≤ EI ≤ 500 mW/cm2.
11. For in-band signals at 1.15 Mb/s where 9.0 µW/cm2 ≤ EI ≤ 500 mW/cm2.
12. For in-band signals of 125 ns pulse width, 4 Mb/s, 4 PPM at recommended 400 mA drive current.
13. Pulse width specied is the pulse width of the second 500 kHz carrier pulse received in a data bit. The rst 500 kHz carrier pulse may exceed
2 µs in width, which will not aect correct demodulation of the data stream. An ASK or DASK system using the HSDL-3602 has been shown to
correctly receive all data bits for 9 µW/cm2 ≤ EI ≤ 500 mW/cm2 incoming signal strength. ASK or DASK should use the FIR channel enabled.
14. The wake up time is the time between the transition from a shutdown state to an active state, and the time when the receiver is active and ready
to receive infrared signals.
Electrical & Optical Specications
Specications hold over the Recommended Operating Conditions unless otherwise noted. Unspecied test condi-
tions can be anywhere in their operating range. All typical values are at 25˚C and 3.3 V unless otherwise noted.
Parameter Symbol Min. Typ. Max. Units Conditions
Receiver
Receiver Data Logic Low VOL 0 — 0.4 V IOL = 1.0 mA,
Output Voltage EI ≥ 3.6 µW/cm2,
θ1/2 ≤ 15˚
Logic High VOH VCC – 0.2 — VCC V IOH = –20 µA,
EI ≤ 0.3 µW/cm2,
θ1/2 ≤ 15˚
Viewing 2θ1/2 30
Angle
Logic High Receiver Input EIH 0.0036 500 mW/cm2 For in-band signals
Irradiance ≤ 115.2 kb/s[8]
0.0090 500 mW/cm2 0.576 Mb/s ≤ in-band
signals ≤ 4 Mb/s[8]
Logic Low Receiver Input EIL 0.3 µW/cm2 For in-band signals[8]
Irradiance
Receiver Peak Sensitivity λP 880 nm
Wavelength
Receiver SIR Pulse Width tpw (SIR) 1 4.0 µs θ1/2 ≤ 15˚[10], CL = 10 pF
Receiver MIR Pulse Width tpw (MIR) 100 500 ns θ1/2 ≤ 15˚[11], CL = 10 pF
Receiver FIR Pulse Width tpw (FIR) 85 165 ns θ1/2 ≤ 15˚[12], CL = 10 pF,
VCC = 3 to 3.6 V
190 ns θ1/2 ≤ 15˚[12], CL = 10 pF,
VCC = 2.7 V
Receiver ASK Pulse Width tpw (ASK) 1 µs 500 kHz/50% duty cycle
carrier ASK[13]
Receiver Latency Time for FIR tL (FIR) 40 50 µs
Receiver Latency Time for SIR tL (SIR) 20 50 µs
Receiver Rise/Fall Times tr/f (RXD) 25 ns
Receiver Wake Up Time tW 100 µs [14]
˚
7
TXD "Stuck ON" Protection RXD Output Waveform
LED Optical Waveform Receiver Wake Up Time Denition
(when MD0 ≠ 1 and MD1 ≠ 0)
tpw (MAX.)
TXD
LED
tf
VOH 90%
50%
10%
VOL
tpw
tr
tf
LED OFF
90%
50%
10%
LED ON
tpw
tr
8
HSDL-3602-007 and HSDL-3602-037 Package Outline with Dimension and Recommended PC Board Pad Layout
PIN 1
MOUNTING
CENTER
6.10
4.18
4.00
12.20
3.84
R 1.77
R 2.00
4.05
4.95
10 CASTELLATION:
PITCH 1.1 ± 0.1
CUMULATIVE 9.90 ± 0.1
0.70
0.80
1.70
PIN 10
0.45
1.20
0.80
2.55
1.90
3.24
1.90
4.98
MID OF LAND
1.05
2.40
2.35
2.84
2.08
0.70 0.43
PIN 10PIN 1
MOUNTING CENTER
TOP VIEW
FRONT VIEW
LAND PATTERNBACK VIEW
SIDE VIEW
ALL DIMENSIONS IN MILLIMETERS (mm).
DIMENSION TOLERANCE IS 0.20 mm
UNLESS OTHERWISE SPECIFIED.
1.17
PIN
1
PIN
10
9
HSDL-3602-008 and HSDL-3602-038 Package Outline with Dimension and Recommended PC Board Pad Layout
3.85
0.47
0.36
0.83
0.42
0.94
0.31
0.84
0.53
0.31
0.28
1.77
2.15 +0.05
-0.00
12.2 +0.10
-0.00
4.16 +0.05
-0.00
11.7 +0.05
-0.00
2.5
5
11.7
0.85
0.3
2.08
1.46 2.57
3.843.24
55
2.08
R2.3
R2.1
0.1 0.1
4.65
R2
R1.77
0.8 0.73
0.94 1.95
10
Tape and Reel Dimensions (HSDL-3602-007, -037)
ALL DIMENSIONS IN MILLIMETERS (mm)
R 1.00
2.00 ± 0.50
LABEL
EMPTY PARTS
MOUNTED LEADER
EMPTY
(400 mm MIN.)
(40 mm MIN.)
DIRECTION OF PULLING
(40 mm MIN.)
CONFIGURATION OF TAPE
13.00 ± 0.50
SHAPE AND DIMENSIONS OF REELS
QUANTITY = 400 PIECES PER REEL (HSDL-3602-007)
1800 PIECES PER TAPE (HSDL-3602-037)
21.00 ± 0.80
12.50 ± 0.10
8.00 ± 0.10
4.00 ± 0.10
24.00 ± 0.30
1.75 ± 0.10
0.40 ± 0.10
4.25 ± 0.10
Æ1.55 ± 0.05
11.50 ± 0.10
2.00 ± 0.10 B
B
5 (MAX.)
5 (MAX.)
5.20 ± 0.10
A A
SECTION A-A
SECTION B-B
10
3.8
A
A
Æ1.5 ± 0.1 10
11
12
8
7
3
2
1
4 5 6
4.4
9
A
A
A
11
Tape and Reel Dimensions (HSDL-3602-008, -038)
ALL DIMENSIONS IN MILLIMETERS (mm)
R 1.00
2.00 ± 0.50
LABEL
EMPTY PARTS
MOUNTED LEADER
EMPTY
(400 mm MIN.)
(40 mm MIN.)
DIRECTION OF PULLING
(40 mm MIN.)
CONFIGURATION OF TAPE
13.00 ± 0.50
SHAPE AND DIMENSIONS OF REELS
QUANTITY = 400 PIECES PER REEL (HSDL-3602-008)
1800 PIECES PER TAPE (HSDL-3602-038)
21.00 ± 0.80
Bo
W
E
T
Ko
F
B
Do P2 D1Po
P1
5.4 ± 0.15
SYMBOL
SPEC
SYMBOL
SPEC
Ao
4.4 ± 0.10
Bo
12.50 ± 0.10
Ko
4.85 ± 0.10
Po
4.0 ±0.10
P1
8.0 ± 0.10
P2
2.0 ± 0.10
T
0.35 ± 0.10
E
1.75 ± 0.10
F
11.5 ± 0.10
Do
1.55 ± 0.10
D1
1.5 ± 0.10
W
24.0 ± 0.3
10Po
40.0 ± 0.20
B
5 (MAX.)
5 (MAX.)
A A
SECTION A-A
NOTES:
1. I.D. sprocket hole pitch cumulative tolerance is ± 0.2 mm.
2. Corner camber shall be not more than 1 mm per 100 mm through a length of 250 mm.
3. Ao and Bo measured on a place 0.3 mm above the bottom of the pocket.
4. Ko measured from a place on the inside bottom of the pocket to top surface of carrier.
5. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole.
SECTION B-B
8 ± 0.10
Ao
12
Moisture Proof Packaging
All HSDL-3602 options are shipped in moisture proof
package. Once opened, moisture absorption begins.
Baking Conditions
If the parts are not stored in dry conditions, they must
be baked before reow to prevent damage to the parts.
Package Temp. Time
In reels 60°C ≥ 48 hours
In bulk 100°C ≥ 4 hours
125°C ≥ 2 hours
150°C ≥ 1 hour
Baking should be done only once.
Recommended Storage Conditions
Storage 10°C to 30°C
Temperature
Relative below 60% RH
Humidity
Time from Unsealing to Soldering
After removal from the bag, the parts should be sol-
dered within 3 days if stored at the recommended
storage conditions. If times longer than 72 hours are
needed, the parts must be stored in a dry box.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
LESS THAN 30 C,
AND LESS THAN
60% RH
PACKAGE IS
OPENED LESS
THAN 72 HOURS
PERFORM RECOMMENDED
BAKING CONDITIONS
NO BAKING
IS NECESSARY
YES
NO
NO
YES
13
The reow prole is a straight-line representation of
a nominal temperature prole for a convective reow
solder process. The temperature prole is divided into
four process zones, each with dierent ∆T/∆time tem-
perature change rates. The ∆T/∆time rates are detailed
in the following table. The temperatures are measured
at the component to printed circuit board connections.
In process zone P1, the PC board and HSDL-3602 cas-
tellation pins are heated to a temperature of 160°C to
activate the ux in the solder paste. The temperature
ramp up rate, R1, is limited to 4°C per second to allow
for even heating of both the PC board and HSDL-3602
castellations.
Process zone P2 should be of sucient time duration
(60 to 120 seconds) to dry the solder paste. The tem-
perature is raised to a level just below the liquidus point
of the solder, usually 200°C (392°F).
Process zone P3 is the solder reow zone. In zone P3, the
temperature is quickly raised above the liquidus point
of solder to 255°C (491°F) for optimum results. The
dwell time above the liquidus point of solder should
Maximum
Process Zone Symbol ∆T ∆T/∆time
Heat Up P1, R1 25˚C to 160˚C 4˚C/s
Solder Paste Dry P2, R2 160˚C to 200˚C 0.5˚C/s
Solder Reow P3, R3 200˚C to 255˚C 4˚C/s
(260˚C at 10 seconds max.)
P3, R4 255˚C to 200˚C –6˚C/s
Cool Down P4, R5 200˚C to 25˚C –6˚C/s
Recommended Reow Prole
be between 20 and 60 seconds. It usually takes about
20 seconds to assure proper coalescing of the solder
balls into liquid solder and the formation of good solder
connections. Beyond a dwell time of 60 seconds, the
intermetallic growth within the solder connections be-
comes excessive, resulting in the formation of weak and
unreliable connections. The temperature is then rapidly
reduced to a point below the solidus temperature of
the solder, usually 200°C (392°F), to allow the solder
within the connections to freeze solid.
Process zone P4 is the cool down after solder freeze. The
cool down rate, R5, from the liquidus point of the solder
to 25°C (77°F) should not exceed 6°C per second maxi-
mum. This limitation is necessary to allow the PC board
and HSDL-3602 castellations to change dimensions
evenly, putting minimal stresses on the HSDL-3602
transceiver.
0
t-TIME (SECONDS)
T – TEMPERATURE – ( C)
230
200
160
120
80
50 150100 200 250 300
180
220
255
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
25
R1
R2
R3 R4
R5
60 sec.
MAX.
ABOVE
220 C
MAX. 260 C
14
Dim. mm inches
a 2.40 0.095
b 0.70 0.028
c (pitch) 1.10 0.043
d 2.35 0.093
e 2.80 0.110
f 3.13 0.123
g 4.31 0.170
Appendix A: HSDL-3602-007/-037 SMT Assembly Application Note
1.0. Solder Pad, Mask, and Metal Solder Stencil Aperture
Figure 1. Stencil and PCBA.
1.1. Recommended Land Pattern for HSDL-3602-007/-037
Figure 2. Top view of land pattern.
HSDL-3602 fig 1.0
METAL STENCIL
FOR SOLDER PASTE
PRINTING
LAND PATTERN
PCBA
STENCIL
APERTURE
SOLDER
MASK
SHIELD SOLDER PAD
a
btheta
10x PAD
Y
d
e
g
Tx LENSRx LENS
FIDUCIAL
X
cFIDUCIAL
h
f
15
• Adjacent land keep-out is the maximum space oc-
cupied by the unit relative to the land pattern. There
should be no other SMD components within this
area.
• “h” is the minimum solder resist strip width required
to avoid solder bridging adjacent pads.
• It is recommended that 2 ducial cross be placed at
mid-length of the pads for unit alignment.
Note : Wet/Liquid Photo-Imagineable solder resist/mask
is recommended.
1.2. Adjacent Land Keep-out and Solder Mask Areas
Dim. mm inches
h min. 0.2 min. 0.008
j 13.4 0.528
k 4.7 0.185
l 3.2 0.126
Figure 3. HSDL-3602-007/-037 PCBA-Adjacent land keep-out and solder mask.
h
l
Rx LENSTx LENS DIM. mm INCHES
h
j
k
l
MIN. 0.2
13.4
4.7
3.2
MIN. 0.008
0.528
0.185
0.126
j
SOLDER
MASK
LAND k• ADJACENT LAND KEEP-OUT IS THE
MAXIMUM SPACE OCCUPIED BY THE
UNIT RELATIVE TO THE LAND PATTERN.
THERE SHOULD BE NO OTHER SMD
COMPONENTS WITHIN THIS AREA.
• "h" IS THE MINIMUM SOLDER RESIST
STRIP WIDTH REQUIRED TO AVOID
SOLDER BRIDGING ADJACENT PADS.
• IT IS RECOMMENDED THAT 2 FIDUCIAL
CROSS BE PLACED AT MID-LENGTH OF
THE PADS FOR UNIT ALIGNMENT.
Y
16
Figure 4. Solder paste stencil aperture.
See Figure 4
t, nominal stencil thickness l, length of aperture
mm inches mm inches
0.152 0.006 2.8 ± 0.05 0.110 ± 0.002
0.127 0.005 3.4 ± 0.05 0.134 ± 0.002
w, the width of aperture is xed at 0.70 mm (0.028 inches)
Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimension.
2.0. Recommended solder paste/cream volume for castel-
lation joints
Based on calculation and experiment, the printed sol-
der paste volume required per castellation pad is 0.30
cubic mm (based on either no-clean or aqueous solder
cream types with typically 60 to 65% solid content by
volume).
2.1. Recommended Metal Solder Stencil Aperture
It is recommended that only 0.152 mm (0.006 inches) or
0.127 mm (0.005 inches) thick stencil be used for solder
paste printing. This is to ensure adequate printed solder
paste volume and no shorting. The following combina-
tion of metal stencil aperture and metal stencil thick-
ness should be used:
3.0. Pick and Place Misalignment Tolerance and Product
Self-Alignment after Solder Reow
If the printed solder paste volume is adequate, the
unit will self-align in the X-direction after solder reow.
Units should be properly reowed in IR Hot Air convec-
tion oven using the recommended reow prole. The
direction of board travel does not matter.
Allowable Misalignment Tolerance
X-direction ≤ 0.2 mm (0.008 inches)
Theta-direction ± 2 degrees
HSDL-3602 fig 4.0
APERTURE AS PER
LAND
SOLDER
PASTE
l
w
t (STENCIL THICKNESS)
17
3.1. Tolerance for X-axis Alignment of Castellation
Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the cas-
tellation during placement of the unit. The castellations will completely self-align to the pads during solder reow as
seen in the pictures below.
3.2. Tolerance for Rotational (Theta) Misalignment
Units when mounted should not be rotated more than ± 2 degrees with reference to center X-Y as specied in Fig-
ure 2. Pictures 3 and 4 show units before and after reow. Units with a Theta misalignment of more than 2 degrees
do not completely self-align after reow. Units with ± 2 degree rotational or Theta misalignment self-aligned com-
pletely after solder reow.
Picture 1. Castellation misaligned to land pads in X-axis before
reow.
Picture 2. Castellation self-align to land pads after reow.
Picture 3. Unit is rotated before reow. Picture 4. Unit self-aligns after reow.
18
3.3. Y-axis Misalignment of Castellation
In the Y-direction, the unit does not self-align after sol-
der reow. It is recommended that the unit be placed
in line with the ducial mark (mid-length of land pad).
This will enable sucient land length (minimum of 1/2
land length) to form a good joint. See Figure 5.
3.4. Example of Good HSDL-3602-007/-037 Castellation
Solder Joints
This joint is formed when the printed solder paste
volume is adequate, i.e., 0.30 cubic mm and reowed
properly. It should be reowed in IR Hot-air convection
reow oven. Direction of board travel does not matter.
4.0. Solder Volume Evaluation and Calculation
Geometery of an HSDL-3602-007/-037 solder llet.
Figure 5. Section of a castellation in Y-axis.
Picture 5. Good solder joint.
HSDL-3602 fig 5.0
MINIMUM 1/2 THE LENGTH
OF THE LAND PAD
LENS
EDGE
FIDUCIAL
Y
0.8 1.2 0.70
0.45
0.20
0.7
0.4
19
Dim. mm inches
a 1.95 0.077
b 0.60 0.024
c (pitch) 1.10 0.043
d 1.60 0.063
e 5.70 0.224
f 3.80 0.123
g 2.40 0.170
Appendix B: HSDL-3602-008/-038 SMT Assembly Application Note
1.0. Solder Pad, Mask, and Metal Solder Stencil Aperture
Figure 1. Stencil and PCBA.
1.1. Recommended Land Pattern for HSDL-3602-008/-038
HSDL-3602 fig 1.0
METAL STENCIL
FOR SOLDER PASTE
PRINTING
LAND PATTERN
PCBA
STENCIL
APERTURE
SOLDER
MASK
SHIELD SOLDER PAD
a
btheta
10x PAD
Y
d
e
g
Tx LENSRx LENS
FIDUCIAL
X
cFIDUCIAL
h
f
20
2.0 Y-axis Misalignment of Castellation
In the Y-direction, the unit does not self-align after sol-
der reow. It is recommended that the unit be placed
in line with the ducial mark (mid-length of land pad).
This will enable sucient land length (minimum of 1/2
land length) to form a good joint. See Figure 2.
Figure 2. Section of a castellation in Y-axis.
Y
1/2 THE LENGTH OF THE
CASTELLATION PAD
FIDUCIAL
21
Appendix C: General Application Guide for the HSDL-3602
Infrared IrDA® Compliant 4 Mb/s Transceiver
Description
The HSDL-3602 wide voltage operating range infrared
transceiver is a low-cost and small form factor that is
designed to address the mobile computing market such
as notebooks, printers and LAN access as well as small
embedded mobile products such as digital cameras,
cellular phones, and PDAs. It is fully compliant to IrDA
1.1 specication up to 4 Mb/s, and supports HP-SIR,
Sharp ASK, and TV Remote modes. The design of the
HSDL-3602 also includes the following unique features:
• Low passive component count.
• Adjustable Optical Power Management (full, 2/3, 1/3
power).
• Shutdown mode for low power consumption require-
ment.
• Single-receive output for all data rates.
Adjustable Optical Power Management
The HSDL-3602 transmitter oers user-adjustable opti-
cal power levels. The use of two logic-level mode-select
input pins, MODE 0 and MODE 1, oers shutdown mode
as well as three transmit power levels as shown in the
following Table. The power levels are setup to corre-
spond nominally to maximum, two-third, and one-third
of the transmission distance. This unique feature allows
lower optical power to be transmitted at shorter link
distances to reduce power consumption.
There are 2 basic means to adjust the optical power of
the HSDL-3602:
Dynamic: This implementation enables the transceiver
pair to adjust their transmitter power according to the
link distance. However, this requires the IrDA protocol
stack (mainly the IrLAP layer) to be modied. Please
contact Agilent Application group for further details.
Static: Pre-program the ROM BIOS of the system (e.g.
notebook PC, digital camera, cell phones, or PDA) to
allow the end user to select the desired optical power
during the system setup stage.
MODE MODE 1 Transmitter
1 0 Shutdown
0 0 Full Power
0 1 2/3 Power
1 1 1/3 Power
Resistor R1 should be selected to provide the appropri-
ate peak pulse LED current over dierent ranges of Vcc.
The recommended R1 for the voltage range of 2.7 V to
3.3 V is 2.2 Ω while for 3.0 V to 3.6 V is 2.7 Ω. The HSDL-
3602 typically provides 250 mW/sr of intensity at the
recommended minimum peak pulse LED current of 400
mA.
Interface to Recommended I/O chips
The HSDL-3602’s TXD data input is buered to allow
for CMOS drive levels. No peaking circuit or capacitor is
required.
Data rate from 9.6 kb/s up to 4 Mb/s is available at the
RXD pin. The FIR_SEL pin selects the data rate that is
receivable through RXD. Data rates up to 115.2 kb/s can
be received if FIR_SEL is set to logic low. Data rates up
to 4 Mb/s can be received if FIR_SEL is set to logic high.
Software driver is necessary to program the FIR_SEL to
low or high at a given data rate.
4 Mb/s IR link distance of greater than 1.5 meters have
been demonstrated using typical HSDL-3602 units with
National Semiconductor’s PC87109 3 V Endec and Super
I/Os, and the SMC Super I/O chips.
(A) National Semiconductor Super I/O and Infrared
Controller
For National Semiconductor Super I/O and Infrared
Controller chips, IR link can be realized with the
following connections:
• Connect IRTX of the National Super I/O or IR Control-
ler to TXD (pin 9) of the HSDL-3602.
• Connect IRRX1 of the National Super I/O or IR Control-
ler to RXD (pin 8) of the HSDL-3602.
• Connect IRSL0 of the National Super I/O or IR Control-
ler to FIR_SEL (pin 3) of the HSDL-3602.
Please refer to the table below for the IR pin assign-
ments for the National Super I/O and IR Controllers that
support IrDA 1.1 up to 4 Mb/s:
Selection of Resistor R1
22
IRTX IRRX1 IRSL0
PC97/87338VJG 63 65 66
PC87308VUL 81 80 79
PC87108AVHG 39 38 37
PC87109VBE 15 16 14
Please refer to the National Semiconductor data sheets and application notes for updated information.
(B) HSDL-3602 Interoperability with National Semiconduc-
tor PC97338VJG SIO Evaluation R eport
Introduction
The objective of this report is to demonstrate the in-
teroperability of the HSDL-3602 IR transceiver IR mod-
ule as wireless communication ports at the speed of 2.4
kb/s - 4 Mb/s with NS’s PC97338VJG Super I/O under
typical operating conditions.
Test Procedures
(1) Two PC97338VJG evaluation boards were con-
nected to the ISA Bus of two PCs (Pentium 200
MHz) running Microsoft’s DOS operating system.
One system with an HSDL-3602 IR transceiver
connected to the PC97338VJG evaluation board
will act as the master device. Another system with
an HSDL-3602 IR transceiver connected to the
PC97338VJG will act as the slave device (i.e. De-
vice Under Test).
(2) The test software used in this interoperability test
is provided by National Semiconductor. A le size
of 1.7M byte from the master device, with the
PC97338VJG performing the framing, encoding is
transmitted to the slave device. The slave device,
with the PC97338VJG performing the decoding,
and CRC checksum, will receive the le. The le is
then checked for error by comparing the received
le with the original le using the DOS “fc” com-
mand.
(3) The link distance is measured by adjusting the dis-
tance between the master and slave for errorless
data communications.
TXD (9)
MD0 (4)
MD1 (5)
RXD (8)
FIR_SEL (3)
GND (7)
AGND (2)
VCC (1)
LEDA (10)
R1
VCC
SP
HSDL-3602
CX1
CX2
NATIONAL
SEMICONDUCTOR
SUPER I/O
OR
IR CONTROLLER
IRTX
IRRX1
IRSL0
HSDL-3602 FUNCTIONAL DIAGRAM (A)
**
* MODE GROUND FOR
FULL POWER OPERATION
HSDL-3600
FUNCTIONAL BLOCK DIAGRAM
23
HSDL-3602 Interoperability with NS PC97338 Report
(i) Test Conditions
VCC = 3.0 – 3.6 V
RLED = 2.7 Ω
Optical transmitter pulse width = 125 ns
Mode set to full power
(ii) Test Result
The interoperability test results show that HSDL-3602 IR
transceiver can operate ≥ 1.5 meter link distance from
3 V to 3.6 V with NS’s PC97338 at any IrDA 1.1 data rate
without error.
(C) Standard Micro System
Corporation (SMC) Super and Ultra I/O Controllers
For SMC Super and Ultra I/O Controller chips, IR link can
be realized with the following connections:
• Connect IRTX of the SMC Super or Ultra I/O Controller
to TXD (pin 9) of the HSDL-3602.
• Connect IRRX of the SMC Super or Ultra I/O Controller
to RXD (pin 8) of the HSDL-3602.
• Connect IRMODE of the Super or Ultra I/O Controller
to FIR_SEL (pin 3) of the HSDL-3602.
Please refer to the table below for the IR pin assign-
ments for the SMC Super or Ultra I/O Controllers that
support IrDA 1.1 up to 4Mb/s:
HSDL-3602 Interoperability with SMC 669/769 Report
(i) Test Conditions
Vcc = 3.0 – 3.6 V
RLED = 2.2 Ω
Optical transmitter pulse width = 125 ns
Mode set to full power
(ii) Test Result
The interoperability test results show that HSDL-3602 IR
transceiver can operate ≥ 1.5 meter link distance from
3 V to 3.6 V with SMC 669/769 at any IrDA 1.1 data rate
without error.
TXD (9)
MD0 (4)
MD1 (5)
RXD (8)
FIR_SEL (3)
GND (7)
AGND (2)
VCC (1)
LEDA (10)
R1
VCC
SP
HSDL-3602
CX1
CX2
NATIONAL
SEMICONDUCTOR
PC97338VJG
SUPER I/O
IRTX (63)
IRRX1 (65)
IRSL0 (66)
HSDL-3602 FUNCTIONAL DIAGRAM (B)
**
* MODE GROUND FOR
FULL POWER OPERATION
A0 - A3
RD, WR, CS
D0 - D7
DRQ
DACK, TC
IRQ
SYSTEM BUS
HSDL-3602
FUNCTIONAL BLOCK DIAGRAM
14.314 MHz
CLOCK
24
HSDL-3602 Interoperability with SMC's Super I/O or IR Controller
IRTX IRRX IRMODE
FDC37C669FR 89 88 23
FDC37N769 87 86 21
FDC37C957/8FR 204 203 145 or 190
TXD (9)
MD0 MD1
RXD (8)
FIR_SEL (3)
GND (7)
AGND (2)
VCC (1)
LEDA (10)
R1
VCC
SP
HSDL-3602
CX1
CX2
4 5
STANDARD
MICROSYSTEM
CORPORATION
SUPER I/O
OR
IR CONTROLLER
IRRX
IRMODE
IRTX
MODE GROUND
FOR FULL POWER
OPERATION
25
To ensure IrDA compliance, some constraints on the
height and width of the window exist. The minimum
dimensions ensure that the IrDA cone angles are met
without vignetting. The maximum dimensions mini-
mize the eects of stray light. The minimum size cor-
responds to a cone angle of 300 and the maximum size
corresponds to a cone angle of 60º.
In the gure below, X is the width of the window, Y is
the height of the window and Z is the distance from
the HSDL-3602 to the back of the window. The distance
from the center of the LED lens to the center of the
photodiode lens, K, is 7.08mm. The equations for com-
puting the window dimensions are as follows:
X = K + 2*(Z+D)*tanA
Y = 2*(Z+D)*tanA
The above equations assume that the thickness of the
window is negligible compared to the distance of the
module from the back of the window (Z). If they are
comparable, Z' replaces Z in the above equation. Z' is
dened as
Z'=Z+t/n
where ‘t’ is the thickness of the window and ‘n’ is the re-
fractive index of the window material.
Appendix D: Optical Port Dimensions for HSDL-3602:
Section of a castellation in Y-axis.
D
Z
K
A
IR TRANSPARENT WINDOW OPAQUE MATERIAL
OPAQUE MATERIAL IR TRANSPARENT WINDOW
HSDL-3602 Optical Port Dimensions
X
26
Aperture Width Aperture height
(x, mm) (y, mm)
Module Depth, (z) mm max. min. max. min.
0 16.318 11.367 9.238 4.287
1 17.472 11.903 10.392 4.823
2 18.627 12.439 11.547 5.359
3 19.782 12.975 12.702 5.895
4 20.936 13.511 13.856 6.431
5 22.091 14.047 15.011 6.967
6 23.246 14.583 16.166 7.503
7 24.401 15.118 17.321 8.038
8 25.555 15.654 18.475 8.574
9 26.710 16.190 19.630 9.110
The depth of the LED image inside the HSDL-3602, D, is
8mm. ‘A’ is the required half angle for viewing. For IrDA
compliance, the minimum is 150 and the maximum is
300. Assuming the thickness of the window to be neg-
ligible, the equations result in the following tables and
graphs:
APERTURE WIDTH (X) – mm
30
MODULE
DEPTH (Z) – mm
10
HSDL-3602 Width vs Depth
4 7
0
5
0 9
15
2 6
20
X MAX.
X MIN.
25
1 3 5 8
APERTURE WIDTH (X) vs MODULE
DEPTH
APERTURE HEIGHT (Y) – mm
MODULE
DEPTH (Z) – mm
10
HSDL-3602 Height vs Depth
4 7
0
5
0 9
15
2 6
20
Y MAX.
Y MIN.
25
1 3 5 8
APERTURE HEIGHT (Y) vs MODULE
DEPTH
27
Window Material
Almost any plastic material will work as a window mate-
rial. Polycarbonate is recommended. The surface nish
of the plastic should be smooth, without any texture.
An IR lter dye may be used in the window to make it
look black to the eye, but the total optical loss of the
window should be 10 percent or less for best optical
performance. Light loss should be measured at 875 nm.
Shape of the Window
From an optics standpoint, the window should be at.
This ensures that the window will not alter either the
radiation pattern of the LED, or the receive pattern of
the photodiode.
Flat Window
(First choice)
If the window must be curved for mechanical or in-
dustrial design reasons, place the same curve on the
back side of the window that has an identical radius as
the front side. While this will not completely eliminate
the lens eect of the front curved surface, it will sig-
nicantly reduce the eects. The amount of change in
the radiation pattern is dependent upon the material
chosen for the window, the radius of the front and back
curves, and the distance from the back surface to the
transceiver. Once these items are known, a lens design
can be made which will eliminate the eect of the front
surface curve.
The following drawings show the eects of a curved
window on the radiation pattern. In all cases, the center
thickness of the window is 1.5 mm, the window is made
of polycarbonate plastic, and the distance from the
transceiver to the back surface of the window is 3 mm.
HSDL-3602 Flat Window
Curved Front and Back
(Second choice)
HSDL-3602 Curved Window
Curved Front, Flat Back
(Do not use)
HSDL-3602 Curved/Flat Window
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Data subject to change. Copyright © 2007 Lite-On Technology Corporation. All rights reserved.