AT27LV010 Features * * * * Wide Power Supply Range, 3.0 V to 5.5 V Fast Read Access Time - 120 ns Compatible with JEDEC Standard AT27C010 Low Power 3.3-Volt CMOS Operation 20 A max. Standby 29 mW max. Active at 5 MHz for VCC = 3.6 V 138 mW max. Active at 5 MHz for VCC = 5.5 V Wide Selection of JEDEC Standard Packages 32-Lead 600-mil PDIP and Cerdip 32-Pad PLCC and LCC 32-Lead TSOP High Reliability CMOS Technology 2000 V ESD Protection 200 mA Latchup Immunity Rapid Programming - 100 s/byte (typical) Two-line Control CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges * * * * * * * 1 Megabit (128K x 8) Low Voltage UV Erasable CMOS EPROM Description The AT27LV010 chip is a low power, low voltage 1,048,576 bit ultraviolet erasable and electrically programmable read only memory (EPROM) organized as 128K x 8 bits. It requires only one supply in the range of 3.0 to 5.5 V in normal read mode operation, making it ideal for portable systems. With a typical power draw of only 10 mW at 1 MHz and VCC at 3.3 V, the AT27LV010 draws less than one-fifth the power of a standard 5-V EPROM. Standby mode supply current is typically less than 1 A at 3.3 V. (continued) Pin Configurations Pin Name Function A0-A16 Addresses O0-O7 Outputs CE Chip Enable OE Output Enable PGM Program Strobe NC No Connect CDIP, PDIP Top View VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM NC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 LCC, PLCC Top View TSOP Top View Type 1 A12 A16 VCC NC A15 VPP PGM A7 A6 A5 A4 A3 A2 A1 A0 O0 4 2 32 30 1 31 29 5 3 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 15 17 19 21 14 16 18 20 A11 A14 A13 A8 A9 A11 OE A10 CE O7 A8 A14 A9 A13 NC PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 14 13 16 15 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A10 O7 O5 O3 O2 O0 A1 A3 OE CE O6 O4 GND O1 A0 A2 O2 O3 O5 O1 GND O4 O6 3-39 Block Diagram Description (Continued) The AT27LV010 comes in a choice of industry standard JEDEC-approved packages, including: one-time programmable (OTP) plastic PDIP, PLCC, and TSOP, as well as windowed ceramic Cerdip and LCC. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27LV010 operating with VCC at 3.0 V produces TTL level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0 V. Atmel's 27LV010 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 s/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. The AT27LV010 programs identically as an AT27C010. VCC GND VPP DATA OUTPUTS O0 - O7 OE CE OE, CE AND PROGRAM LOGIC OUTPUT BUFFERS Y DECODER Y-GATING PGM A0-A16 ADDRESS INPUTS CELL MATRIX X DECODER IDENTIFICATION Absolute Maximum Ratings* Temperature Under Bias ..................-40oC to +85oC Storage Temperature......................-65oC to +125oC Voltage on Any Pin with Respect to Ground........................-2.0 V to +7.0 V(1) Voltage on A9 with Respect to Ground ..................... -2.0 V to +14.0 V(1) Erasure Characteristics The entire memory array of the AT27LV010 is erased (all outputs read as VOH) after exposure to ultraviolet light at a wavelength of 2537 A. Complete erasure is assured after a minimum of 20 minutes exposure using 12,000 W/cm2 intensity lamps spaced one inch away from the chip. Minimum erase time for lamps at other intensity ratings can be calculated from the minimum integrated erasure dose of 15 W*sec/cm2. To prevent unintentional erasure, an opaque label is recommended to cover the clear window on any UV erasable EPROM which will be subjected to continuous fluorescent indoor lighting or sunlight. VPP Supply Voltage with Respect to Ground......................-2.0 V to +14.0 V(1) Integrated UV Erase Dose..............7258 W*sec/cm2 *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Notes: 1. Minimum voltage is -0.6 V dc which may undershoot to -2.0 V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75 V dc which may be exceeded if certain precautions are observed (consult application notes) and which may overshoot to +7.0 V for pulses of less than 20 ns. Operating Modes CE Mode \ Pin Read Output Disable Standby (2) Rapid Program (2) PGM Verify (2) PGM Inhibit OE PGM Ai VPP VCC Outputs VIL VIL X (1) Ai X VCC DOUT X VIH X X X VCC High Z VIH X X X X VCC High Z VIL VIL VIH VIH VIL X VIL VIH X Ai VPP Ai VPP X VPP VCC VCC VCC (2) (2) (2) DIN DOUT High Z (3) Product Identification(2),(4) VIL VIL X Notes: 1. X can be VIL or VIH. 2. Refer to Programming characteristics. Programming modes require VCC 4.5 V. 3. VH = 12.0 0.5 V. 3-40 AT27LV010 A9=VH A0=VIH or VIL A1-A16=VIL X VCC (2) Identification Code 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer's Identification byte and high (VIH) to select the Device Code byte. AT27LV010 D.C. and A.C. Operating Conditions for Read Operation AT27LV010 Operating Temperature (Case) -12 0 C - 70oC -15 0 C - 70oC -20 0 C - 70oC -25 0 C - 70oC -40oC - 85oC -40oC - 85oC -40oC - 85oC -40oC - 85oC 3.0 V to 5.5 V 3.0 V to 5.5 V 3.0 V to 5.5 V 3.0 V to 5.5 V o Com. Ind. VCC Power Supply o o o = Advance Information D.C. and Operating Characteristics for Read Operation (VCC = 3.0 V to 5.5 V unless otherwise specified) Symbol Parameter Condition ILI Input Load Current Output Leakage Current ILO IPP1 (2) ISB VPP (1) Read/Standby Current VCC (1) Standby Current Min Max Units VIN = 0 V to VCC 1 A VOUT = 0 V to VCC 5 A VPP = VCC 10 A VCC = 3.6 V 20 A VCC = 5.5 V 100 A VCC = 3.6 V 100 A VCC = 5.5 V 1 mA ISB1 (CMOS), CE = VCC 0.3 V ISB2 (TTL), CE = 2.0 to VCC + 0.5 V ICC ICC1 f = 5 MHz, IOUT = 0 mA, CE = VIL, VCC = 3.6 V Com. 8 mA Ind. 10 mA ICC2 f = 5 MHz, IOUT = 0 mA CE = VIL, VCC = 5.5 V Com. 25 mA Ind. 30 mA VCC Active Current VIL Input Low Voltage -0.6 0.8 V VIH Input High Voltage 2.0 VCC+0.5 V VOL Output Low Voltage IOL = 2.0 mA .4 V IOL = 100 A .2 V VOH Output High Voltage IOH = -2.0 mA 2.4 V IOH = -100 A VCC-0.2 V Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP. A.C. Characteristics for Read Operation (VCC = 3.0V to 5.5V) AT27LV010 -12 Symbol Parameter Condition tACC (3) CE = OE = VIL tCE tOE (2) (2,3) Address to Output Delay Min -15 Max Min -20 Max Min -25 Max Min Max Units Com. 120 150 200 250 ns Ind. 120 150 200 250 ns CE to Output Delay OE = VIL 120 150 200 250 ns OE to Output Delay CE = VIL 50 60 70 100 ns 40 50 50 50 ns tDF (4,5) OE or CE High to Output Float tOH Output Hold from Address, CE or OE, whichever occurred first Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation. 0 0 0 0 ns = Advance Information 3-41 A.C. Waveforms for Read Operation ADDRESS (1) Notes: 1. Timing measurement references are 0.8 V and 2.0 V. Input AC driving levels are 0.45 V and 2.4 V. See Input Test Waveforms and Measurement Levels. 2. OE may be delayed up to tCE-tOE after the falling edge of CE without impact on tCE. 3. OE may be delayed up to tACC-tOE after the address is valid without impact on tACC. 4. This parameter is only sampled and is not 100% tested. 5. Output float is defined as the point when data is no longer driven. ADDRESS VALID CE tCE tOE OE tDF tACC tOH HIGH Z OUTPUT OUTPUT VALID Input Test Waveform and Measurement Level Output Test Load 1.3V 2.4V (1N914) 3.3K 2.0 AC DRIVING LEVELS AC MEASUREMENT 0.8 LEVEL OUTPUT PIN 0.45V CL tR, tF < 20 ns (10% to 90%) Note: CL = 100 pF including jig capacitance. Pin Capacitance (f = 1 MHz, T = 25C) (1) Typ Max Units Conditions CIN 4 8 pF VIN = 0 V COUT 8 12 pF VOUT = 0 V Notes: 1. Typical values for 5-V supply voltage. This parameter is only sampled and is not 100% tested. Programming Waveforms (1) READ (VERIFY) PROGRAM VIH ADDRESS ADDRESS STABLE VIL tAS DATA DATA VIL VPP DATA OUT VALID IN tDS VCC tDH 6.5V 5.0V tDFP tVCS 13.0V 5.0V tVPS VIH CE VIL tCES PGM VIH VIL tPW OE 3-42 tAH tOE VIH tOES VIH VIL AT27LV010 Notes: 1. The Input Timing Reference is 0.8 V for VIL and 2.0 V for VIH. 2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. 3. When programming the AT27LV010 a 0.1-F capacitor is required across VPP and ground to suppress spurious voltage transients. AT27LV010 D.C. Programming Characteristics Atmel's 27LV010 Integrated(1) Product Identification Code TA = 25 5oC, VCC = 6.5 0.25 V, VPP = 13.0 0.25 V Symbol Parameter Test Conditions Pins Limits Min Max Units Manufacturer 0 0 0 0 1 1 1 1 0 1E -0.6 0.8 V Device Type 1 0 0 0 0 0 1 0 1 O5 2.0 VCC+1 V .45 V VIL Input Low Level VIH Input High Level VOL Output Low Volt. IOL=2.1 mA VOH Output High Volt. IOH=-400 A ICC2 VCC Supply Current (Program and Verify) 40 mA IPP2 VPP Supply Current 20 mA VID A9 Product Identification Voltage 12.5 V 2.4 CE=PGM=VIL 11.5 V A.C. Programming Characteristics TA = 25 5oC, VCC = 6.5 0.25 V, VPP = 13.0 0.25 V Test Conditions* (see Note 1) Note: 1. The AT27LV010 has the same Product Identification Code as the AT27C010/L. Both are programming compatible. Rapid Programming Algorithm A 100 s PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5 V and VPP is raised to 13.0 V. Each address is first programmed with one 100 s PGM pulse without verification. Then a verification/ reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 s pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0 V and VCC to 5.0 V. All bytes are read again and compared with the original data to determine if the device passes or fails. Limits Min Max Units START tAS Address Setup Time 2 s tCES CE Setup Time 2 s ADDR = FIRST LOCATION tOES OE Setup Time 2 s VCC = 6.5V tDS Data Setup Time 2 s VPP=13.0V tAH Address Hold Time 0 s PROGRAM ONE 100 uS PULSE tDH Data Hold Time 2 s tDFP OE High to Output Float Delay tVPS VPP Setup Time 2 s tVCS VCC Setup Time 2 s tPW PGM Program Pulse Width tOE Data Valid from OE (Note 2) Hex Data A Input Load Current VIN=VIL,VIH Symbol Parameter A0 O7 O6 O5 O4 O3 O2 O1 O0 10 ILI (All Inputs) Codes 0 130 INCREMENT ADDRESS NO ns LAST ADDR.? YES (Note 3) 95 105 s 150 ns *A.C. Conditions of Test: Input Rise and Fall Times (10% to 90%) . . . . . . . . . 20 ns Input Pulse Levels . . . . . . . . . . . . . . . . . . . 0.45 V to 2.4 V Input Timing Reference Level . . . . . . . . . . 0.8 V to 2.0 V Output Timing Reference Level . . . . . . . . . 0.8 V to 2.0 V ADDR = FIRST LOCATION INCREMENT ADDRESS X=0 NO LAST ADDR.? PASS VERIFY BYTE FAIL INCREMENT X YES PROGRAM ONE 100 uS PULSE NO X = 10? YES VCC = 5.0V VPP=5.0V Notes: 1. 2. 3. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven -- see timing diagram. Program Pulse width tolerance is 100 sec 5%. COMPARE ALL BYTES TO ORIGINAL DATA FAIL DEVICE FAILED PASS DEVICE PASSED 3-43 Ordering Information ICC (mA) tACC (ns) Active Standby 120 8 120 VCC = 3.6 V Ordering Code Package Operation Range 0.02 AT27LV010-12DC AT27LV010-12JC AT27LV010-12LC AT27LV010-12PC AT27LV010-12TC 32DW6 32J 32LW 32P6 32T Commercial (0C to 70C) 10 0.02 AT27LV010-12DI AT27LV010-12JI AT27LV010-12LI AT27LV010-12PI AT27LV010-12TI 32DW6 32J 32LW 32P6 32T Industrial (-40C to 85C) 150 8 0.02 AT27LV010-15DC AT27LV010-15JC AT27LV010-15LC AT27LV010-15PC AT27LV010-15TC 32DW6 32J 32LW 32P6 32T Commercial (0C to 70C) 150 10 0.02 AT27LV010-15DI AT27LV010-15JI AT27LV010-15LI AT27LV010-15PI AT27LV010-15TI 32DW6 32J 32LW 32P6 32T Industrial (-40C to 85C) 200 8 0.02 AT27LV010-20DC AT27LV010-20JC AT27LV010-20LC AT27LV010-20PC AT27LV010-20TC 32DW6 32J 32LW 32P6 32T Commercial (0C to 70C) 200 10 0.02 AT27LV010-20DI AT27LV010-20JI AT27LV010-20LI AT27LV010-20PI AT27LV010-20TI 32DW6 32J 32LW 32P6 32T Industrial (-40C to 85C) 250 8 0.02 AT27LV010-25DC AT27LV010-25JC AT27LV010-25LC AT27LV010-25PC AT27LV010-25TC 32DW6 32J 32LW 32P6 32T Commercial (0C to 70C) 250 10 0.02 AT27LV010-25DI AT27LV010-25JI AT27LV010-25LI AT27LV010-25PI AT27LV010-25TI 32DW6 32J 32LW 32P6 32T Industrial (-40C to 85C) = Advance Information 3-44 AT27LV010 AT27LV010 Ordering Information Package Type 32DW6 32 Lead, 0.600" Wide, Windowed, Ceramic Dual Inline Package (Cerdip) 32J 32 Lead, Plastic J-Leaded Chip Carrier OTP (PLCC) 32LW 32 Pad, Windowed, Ceramic Leadless Chip Carrier (LCC) 32P6 32 Lead, 0.600" Wide, Plastic Dual Inline Package OTP (PDIP) 32T 32 Lead, Plastic Thin Small Outline Package OTP (TSOP) 3-45