AT27LV010-25LC - Atmel Corporation

Description

The AT27LV010 chip is a low power, low voltage 1,048,576 bit ultraviolet erasable and

electrically programmable read only memory (EPROM) organized as 128K x 8 bits. It re-

quires only one supply in the range of 3.0 to 5.5 V in normal read mode operation, making it

ideal for portable systems.

With a typical power draw of only 10 mW at 1 MHz and VCC at 3.3 V, the AT27LV010

draws le ss th an one-fif th the power of a s tandard 5 -V EP ROM. St andby mode supply c urr ent

is typically less than 1 µA at 3.3 V. (continued)

Pin Configurations

Pin Name Function

A0-A16 Addresses

O0-O7 Outputs

CE Chip Enable

OE Output Enable

PGM Program Strobe

NC No Connect

1 Megabit

(128K x 8)

Low Voltage

Erasable

CMOS

EPROM

A11

VCC

A14

A13

A10

A12

GND

VPP

A15

A16 31

30 NC

PGM2

CDIP, PDIP Top View

VCC

VPP NCA12

A7 30

A15

A16 PGM

GNDO1 O3 O5O6O4

O0 CE

A10

A13

A145

A11

LCC, PLCC Top View

Features

•Wide Power Supply Range, 3.0 V to 5.5 V

•Fast Read Access Time - 120 ns

•Compatible with JEDEC Standard AT27C010

•Low Power 3.3-Volt CMOS Operation

20 µA max. Standby

29 mW max. Active at 5 MHz for VCC = 3.6 V

138 mW max. Active at 5 MHz for VCC = 5.5 V

•Wide Selection of JEDEC Standard Packages

32-Lead 600-mil PDIP and Cerdip

32-Pad PLCC and LCC

32-Lead TSOP

•High Reliability CMOS Technology

2000 V ESD Protection

200 mA Latchup Immunity

•Rapid Programming - 100 µs/byte (typical)

•Two-line Control

•CMOS and TTL Compatible Inputs and Outputs

•Integrated Product Identification Code

•Commercial and Industrial Temperature Ranges

A11 A9

A13

PGM

A14

A12

A16

A15

VPPVCC

10 9

14 13

12 O0 O1

O3 O4

GND

A10 OE

22 23

20 19

26 27

30 29

18 A3 A215

A5 A4

TSOP Top View

Type 1

AT27LV010

3-39

Operating Modes

Mode \ Pin CE OE PGM Ai VPP VCC Outputs

Read VIL VIL X

(1) Ai X VCC DOUT

Output Disable X VIH XXXV

CC High Z

Standby VIH XXXXV

CC High Z

Rapid Program(2) VIL VIH VIL Ai VPP VCC (2)DIN

PGM Verify(2) VIL VIL VIH Ai VPP VCC (2)DOUT

PGM Inhibit(2) VIH XX X V

PP VCC (2)High Z

Product

Identification(2),(4) VIL VIL XA9=VH (3)

A0=VIH or VIL

A1-A16=VIL XV

CC (2)Identification

Code

Notes: 1. X can be VIL or VIH.

2. Refer to Programming characteristics. Programming

modes require VCC ≥ 4.5 V.

3. VH = 12.0 ± 0.5 V.

4. Two identifier bytes may be selected. All Ai inputs are held

low (VIL), except A9 which is set to V H and A0 which is

toggled low (VIL) to select the Manufacturer’s Identification

byte and high (VIH) to select the Device Code byte.

Temperature Under Bias ..................-40oC to +85 oC

Storage Temperature......................-65oC to +125oC

Voltage on Any Pin with

Respect to Ground........................-2.0 V to +7.0 V(1)

Voltage on A9 with

Respect to Ground .....................-2.0 V to +14.0 V(1)

VPP Supply Voltage with

Respect to Ground......................-2.0 V to +14.0 V(1)

Integrated UV Erase Dose..............7258 W•sec/cm2

*NOTICE: Stresses beyond those listed under "Absolute Maxi-

mum Ratings" may cause permanent damage to the device.

This is a stress rating only and functional operation of the de-

vice at these or any other conditions beyond those indicated in

the operational sections of this specification is not implied.

Exposure to absolute maximum rating conditions for extended

periods may affect device reliability.

Notes:

1. Minimum voltage is -0.6 V dc which may undershoot to -2.0

V for pulses of less than 20 ns. Maximum output pin voltage

is VCC + 0.75 V dc which may be exceeded if certain precau-

tions are observed (consult application notes) and which may

overshoot to +7.0 V for pulses of less than 20 ns.

Absolute Maximum Ratings*

The AT27LV010 comes in a choice of industry standard

JEDEC-approved packages, including: one-time programmable

(OTP) plastic PDIP, PLCC, and TSOP, as well as windowed

ceramic Cerdip and LCC. All devices feature two-line control

(CE, OE) to give designers the flexibility to prevent bus

contention.

The AT27LV010 operating with VCC at 3.0 V produces TTL

level outputs that are compatible with standard TTL logic de-

vices operating at VCC = 5.0 V.

Atmel’s 27LV010 has additional features to ensure high quality

and efficient production use. The Rapid Programming Algo-

rithm reduces the time required to program the part and guaran-

tees reliable programming. Programming time is typically only

100 µs/byte. The Integrated Product Identification Code elec-

tronically identifies the device and manufacturer. This feature is

used by industry standard programming equipment to select the

proper programming algorithms and voltages. The AT27LV010

programs identically as an AT27C010.

De s cr i pti o n (Continued)

Erasure Characteristics

The entire memory array of the AT27LV010 is erased (all out-

puts read as VOH) after exposure to ultraviolet light at a wave-

length of 2537 Å. Complete erasure is assured after a minimum

of 20 minutes exposure using 12,000 µW/cm2 intensity lamps

spaced one inch away from the chip. Minimum erase time for

lamps at other intensity ratings can be calculated from the min-

imum integra ted erasure d os e of 15 W•sec/cm2. To prevent un-

intentional erasure, an opaque label is recommended to cover

the clear window on any UV erasable EPROM which will be

subjected to continuous fluorescent indoor lighting or sunlight.

OE, CE AND

PROGRAM LOGIC

Y DECODER

X DECODER

Y-GATING

CELL MATRIX

IDENTIFICATION

OUTPUT

BUFFERS

GND

VPP

A0-A16

ADDRESS

INPUTS

DATA OUTPUTS

O0 - O7

VCC

PGM

Block Diagram

3-40 AT27LV010

A.C. Characteristics for Read Operation (VCC = 3.0V to 5.5V)

AT27LV010

-12 -15 -20 -25

Symbol Parameter Condition Min Max Min Max Min Max Min Max Units

tACC (3)Address to Output Delay CE = OE = VIL Com. 120 150 200 250 ns

Ind. 120 150 200 250 ns

tCE (2)CE to Output Delay OE = VIL 120 150 200 250 ns

tOE (2,3)OE to Output Delay CE = VIL 50 60 70 100 ns

tDF

(4,5)OE or CE High to Output

Float 40 50 50 50 ns

tOH Output Hold from Address,

CE or OE, whichever

occurred first 0 0 0 0 ns

Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.

D.C. and A.C. Operating Conditions for Read Operation

AT27LV010

-12 -15 -20 -25

Operating Temperature

(Case) Com. 0oC - 70oC0

C - 70oC0

C - 70oC

Ind. -40oC - 85oC -40oC - 85oC -40oC - 85oC -40oC - 85oC

VCC Power Supply 3.0 V to 5.5 V 3.0 V to 5.5 V 3.0 V to 5.5 V 3.0 V to 5.5 V

D.C. and Operating Characteristics for Read Operation

(VCC = 3.0 V to 5.5 V unless otherwise specified)

Symbol Parameter Condition Min Max Units

ILI Input Load Current VIN = 0 V to VCC ±1µA

ILO Output Leakage Current VOUT = 0 V to VCC ±5µA

IPP1 (2)VPP (1) Read/Standby Current VPP = VCC 10 µA

ISB VCC (1) Standby Current ISB1 (CMOS), CE = VCC ± 0.3 V VCC = 3.6 V 20 µA

VCC = 5.5 V 100 µA

ISB2 (TTL ), CE = 2.0 to VCC + 0.5 V VCC = 3.6 V 100 µA

VCC = 5.5 V 1 mA

ICC VCC Active Current ICC1 f = 5 MHz, IOUT = 0 mA,

CE = VIL, VCC = 3.6 V Com. 8 mA

Ind. 10 mA

ICC2 f = 5 MHz, IOUT = 0 mA

CE = VIL, VCC = 5.5 V Com. 25 mA

Ind. 30 mA

VIL Input Low Voltage -0.6 0.8 V

VIH Input High Voltage 2.0 VCC+0.5 V

VOL Output Low Voltage IOL = 2.0 mA .4 V

IOL = 100 µA.2V

OH Output High Voltage IOH = -2.0 mA 2.4 V

IOH = -100 µAV

CC-0.2 V

Notes: 1. VCC must be applied simultaneously or before V PP, and

removed simultaneously or after VPP.2. VPP may be connected directly to VCC, except during program-

ming. The supply current would then be the sum of ICC and IPP.

= Advance Information

AT27LV010

3-41

Pin Capacitance (f = 1 MHz, T = 25˚C) (1)

Typ Max Units Conditions

CIN 4 8 pF VIN = 0 V

COUT 812pFV

OUT = 0 V

Notes: 1. Typical values for 5-V supply voltage. This parameter is only sampled and is not 100% tested.

ADDRESS

OUTPUT

HIGH Z

OUTPUT

tACC

tOE

tDF

tOH

tCE

VALID

ADDRESS VALID

A.C. Waveforms for Read Operation (1)

Notes:

1. Timing measurement references are 0.8 V and

2.0 V. Input AC driving levels are 0.45 V and

2.4 V. See Input Test Waveforms and Measure-

ment Levels.

2. OE may be delayed up to tCE-tOE after the fall-

ing edge of CE without impact on t CE.

3. OE may be delayed up to tACC-tOE after the ad-

dress is valid without impact on tACC.

4. This parameter is only sampled and is not 100%

tested.

5. Output float is defined as the point when data is

no longer driven.

VALID

PROGRAM (VERIFY)

READ

6.5V

5.0V

VIH

VIL

tDS

tAS

tDH

tVCS

tAH

5.0V tVPS

tPW

tCES

13.0V

VIL

VIH

VIL

VIH

VIL

DATA OUT

tDFP

tOE

DATA IN

tOES

ADDRESS STABLE

ADDRESS

DATA

VCC

VPP

PGM

Programming Waveforms (1)

Notes:

1. The Input Timing Reference is 0.8 V for VIL and

2.0 V for VIH.

2. tOE and tDFP are characteristics of the device but

must be accommodated by the programmer.

3. When programming the AT27LV010 a 0.1-µF

capacitor is required across VPP and ground to

suppress spurious voltage transients.

3.3K

(1N914)

1.3V

OUTPUT

Output Test Load

Note: CL = 100 pF

including jig capacitance.

0.45V

2.4V 2.0

0.8

DRIVING

LEVELS

MEASUREMENT

LEVEL

tR, tF < 20 ns (10% to 90%)

Input Test Waveform and Measurement Level

3-42 AT27LV010

A.C. Programming Characteristics

TA = 25 ± 5oC, VCC = 6.5 ± 0.25 V, VPP = 13.0 ± 0.25 V

Sym-

bol Parameter

Test

Conditions*

(see Note 1) Limits Units

Min Max

tAS Address Setup Time 2 µs

tCES CE Setup Time 2 µs

tOES OE Setup Time 2 µs

tDS Data Setup Time 2 µs

tAH Address Hold Time 0 µs

tDH Data Hold Time 2 µs

tDFP OE High to Out-

put Float Delay (Note 2) 0 130 ns

tVPS VPP Setup Time 2 µs

tVCS VCC Setup Time 2 µs

tPW PGM Program

Pulse Width (Note 3) 95 105 µs

tOE Data Valid from OE 150 ns

*A.C. Conditions of Test:

Input Rise and Fall Times (10% to 90%) . . . . . . . . . 20 ns

Input Pulse Levels . . . . . . . . . . . . . . . . . . . 0.45 V to 2.4 V

Input Timing Reference Level . . . . . . . . . . 0.8 V to 2.0 V

Output Timing Reference Level . . . . . . . . . 0.8 V to 2.0 V

Notes:

1. VCC must be applied simultaneously or before VPP and removed

simultaneously or after VPP.

2. This parameter is only sampled and is not 100% tested.

Output Float is defined as the point where data is no longer

driven — see timing diagram.

3. Program Pulse width tolerance is 100 µsec ± 5%.

Atmel’s 27LV010 Integrated

Product Identification Code(1)

Codes Pins Hex

Data

A0 O7 O6 O5 O4 O3 O2 O1 O0

Manufacturer0000111101E

Device Type100000101O5

Note: 1. The AT27LV010 has the same Product Identification

Code as the AT27C010/L. Both are programming

compatible.

D.C. Programming Characteristics

TA = 25 ± 5oC, VCC = 6.5 ± 0.25 V, VPP = 13.0 ± 0.25 V

Sym-

bol Parameter Test

Conditions Limits Units

Min Max

ILI Input Load Current VIN=VIL,VIH 10 µA

VIL Input Low Level (All Inputs) -0.6 0.8 V

VIH Input High Level 2.0 VCC+1V

VOL Output Low Volt. IOL=2.1 mA .45 V

VOH Output High Volt. IOH=-400 µA2.4 V

ICC2 VCC Supply Current

(Pr ogram and Verify) 40 mA

IPP2 VPP Supply

Current CE=PGM=VIL 20 mA

VID A9 Product

Identification

Voltage 11.5 12.5 V

Rapid Programming Algorithm

A 100 µs PGM pulse width is used to program. The address is

set to the first location. VCC is raised to 6.5 V and V PP is raised

to 13.0 V. Each address is first programmed with one 100 µs

PGM pulse without verification. Then a verification/ repro-

gramming loop is executed for each address. In the event a byte

fails to pass verification, up to 10 successive 100 µs pulses are

applied with a verification after each pulse. If the byte fails to

verify after 10 pulses have been applied, the part is considered

failed. After the byte verifies properly, the next address is se-

lected until all have been checked. VPP is then lowered to 5.0 V

and VCC to 5.0 V. All bytes are read again and compared with

the original data to determine if the device passes or fails.

VCC = 5.0V

VCC = 6.5V

VPP=13.0V

ALL BYTES

COMPARE

DATA

TO ORIGINAL

PASSED

DEVICE

FAILED

FAIL

PASS

ADDR = FIRST LOCATION

START

X = 0

PROGRAM ONE 100 uS PULSE

INCREMENT X

YES

VERIFY

BYTE

X = 10?

FAIL

PASS

ADDR = FIRST LOCATION

ADDR.?

LAST

ADDRESS

INCREMENT NO

YES

PROGRAM ONE 100 uS PULSE NO

INCREMENT

ADDRESS

LAST

ADDR.?

YES

VPP=5.0V

AT27LV010

3-43

tACC

(ns)

ICC (mA)

VCC = 3.6 V Ordering Code Package Operation Range

Active Standby

120 8 0.02 AT27LV010-12DC 32DW6 Commercial

AT27LV010-12JC 32J (0˚C to 70˚C)

AT27LV010-12LC 32LW

AT27LV010-12PC 32P6

AT27LV010-12TC 32T

120 10 0.02 AT27LV010-12DI 32DW6 Industrial

AT27LV010-12JI 32J (-40˚C to 85˚C)

AT27LV010-12LI 32LW

AT27LV010-12PI 32P6

AT27LV010-12TI 32T

150 8 0.02 AT27LV010-15DC 32DW6 Commercial

AT27LV010-15JC 32J (0˚C to 70˚C)

AT27LV010-15LC 32LW

AT27LV010-15PC 32P6

AT27LV010-15TC 32T

150 10 0.02 AT27LV010-15DI 32DW6 Industrial

AT27LV010-15JI 32J (-40˚C to 85˚C)

AT27LV010-15LI 32LW

AT27LV010-15PI 32P6

AT27LV010-15TI 32T

200 8 0.02 AT27LV010-20DC 32DW6 Commercial

AT27LV010-20JC 32J (0˚C to 70˚C)

AT27LV010-20LC 32LW

AT27LV010-20PC 32P6

AT27LV010-20TC 32T

200 10 0.02 AT27LV010-20DI 32DW6 Industrial

AT27LV010-20JI 32J (-40˚C to 85˚C)

AT27LV010-20LI 32LW

AT27LV010-20PI 32P6

AT27LV010-20TI 32T

250 8 0.02 AT27LV010-25DC 32DW6 Commercial

AT27LV010-25JC 32J (0˚C to 70˚C)

AT27LV010-25LC 32LW

AT27LV010-25PC 32P6

AT27LV010-25TC 32T

250 10 0.02 AT27LV010-25DI 32DW6 Industrial

AT27LV010-25JI 32J (-40˚C to 85˚C)

AT27LV010-25LI 32LW

AT27LV010-25PI 32P6

AT27LV010-25TI 32T

= Advance Information

Ordering Information

3-44 AT27LV010

Package Type

32DW6 32 Lead, 0.600" Wide, Windowed, Ceramic Dual Inline Package (Cerdip)

32J 32 Lead, Plastic J-Leaded Chip Carrier OTP (PLCC)

32LW 32 Pad, Windowed, Ceramic Leadless Chip Carrier (LCC)

32P6 32 Lead, 0.600" Wide, Plastic Dual Inline Package OTP (PDIP)

32T 32 Lead, Plastic Thin Small Outline Package OTP (TSOP)

Ordering Information

AT27LV010

3-45