MOTOROLA SEMICONDUCTOR xx TECHNICAL DATA JFET Input Operational Amplifiers These low cost JFET Input operational amplifiers combine two state-of-the-art linear technologies on a single monolithic integrated circuit. Each internally compensated operational amplifier has well matched high voltage JFET input devices for low input offset voltage. The BIFET technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. The Motorola BIFET family offers single, dual and quad operational amplifiers which are pin-compatible with the industry standard MC1741, MC1458, and the MC3403/LM324 bipolar devices. The MC35001/35002/35004 series are specified over the military operating temperature range of -55 to +125C and the MC34001/34002/34004 series are specified from 0 to +70C. Input Offset Voltage Options of 5.0 mV and 10 mV Maximum Low Input Bias Current: 40 pA Low input Offset Current: 10 pA Wide Gain Bandwidth: 4.0 MHz High Slew Rate: 13 V/us @ Low Supply Current: 1.4 mA per Amplifier High Input Impedance: 1012 Q @ High Common Mode and Supply Voltage Rejection Ratios: 100 dB Industry Standard Pinouts ORDERING INFORMATION Op Amp Temperature Function Device Range Package MC34001BD, D SO-8 Single MC34001BP, P 0 to+ 70C Plastic DIP MC34001BU, U Ceramic DIP M \~ \C34002BD, D 0 to 470C SO 8 Dual MC34002BP, P Plastic DIP MC35002BU, U 55 to +125C Ceramic DIP MC34004BL, L 0 to +70C Ceramic DIP Quad MC34004BP, P Plastic DIP MC35004BL, L 55 to +125C Ceramic DIP MC34001, MC35001 MC34002, MC35002 MC34004, MC35004 JFET INPUT OPERATIONAL AMPLIFIERS ~e Ri 3 8 1 1 P SUFFIX U SUFFIX PLASTIC PACKAGE CERAMIC PACKAGE CASE 626 CASE 693 D SUFFIX PLASTIC PACKAGE 8 CASE 751 ' (SO-8) PIN CONNECTIONS Offset Null [1] [a] NC MC34001, Inv. Input > Voc MC35001 Noninv. Input [3! 16] Output {Top View) Vee [| [5] Offset Null Output A MC34002, MC35002 Inputs a{ Top View) 1 L SUFFIX P SUFFIX CERAMIC PACKAGE PLASTIC PACKAGE CASE 632 CASE 646 PIN CONNECTIONS VS Output 1 [7] 114] Output 4 Inputs 1 Eps ge \ Inputs 4 Vec [4] 1] Vee In uts2{ O, 2 } Inputs 3 pt 7 <p Inputs Output 2 [7] {8} Output 3 MC34004, MC35004 (Top View) MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-277MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 MAXIMUM RATINGS MC35001 MC34001 MC35002 MC34002 Rating Symbol MC35004 MC34004 Unit Supply Voltage Voc. VEE 422 +18 v Differential input Voltage (Note 1) Vip +40 +30 Vv Input Voltage Range VIDR +20 +16 Vv Open Short Circuit Duration tsc Continuous Operating Ambient Ta -5 to +125 0 to +70 c Temperature Range Operating Junction Temperature Ty C Ceramic Package 150 150 Plastic Package _ 150 Storage Temperature Range Tstg C Ceramic Package 65 to +150 | -65 to +150 Plastic Package _ ~55 to +125 the negative power supply. NOTES: 1. Unless otherwise specified, the absolute maximum negative input voltage is equal to ELECTRICAL CHARACTERISTICS (Vcc = +15 V, Veg =15 V, Ta = 25C, unless otherwise noted.) MC35001 /35002/35004 MC34001/34002/34004 Characteristics Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage (Rg < 10k) Vio mV MC3500XB, MC3400XB _ 3.0 5.0 _ 3.0 5.0 MC3500X, MC3400X _ 5.0 10 _ 5.0 10 Average Temperature Coefficient of Input Offset Voltage | AViO/AT _ 10 _ _ 10 _ wVvieC Rg < 10k, Ta = Tow to Thigh (Note 2) Input Offset Current (Voy = 0) (Note 3) lo pA MC3500XB, MC3400XB _ 10 50 _ 25 100 MC3500X, MC3400X _ 25 100 _ 25 100 Input Bias Current (Voy = 0) (Note 3) lip pA MC3500XB, MC3400XB 40 100 _ 50 200 MC3500X, MC3400X _ 50 200 _ 50 200 Input Resistance if = 1012 = 1012 = Common Mode Input Voltage Range VICR 14 +415 _ +14 +15 _ Vv _ -12 _ _ -12 _ Large Signal Voltage Gain (Vo = +10 V, Ry = 2.0 k) AVOL Vimv MC3500XB, MC3400XB 50 150 _ 50 150 _ MC3500X, MC3400X 25 100 _ 25 100 - Output Voltage Swing Vo v (RL 2 10k) +12 +14 _ +12 +14 _ (RL, 2 2.0 k) +10 +13 +10 +13 _ Common Mode Rejection Ratio (Rg < 10 k) CMRR dB MC3500XB, MC3400XB 80 100 _ 80 100 _ MC3500X, MC3400X _ _ 70 100 _ Supply Voltage Rejection Ratio (Rg < 10 k) (Note 4) PSRR dB MC3500XB, MC3400XB 80 100 _ 80 100 _ MC3500X, MC3400X 70 100 _ 70 100 _ Supply Current (Each Amplifier) Ip mA MC3500XB, MC3400XB 1.4 25 _ 1.4 2.5 MC3500X, MC3400X _ 1.4 2.7 _ 1.4 2.7 Slew Rate (Ay = 1.0) SR: _ 13 _ _ 13 _ V/us Gain-Bandwidth Product GBW _ 4.0 _ - 4.0 _ MHz Equivalent Input Noise Voltage en _ 25 _ 25 _ nViv Hz (Rg = 100 Q f = 1000 Hz) Equivalent Input Noise Current (f = 1000 Hz) in _ 0.01 _ _ 0.04 _ pA/v Hz MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-278MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 ELECTRICAL CHARACTERISTICS (Vcc = +15 V, Veg = -15 V, Ta = Tow to Thigh [Note 2].) MC35001/35002/35004 MC34001/34002/34004 Characteristics Symbol Min Typ Max Min Typ Max Unit Input Offset Voltage (Rg < 10k) Vio mV MC3500XB, MC3400XB _ _ 7.0 _ 7.0 MC3500X, MC3400X _ - 14 _ 13 Input Offset Current (Vom = 0) (Note 3) lo nA MC3500XB, MC3400XB _ _ 40 - _ 4.0 MC3500X, MC3400X _ 40 _ _ 4.0 Input Bias Current (VcM = 0) (Note 3) le nA MC3500XB, MC3400XB _ _ 50 _ - 8.0 MC3500X, MC3400X _ 50 _ - 8.0 Common Mode Input Voltage Range VICR +11 _ _ +11 _ _ v Large Signal (Vo = +10 V, RL = 2.0 k) AVOL vimv MC3500XB, MC3400XB 25 _ 25 _ - MC3500X, MC3400X 15 _ - 15 _ _ Output Voltage Swing Vo Vv (R 210k) +12 _ _ +12 _ _ (R 2 2.0k) +10 _ +10 _ _ Common Mode Rejection Ratio (Rg < 10 k) CMRR dB MC3500XB, MC3400XB 80 _ _ 80 _ _ MC3500X, MC3400X 70 _ 70 - _ Supply Voltage Rejection Ratio (Rg < 10 k) (Note 4) PSRR dB MC3500XB, MC3400XB 80 _ _ 80 _ _ MC3500X, MC3400X 70 - _ 70 _ - Supply Current (Each Amplifier) Ip mA MC3500XB, MC3400XB _ _ 2.8 _ _ 2.8 MC3500X, MC3400X _ 3.0 _ _ 3.0 NOTES: 2. Tigyw = -55C for MC35001/35001B Thigh = +125C for MC35001/35001B MC35002/35002B MC35002/35002B MC35004/35004B MC35004/35004B = 0C for MC34001/34001B = +70C for MC34001/34001B MC34002/35002B MC34002/35002B MC34004/340048 MC34004/34004B 3. The input bias currents approximately double for every 10C rise in junction temperature, Ty. Due to limited test time, the input bias currents are correlated to junction temperature. Use of a heatsink is recommended if input bias current is to be kept to a minimum. 4. Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice. MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-279MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 Figure 1. Input Bias Current versus Temperature = Qo ljg . INPUT BIAS CURRENT (nA) = = o S 2 -75 -50 -25 0 2 50 75 100 125 Ta, AMBIENT TEMPERATURE (C) Figure 3. Output Voltage Swing versus Load Resistance VocVeEr = 15 V Ta = 25C Vo ,OUTPUT VOLTAGE SWING (Vp-p) 0.41 0.2 04 07 1.0 2.0 40 70 10 Ri, LOAD RESISTANCE (kQ) Figure 5. Output Voltage Swing versus Temperature Vo. OUTPUT VOLTAGE SWING (Vp-p) -50 9-25 0 25 50 7 100 = 125 Ta, AMBIENT TEMPERATURE (C) Vo, OUTPUT VOLTAGE SWING (Vp-p) Vo ,QUTPUT VOLTAGE SWING (Vp.g) |p, SUPPLY DRAIN CURRENT (mA) Figure 2. Output Voltage Swing versus Frequency w So Voce = 15V ny a np So H10V a = Qo a o 8 1.0k 10k 100 k f, FREQUENCY (Hz) 1.0M 10M Figure 4. Output Voltage Swing versus Supply Voltage Ry = 2.0k Ta = 25C 0 5.0 10 15 20 Voce , SUPPLY VOLTAGE (V) Figure 6. Supply Current per Amplifier versus Temperature =t15V -50 9-25 0 25 50 7 100125 Ta, AMBIENT TEMPERATURE (C) MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-280MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 Figure 7. Large-Signal Voltage Gain and Figure 8. Large-Signal Voltage Gain Phase Shift versus Frequency versus Temperature 3 Voc/VEE = 15 V Vo =+10V v =H5V COME RL=20k RL = 20k Ta = 25C 3% 3 % 10 AvoL, OPEN-LOOP GAIN % R PHASE SHIFT (DEGREES) Avo VOLTAGE GAIN (VimV) 10 1 180 1.0 10 10 100 10k 10k 100k 1.0M 10M 10M $0 -2 0 2 50 75 100 125 f, FREQUENCY (Hz) Ta, AMBIENT TEMPERATURE (C) Figure 9. Normalized Slew Rate Figure 10. Equivalent Input Noise Voltage versus Temperature versus Frequency _ _ an VocVer = +15 V Ay=10 Rg = 1002 = 25C = o 1.05 0.95 NORMALIZED SLEW RATE 8 3 0.85 Q 0.01 0.05 0.1 0.5 1.0 5.0 10 50 100 f, FREQUENCY (kHz) -50 0-25 0 25 50 7 100 = 125 Ta, AMBIENT TEMPERATURE (C) ep , EQUIVALENT INPUT NOISE VOLTAGE (nV/VHz ) Figure 11. Total Harmonic Distortion versus Frequency o z B 05 = & VoclVer = 15 Vde 5 01 Ay=1.0 a Vo = 6.0 V (RMS) g Ta = 25C So 0.05 = =< = 0.01 z e 0.005 Ss = 0.00 05 1.0 5.0 10 50 100 {, FREQUENCY (kHz) MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-281MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 Representative Circuit Schematic (Each Amplifier) Bias Circuitry Common to Alt ou Amplifiers [ Cs vo } | | Q4 Q5 Q2 o1 | | * A KUR | ! 6 Pp | | - rT) 2 4 | | Inputs | | +O e017 | 2.0k | 4 K | | 1] re Lt || [ | Lots fers Q23 | | 10pF ais l , 24 | 021 faze Oe ! | attr foe figs cs) Lint tt a a | Q10) an 199 a8 7 Q25 | | N | | Offset oO Q18 | | Null | | (MC34001, 1.5k 1.5k ; | | MC35001 I | only) 0 ~ VEE Figure 12. Output Current to Voltage Transformation for a D-to-A Converter Vo = 5.0V 13 Settling time to within 1/2 LSB (+19.5 mV) is approximately 4.015 _ 44 Ri from the time all bits are switched. MSB AI 5 O- : t Vref *The value of C may be selected to minimize overshoot and ring- A2 60-4 15 ing (C = 68 pF) AS 70-44 [oO M 80-4 wh rns R2 = Vcoc=15V Theoretical VQ AS 9 0- Series isl Ae AB AS AS AB AT | AB Ag 10 0-4 Yo= "a, Rolla +4 tg t 16 * a2 * 64 * 128 * 256 AT 11 0 Adjust ve Ry or Rc so that Vo with all digital inputs at high level LSB AB 12 O- is equal to 9.961 V. 16 Vref = 2.0 Vde Ry = R2 = 1.0kQ Ver = -18V Rg = 5.0 kQ Vee -18V " , y 20V iy [+s tye 1 tt pt tt 0 i O= 10k 2 8 * 16 * 32 * 64 *128 * 256 Cc =10v | 2] = = 9.961 V MOTOROLA LINEAR/ANTERFACE ICs DEVICE DATA 2-282MC34001, MC35001, MC34002, MC35002, MC34004, MC35004 Figure 13. Positive Peak Detector O Vo wn wr Vin @- + =) in ee INSN4 7S uF 1/2MC34002 40 VEE 1/2 MC34002 Reset wes *Polycarbonate capacitor or Relay D1 = Hi-speed, low-reverse leakage diode Figure 14. Long Interval RC Timer Figure 15. lsolating Large Capacitive Loads H15V R2 5.1k ~O Vo VR af R6 +2.0V = CL0.5uF Clear Cc 0 L T -2.0V = Run Overshoot < 10% RS Polycarbonate or * tg= 10s + Polystyrene Capacitor When driving large C_, the Vo slew rate is determined by CL and lo(max): Time (t) = R4 Cn (Vp/Vp-V)), Rg = Ra, Ag = 0.1 Rg AVo_!o _ 0.02 _ , IfR1 = R2:t= 0.693 RAC At CL (OS Vius = 0.04 Vilas (with Ct, shown) Design Example: 100 Second Timer Va=10V C=l0uF R3=R4= 144M R6=20k R5=2.0k R1=R2=1.0k Figure 16. Wide BW, Low Noise, Low Drift Amplifier C2 f fmax = 240 kHz At 10V VinO-Ww# ~10V C1: O _ MC34001 S Power BW: {max = np = Parasitic input capacitance (C1 = 3.0 pF plus any additional layout capacitance) interacts with feedback elements and creates undesirable high-frequency pole. To compensate add C2 such that: R2C2 = R1C1. MOTOROLA LINEAR/INTERFACE ICs DEVICE DATA 2-283