February 2011 Doc ID 7380 Rev 4 1/28
1
VND830SP
Double channel high-side driver
Features
■CMOS compatible inputs
■Open Drain status outputs
■On-state open-load detection
■Off-state open-load detection
■Shorted load protection
■Undervoltage and overvoltage shutdown
■Loss of ground protection
■Very low standby current
■Reverse battery protection
Description
The VND830SP is a monolithic device designed
in| STMicroelectronics™ VIPower™ M0-3
Technology. The VND830SP is intended for
driving any type of multiple load with one side
connected to ground.
The active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table). Active current
limitation combined with thermal shutdown and
automatic restart protects the device against
overload.
The device detects the open-load condition in
both the on-state and off-state. In the off-state the
device detects if the output is shorted to VCC. The
device automatically turns off in the case where
the ground pin becomes disconnected.
Type RDS(on) IOUT VCC
VND830SP 60mΩ(1)
1. Per each channel.
6A(1) 36V
PowerSO-10
1
10
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSO-10 VND830SP VND830SP13TR
www.st.com
Contents VND830SP
2/27 Doc ID 7380 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4 Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 19
4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2 PowerSO-10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3 PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VND830SP List of tables
Doc ID 7380 Rev 4 3/27
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 8. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 15. PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 16. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of figures VND830SP
4/27 Doc ID 7380 Rev 4
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 22. Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 23. Open-load off-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 27. PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 28. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
Figure 29. Thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . 21
Figure 31. PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 32. PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 33. PowerSO-10 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VND830SP Block diagram and pin description
Doc ID 7380 Rev 4 5/27
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ
resistor
OVERTEMP. 1
Vcc
GND
INPUT1 OUTPUT1
OVERVOLTAGE
LOGIC
DRIVER 1
STATUS1
Vcc
CLAMP
UNDERVOLTAGE
CLAMP 1
OPEN LOAD ON 1
CURRENT LIMITER 1
OPEN LOAD OFF 1
OUTPUT2
DRIVER 2
CLAMP 2
OPEN LOAD ON 2
OPEN LOAD OFF 2
OVERTEMP. 2
INPUT2
STATUS2
CURRENT LIMITER 2
1
2
3
4
5
6
7
8
9
10
11
OUTPUT 1
OUTPUT 1
N.C.
OUTPUT 2
OUTPUT 2
GROUND
INPUT 1
STATUS 1
STATUS 2
INPUT 2
V
CC
Electrical specifications VND830SP
6/27 Doc ID 7380 Rev 4
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
-VCC Reverse DC supply voltage - 0.3 V
-IGND DC reverse ground pin current - 200 mA
IOUT DC output current Internally limited A
-IOUT Reverse DC output current - 6 A
IIN DC input current +/- 10 mA
ISTAT DC Status current +/- 10 mA
VESD
Electrostatic discharge (human body model: R = 1.5 KΩ;
C=100pF)
–INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 1.8 mH; RL=0Ω; Vbat =13.5V; T
jstart = 150 °C; IL=9A) 100 mJ
Ptot Power dissipation (per island) at Tlead =25°C 73.5 W
TjJunction operating temperature Internally limited °C
TcCase operating temperature - 40 to 150
Tstg Storage temperature - 55 to 150 °C
VND830SP Electrical specifications
Doc ID 7380 Rev 4 7/27
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC <36V; -40°C<T
j< 150 °C, unless
otherwise stated.
Figure 3. Current and voltage conventions
Note: VFn = VCCn - VOUTn during reverse battery condition.
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
Rthj-lead Thermal resistance junction-lead 1.7 °C/W
Rthj-amb Thermal resistance junction-ambient 51.7(1)
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
37(2)
2. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
°C/W
IS
IGND
OUTPUT 2
VCC
GND
STATUS 2
INPUT 2 IOUT2
IIN2
ISTAT2
VSTAT2
VIN2
VCC
VOUT2
OUTPUT 1
IOUT1
VOUT1
INPUT 1
IIN1
STATUS 1
ISTAT1
VIN1
VSTAT1
V
F1
(*)
Electrical specifications VND830SP
8/27 Doc ID 7380 Rev 4
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 5. Power output
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC
Operating supply
voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VOV Overvoltage shutdown 36 V
RON On-state resistance IOUT =2A; T
j=25°C 60 mΩ
IOUT =2A; V
CC > 8 V 120 mΩ
IS Supply current
Off-state; VCC =13V;
VIN =V
OUT =0V 12 40 µA
Off-state; VCC =13V;
VIN =V
OUT =0V; T
j=25°C 12 25 µA
On-state; VCC =13V; V
IN =5V;
IOUT =0A 57mA
IL(off1) Off-state output current VIN =V
OUT =0V 0 50 µA
IL(off2) Off-state output current VIN =0V; V
OUT =3.5V -75 0 µA
IL(off3) Off-state output current VIN =V
OUT =0V; V
CC =13V;
Tj=125°C 5µA
IL(off4) Off-state output current VIN =V
OUT =0V; V
CC =13V;
Tj=25°C 3µA
Table 6. Protections
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
conditions Tj > TTSD 20 µs
Ilim Current limitation VCC =13V 6 9 15 A
5.5 V < VCC < 36 V 15 A
Vdemag Turn-off output clamp voltage IOUT =2A; L=6mH VCC -
41
VCC -
48
VCC -
55 V
Table 7. VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage -IOUT = 1.3 A; Tj=150°C — — 0.6 V
VND830SP Electrical specifications
Doc ID 7380 Rev 4 9/27
Table 8. Switching (VCC = 13V; Tj = 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time
RL=6.5Ω from VIN rising
edge to VOUT =1.3V
(see Figure 5)
—30—µs
td(off) Turn-off delay time
RL=6.5Ω from VIN falling
edge to VOUT =11.7V
(see Figure 5)
—30—µs
dVOUT/dt(on) Turn-on voltage slope
RL=6.5Ω from VOUT =1.3V
to VOUT =10.4V
(see Figure 5)
—See
Figure 19 —V/µs
dVOUT/dt(off) Turn-off voltage slope RL=6.5Ω from VOUT = 11.7 V
to VOUT = 1.3 V (see Figure 5)—See
Figure 21 —V/µs
Table 9. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN =1.25V 1 µA
VIH Input high level 3.25 V
IIH High level input current VIN = 3.25 V 10 µA
VI(hyst) Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN =1mA 6 6.8 8 V
IIN =-1mA -0.7 V
Table 10. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT =1.6mA 0.5 V
ILSTAT Status leakage current Normal operation;
VSTAT =5V 10 µA
CSTAT Status pin Input capacitance Normal operation;
VSTAT =5V 100 pF
VSCL Status clamp voltage ISTAT =1mA 6 6.8 8 V
ISTAT =- 1mA -0.7 V
Table 11. Open-load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL Open-load on-state detection threshold VIN = 5 V 50 100 200 mA
tDOL(on) Open-load on-state detection delay IOUT =0A 200 µs
VOL
Open-load off-state voltage detection
threshold VIN =0V 1.5 2.5 3.5 V
tDOL(off) Open-load detection delay at turn-off 1000 µs
Electrical specifications VND830SP
10/27 Doc ID 7380 Rev 4
Figure 4. Status timings
Figure 5. Switching characteristics
V
INn
V
STATn
t
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
V
INn
V
STATn
OVER TEMP STATUS TIMING
t
SDL
t
SDL
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
TSD
VND830SP Electrical specifications
Doc ID 7380 Rev 4 11/27
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Table 13. Electrical transient requirements
ISO T/R
7637/1
Test pulse
Test level
I II III IV Delays and impedance
1- 25V
(1)
1. All functions of the device are performed as designed after exposure to disturbance.
- 50V(1) - 75V(1) - 100V(1) 2ms, 10Ω
2 + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.2ms, 10Ω
3a - 25V(1) - 50V(1) - 100V(1) - 150V(1) 0.1µs, 50Ω
3b + 25V(1) + 50V(1) + 75V(1) + 100V(1) 0.1µs, 50Ω
4- 4V
(1) - 5V(1) - 6V(1) - 7V(1) 100ms, 0.01Ω
5+ 26.5V
(1) + 46.5V(2)
2. One or more functions of the device is not performed as designed after exposure and cannot be returned to
proper operation without replacing the device.
+ 66.5V(2) + 86.5V(2) 400ms, 2Ω
Electrical specifications VND830SP
12/27 Doc ID 7380 Rev 4
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUSn
INPUTn
NORMAL OPERATION
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUTn
OVERVOLTAGE
VCC
VCC > VOV
STATUS
INPUTn
STATUSn
STATUSn
INPUTn
STATUSn
INPUTn
OPEN LOAD with external pull-up
undefined
OVERTEMPERATURE
INPUTn
STATUSn
TTSD
TR
Tj
LOAD VOLTAGEn
VCC<VOV
LOAD VOLTAGEn
LOAD VOLTAGEn
LOAD VOLTAGEn
LOAD VOLTAGEn
LOAD CURRENTn
VOUT > VOL
VOL
VND830SP Electrical specifications
Doc ID 7380 Rev 4 13/27
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope
Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
IL(off1) (uA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
dVout/dt(on) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
200
250
300
350
400
450
500
550
600
dVout/dt(off) (V/ms)
Vcc=13V
Rl=6.5Ohm
Electrical specifications VND830SP
14/27 Doc ID 7380 Rev 4
Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC
Figure 15. Input high level Figure 16. Input hysteresis voltage
Figure 17. On-state resistance vs Tcase Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
2
4
6
8
10
12
14
16
18
20
Ilim (A)
Vcc=13V
5 10152025303540
Vcc (V)
0
10
20
30
40
50
60
70
80
90
100
110
120
Ron (mOhm)
Iout=5A
Tc= - 40°C
Tc=25°C
Tc=150°C
-50 -25 0 25 50 75 100 125 150 175
Tc ( ° C)
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
20
40
60
80
100
120
140
160
Ron (mOhm)
Iout=2A
Vcc=8V; 13V & 36V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
Vil (V)
VND830SP Electrical specifications
Doc ID 7380 Rev 4 15/27
Figure 19. Status leakage current Figure 20. Status low output voltage
Figure 21. Status clamp voltage Figure 22. Open-load on-state detection
threshold
Figure 23. Open-load off-state detection
threshold
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.01
0.02
0.03
0.04
0.05
Ilstat (uA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Vstat (V)
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Istat=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
50
60
70
80
90
100
110
120
130
140
150
Iol (mA)
Vcc=13V
Vin=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
Application information VND830SP
16/27 Doc ID 7380 Rev 4
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1. RGND ≤ 600 mV / 2 (IS(on)max)
2. RGND ≥ (-VCC) / (-IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
V
CC
OUTPUT2
D
ld
+5V
R
prot
OUTPUT1
STATUS1
INPUT1
+5V
STATUS2
INPUT2
GND
+5V
μ
CR
prot
R
prot
R
prot
D
GND
R
GND
V
GND
VND830SP Application information
Doc ID 7380 Rev 4 17/27
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high-side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (≈600 mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the microcontroller I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
- VCCpeak / Ilatchup ≤ Rprot ≤ (VOHμC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = -100 V
Ilatchup ≥ 20 mA
VOHμC ≥ 4.5 V
5kΩ ≤ Rprot ≤ 65 kΩ.
Recommended values are:
Rprot = 10 kΩ
Application information VND830SP
18/27 Doc ID 7380 Rev 4
3.4 Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. No false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2. No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
Figure 25. Open-load detection in off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
INPUT
STATUS
VCC
OUT
GROUND
IL(off2)
VND830SP Application information
Doc ID 7380 Rev 4 19/27
3.5 Maximum demagnetization energy (VCC = 13.5V)
Figure 26. Maximum turn-off current versus load inductance
Note: Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
1
10
100
0,1 1 10 100
L( mH)
ILM AX (A)
VIN, IL
t
Demagnetization Demagnetization Demagnetization
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
C= repetitive pulse at TJstart = 125ºC
A
B
C
Package and PCB thermal data VND830SP
20/27 Doc ID 7380 Rev 4
4 Package and PCB thermal data
4.1 PowerSO-10 thermal data
Figure 27. PowerSO-10 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB
thickness = 2 mm, Cu thickness = 35 µm, Copper areas: from minimum pad lay-out to
8cm2).
Figure 28. Rthj-amb vs PCB copper area in open box free air condition
30
35
40
45
50
55
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb (°C/W)
Tj-Tamb=50°C
VND830SP Package and PCB thermal data
Doc ID 7380 Rev 4 21/27
Figure 29. Thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
Figure 30. Thermal fitting model of a double channel HSD in PowerSO-10
ZTHδRTH δZTHtp 1δ–()+⋅=
where
δtpT⁄=
T_amb
Pd1
C1
R4
C3 C4
R3R1 R6R5R2
C5 C6C2
Pd2
R2
C1 C2
R1
Tj_1
Tj_2
Package and PCB thermal data VND830SP
22/27 Doc ID 7380 Rev 4
Table 14. Thermal parameters
Area / island (cm2) Footprint 6
R1 (°C/W) 0.15
R2 (°C/W) 0.8
R3 (°C/W) 0.7
R4 (°C/W) 0.8
R5 (°C/W) 12
R6 (°C/W) 37 22
C1 (W.s/°C) 0.0006
C2 (W.s/°C) 2.1E-03
C3 (W.s/°C) 0.013
C4 (W.s/°C) 0.3
C5 (W.s/°C) 0.75
C6 (W.s/°C) 3 5
VND830SP Package and packing information
Doc ID 7380 Rev 4 23/27
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 PowerSO-10 package information
Figure 31. PowerSO-10 package dimensions
DETAIL "A"
PLANE
SEATING
α
L
A1
F
A1
h
A
D
D1
= =
= =
E4
0.10 A
E
C
A
B
B
DETAIL "A"
SEATING
PLANE
E2
10
1
eB
HE
0.25
Package and packing information VND830SP
24/27 Doc ID 7380 Rev 4
Table 15. PowerSO-10 mechanical data
DIM.
mm.
Min. Typ. Max.
A 3.35 3.65
A(1)
1. Muar only POA P013P.
3.4 3.6
A1 0 0.10
B 0.40 0.60
B(1) 0.37 0.53
C 0.35 0.55
C(1) 0.23 0.32
D 9.40 9.60
D1 7.40 7.60
E 9.30 9.50
E2 7.20 7.60
E2(1) 7.30 7.50
E4 5.90 6.10
E4(1) 5.90 6.30
e1.27
F 1.25 1.35
F(1) 1.20 1.40
H 13.80 14.40
H(1) 13.85 14.35
h0.50
L 1.20 1.80
L(1) 0.80 1.10
α0° 8°
α(1) 2° 8°
VND830SP Package and packing information
Doc ID 7380 Rev 4 25/27
5.3 PowerSO-10 packing information
Figure 34. PowerSO-10 tape and reel shipment (suffix “TR”)
Figure 32. PowerSO-10 suggested
pad layout
Figure 33. PowerSO-10 tube shipment
(no suffix)
B
A
C
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)
Casablanca 50 1000 532 10.4 16.4 0.8
Muar 50 1000 532 4.9 17.2 0.8
C
A
B
MUARCASABLANCA
Base Q.ty 600
Bulk Q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compartment Depth K (max) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
Revision history VND830SP
26/27 Doc ID 7380 Rev 4
6 Revision history
Table 16. Document revision history
Date Revision Changes
09-Sep-2004 1 Initial release.
03-Mar-2008 2
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and n.c. pins insertion (page 2).
6 cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 4).
Protections note insertion (page 4).
Revision history table insertion (page 18).
Disclaimers update (page 19).
09-Dec-2008 3
Document reformatted and restructured.
Added contents, list of tables and figures.
Added Section 5.1: ECOPACK® packages information.
07-Feb-2011 4
Changed document template.
Updated Figure 5: Switching characteristics
Updated Table 8: Switching (VCC = 13V; Tj = 25°C)
VND830SP
Doc ID 7380 Rev 4 27/27
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2011 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
