128K x 16 Static RAM
CY62137V MoBL™
PRELIMINARY
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
July 29, 1999
Features
• Low vol t age range :
—1.8V–3.3V
• U ltra-l ow acti ve, st andby power
• Easy memory expansi on wit h CE and OE features
• TTL-compat ible inputs and outputs
• Automat ic power -down when deselected
• CMOS for optimum speed/power
Functional Description
The CY62137V is a high-perfor mance CMO S static RAM or-
ganiz ed as 131,072 wor ds b y 16 bit s. Thi s devi ce feat ures ad-
vanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life™ (MoBL™) in portable
applications such as cellular telephones. The device also has
an automatic power-down feature that significantly reduces
powe r cons umption b y 99% when addr esses are not toggli ng.
The device ca n also be put int o standby mode when deselec-
tect ed (C E HIGH) or when CE is LO W and both BLE and BHE
are HIGH. The input/output pins (I/O0 through I/O15) are
placed in a high impedance state when: deselected (CE
HIGH), outputs are disabled (OE HIGH), BHE and BLE are
disabled (BHE, BLE HIGH), or during a write operation (CE
LO W, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) i nputs LOW. If Byte Low Enable
(BLE) i s LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIG H. If Byte Low Enable (BLE) is LOW,
then data from the memory locati on specif ied by the address
pins will appear on I /O0 to I/O 7. If Byte High Enable (BHE) is
LO W, then data f rom memory will app ear on I/ O8 to I/O15. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
The CY62137V MoBL SRAM has an e xtremely wi de operating
vol tage range . This data sh eet has been speci fied to accur ate-
ly describe the de vice beha vior at thr ee common vo ltage rang -
es (3.3–2.7, 2.7– 2.3, 2.3–1.8)
The CY62137V is available in 48-ball FBGA and standard
44-pin TSOP Type I I (forward pi nout) packaging.
Logic Block Diagram Pin Configurations
WE
1
2
3
4
5
6
7
8
9
10
11
14 31
32
36
35
34
33
37
40
39
38
Top Vie w
12
13
41
44
43
42
16
15 29
30
VCC
A16
A15
A14
A13 NC
A4
A3
OE
VSS
A5
I/O15
A2
CE
I/O2
I/O0
I/O1
BHE
NC
A1
A0
18
17
20
19
I/O3
27
28
25
26
22
21 23
24
VSS
I/O6
I/O4
I/O5
I/O7
A6
A7
BLE
VCC
I/O14
I/O13
I/O12
I/O11
I/O10
I/O9
I/O8
A8
A9
A10
A11
62137V–2
TSOP II (Forward)
128K x 16
RAM Array I/O0 – I/O7
ROW DECODER
A9
A7
A6
A5
A0
COLUMN DECODER
A11
A12
A13
A14
A15
SENSE AMPS
DATA IN DRIVERS
OE
A4
A8
I/O8 – I/O15
CE
WE
BLE
BHE
A10
62137V–1
A16
A12
Power Down
Circuit
A3
A2
A1
BHE
BLE
CE
MoBL and More Battery Lif e are t rademarks of Cypress Semiconductor Corp oration.