©2010 Semiconductor Components Industries, LLC.
September-2017, Rev. 1
Publication Order Number:
FDD3682-F085/D
FDD3682-F085
N-Channel PowerTrench® MOSFET
100V, 32A, 36mΩ
Features
• rDS(ON) = 32mΩ (Typ.), VGS = 10V, ID = 3 2A
• Qg(t ot) = 18.5nC (Typ.), VGS = 10 V
•Low Mi ller Charge
•Low QRR Body Diode
•UIS Capability (Single Pulse and Repetitive Pulse)
•Qualified to AEC Q101
Formerly developmental type 82755
Applications
•DC/DC converters and Off-Line UPS
•Distributed Power Architectures and VRMs
•Primary Switch for 24V and 48V Systems
•High Voltage Synchronous Rectifier
•Direct Injection / Diesel Injection System
•42V Au tomotive Load Control
•Electronic Valve Train System
MOSFET Maximum Ratings TC = 25°C unless otherwise note d
Thermal Characteristics
This product has been de si gned to mee t the extreme test conditions and environme nt deman ded by the automotive industry. For a
copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/
All ON Semiconductor products are manufactured, assembled and tested under ISO9000 and QS9000 quality systems
certification.
Symbol Parameter Ratings Units
VDSS Drain to Source Voltage 100 V
VGS Gate to Sourc e Volta ge ±20 V
ID
Drain Cur re nt 32 A
Continuous (TC = 25oC, VGS = 1 0V)
Continuous (TC = 100oC, VGS = 10V) 23 A
Continuous (Tamb = 25oC, VGS = 10V, RθJA = 52oC/W) 5.5 A
Pulsed Figure 4 A
EAS Single Pulse A v alanche Energy (Note 1) 55 mJ
PDPower dissipation 95 W
Derate above 25oC0.63W/
oC
TJ, TSTG Oper ating and Storage Temperature -55 to 175 oC
RθJC Therm al Resistance J unction to Case TO-252 1.58 oC/W
RθJA Thermal Resistance Junction to Ambient TO-252 100 oC/W
RθJA Thermal Re sistan ce Junction t o Ambi ent TO-252, 1in2 co pper pad area 52 oC/W
D
G
S
TO-252AA
FDD SERIES
GATE
SOURCE
(FLANGE)
DRAIN
FDD3682-F085 N-Channel PowerTrench® MOSFET
•RoHS Compliant
Package Marking and Order ing Informatio n
Electrical Characteristics TC = 2 5°C unless otherwise noted
Off Characteri stics
On Characteristics
Dynamic Characteristic s
Resistive Switching Characteristics (VGS = 10V)
Drain-Source Diode Character istics
Notes:
1: Starting TJ = 25°C, L = 0.27mH, IAS = 20A.
Device Marking Device Package Reel Size Tape Width Quantity
FDD3682 FDD3682-F085
Symbo l Parame ter Te st Cond itio ns Min Typ Max Unit s
BVDSS Dr ain to Source Breakdown Voltage ID = 250µA, VGS = 0V 10 0 - - V
IDSS Zero Gate Voltage Drain Current VDS = 80V - - 1 µA
VGS = 0V TC = 150oC- - 250
IGSS Gate to Source Leakage Current VGS = ±20V - - ±100 nA
VGS(TH) Gate to Source Threshold Voltage VGS = VDS, ID = 250µA2-4V
rDS(ON) Drain to Source On Resistance
ID = 3 2A, VGS = 10V - 0.032 0.036
Ω
ID = 16A, VGS = 6V - 0.040 0.060
ID = 3 2A, VGS = 10V,
TC = 175oC- 0.080 0.090
CISS Input Capacitance VDS = 25V, VGS = 0V,
f = 1MHz
-1250- pF
COSS Output Capacitance - 190 - pF
CRSS Revers e Transfer Capacitance - 45 - pF
Qg(TOT) Total G ate Ch arg e at 10 V VGS = 0V to 10V
VDD = 50V
ID = 32A
Ig = 1.0mA
-18.528nC
Qg(TH) Threshold Gate Charge VGS = 0V to 2V - 2.4 3.6 nC
Qgs Gate to Source Gate Charge - 6.5 - nC
Qgs2 Gate Charge Threshold to Plateau - 4.1 - nC
Qgd Gate to Drain “Miller” Charge - 4.6 - nC
tON Turn-On Time
VDD = 50V, ID = 32A
VGS = 10 V, RGS = 16Ω
--83ns
td(ON) Turn-On Delay Time - 9 - ns
trRise Time - 46 - n s
td(OFF) Turn-Off Delay Time - 24 - ns
tfFall Time - 26 - ns
tOFF Turn-Off Time - - 75 ns
VSD Sourc e to Drain Diode Voltage ISD = 32A - - 1.25 V
ISD = 16A - - 1.0 V
trr Rev erse Recovery Time ISD = 32A, dISD/dt = 100A/µs- - 55 ns
QRR Rev erse Recovery Charge ISD = 32A, dISD/dt = 100A/µs- - 92 nC
TO-252AA 330mm 16mm 2500 units
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2
FDD3682-F085 N-Channel PowerTrench® MOSFET
Typical Characteristics TC = 25°C unless othe rwise noted
Figure 1. Normalized Po wer Dissipat ion vs
Ambient Temperature Figure 2. Maxi mum Continuous Drai n Current vs
Case Temperature
Figure 3. Normalized Maximum Transient Thermal Impedance
Figure 4. Peak Current Capability
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
00255075100 175
0.2
0.4
0.6
0.8
1.0
1.2
125 150 0
5
10
15
20
25
30
35
25 50 75 100 125 150 175
ID, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
VGS = 10V
0.01
0.1
1
10-4 10-3 10-2 10-1 100101
10-5
2
t, RECTANGULAR PULSE DURATION (s)
ZθJC, NORMALIZED
THERMAL IMPEDANCE
NOTES:
DUTY FA CTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
PDM
t1t2
0.5
0.2
0.1
0.05
0.01
0.02
DUTY CYCLE - DESC ENDING ORDER
SING LE PULSE
100
10-5 10-4 10-3 10-2 10-1 100101
30
400
IDM, PEAK CURRENT (A)
t, PULSE WIDTH (s)
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
VGS = 10V
TC = 25oC
I = I25 175 - TC
150
FOR TEMPERATURES
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
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3
FDD3682-F085 N-Channel PowerTrench® MOSFET
Figure 5. For ward Bi as Safe Oper ating Area NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
Figure 7. Transfer Characteristics Figure 8. Saturati on Characteristi cs
Figur e 9 . Dr ain t o So urce On Resis tance v s Dr ain
Current Figure 10. Normalized Drain to Source On
Resist ance vs Junction Temperature
Typical Characteristics TC = 2 5°C unless o therwi s e note d
VDS, DRAIN TO SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
0.1
1
10
100
110 100 200
200
TJ = MAX RATED
TC = 25oC
SINGLE PULSE
LIMITED BY rDS(ON)
AREA MAY BE
OPERATION IN THIS
10µs
100µs
1ms
10ms
DC
1
10
100
0.001 0.01 0.1 1 10
IAS, AVALANCHE CURRENT (A)
tAV, TIME IN AVALANCHE (ms)
STARTING TJ = 25oC
STARTING TJ = 150oC
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R = 0
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
0
20
40
60
80
3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5
ID, DRAIN CURRENT (A)
VGS, G ATE TO S OURCE VOLTAGE (V)
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDD = 15V
TJ = 175oC
TJ = 25oC
TJ = -55oC
0
20
40
60
80
01234
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 6V
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 5V
TC = 25oC
VGS = 20V
VGS = 10V
20
30
40
50
60
05 10 15 20 25 30 35
Id, DRAIN CURRENT (A)
VGS = 10V
DRAIN TO SOURCE ON RESISTANCE (mΩ)
VGS = 6V
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
0.5
1.0
1.5
2.0
2.5
3.0
-80 -40 0 40 80 120 160 200
NORMALIZED DRAIN TO SOURCE
TJ, JUNCTION TEMPERATURE (oC)
ON RESISTANCE
VGS = 10V, ID =32A
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
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4
FDD3682-F085 N-Channel PowerTrench® MOSFET
Figur e 11. Normalized Gat e Threshold Volt age vs
Junction Temper ature Figure 12. Normalized Dr ain to Source
Breakdown Voltage vs Junction Temperature
Figure 13. Capacitance vs Drain to Sour ce
Voltage Figure 14. Gate Charge Waveforms for Cons tant
Gate Curren ts
Typical Characteristics TC = 25°C unless othe rwise noted
0.4
0.6
0.8
1.0
1.2
-80 -40 0 40 80 120 160 200
NORMALIZED GATE
TJ, JUNCTION TEMP ERATURE (oC)
VGS = VDS, ID = 250µA
THRESHOLD VOLTAGE
0.9
1.0
1.1
1.2
-80 -40 0 40 80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
ID = 250µA
BREAKDOWN VOLTAGE
100
1000
0.1 1 10 100
2000
20
C, CAPACITANCE (pF)
VGS = 0V, f = 1MHz
CISS = CGS + CGD
COSS ≅ CDS + CGD
CRSS = CGD
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
2
4
6
8
10
05 10 15 20
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 50V
ID = 32A
ID = 16A
WAVEFORMS IN
DESCENDING ORDER:
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5
FDD3682-F085 N-Channel PowerTrench® MOSFET
Test Circuits and Waveforms
Figure 15. Unclamp ed Energy Test Cir cuit Figur e 16. Unclamped Energy Wavef orm s
Figure 17. Gate Charge Test Ci rcuit Figure 18. Gate Charge Waveforms
Figure 19. Swit ching Time Test Circuit Figure 20. Switching Time Waveforms
tP
VGS
0.01Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
VGS +
-
VDS
VDD
DUT
Ig(REF)
L
VDD
Qg(TH)
VGS = 2V
Qg(TOT)
VGS = 10V
VDS
VGS
Ig(REF)
0
0
Qgs Qgd
Qgs2
VGS
RL
RGS
DUT
+
-VDD
VDS
VGS
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%50%
10% PULSE WI DT H
VGS
0
0
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6
FDD3682-F085 N-Channel PowerTrench® MOSFET
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJM, and the
thermal resistance of the heat dissipating path determines
the maxi mum al lowab le devi ce powe r di ssipat ion, PDM, in an
application. Therefore the application’s ambient
temperature, TA (oC), and thermal resistance RθJA (oC/W)
must be reviewed to ensure that TJM is never exceeded.
Equation 1 mathematically represents the relationship and
s erves as the basis f or establishing the rating of the part.
In using surface mount devices such as the TO-252
package, t he environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of PDM is
c omplex an d infl uenced by many factors:
1. Mount ing pad area on to which th e device is a ttach ed and
wh ethe r the re is copp er o n on e sid e or bot h si des o f t he
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow an d board orientation.
6. For non steady state applications, the pulse width, the
duty cycle a nd the transient thermal respon se of the part,
the board and the environment they are in.
ON Semiconductor provides thermal information to assist the
designer’s preliminary application evaluation. Figure 21
defines the RθJA for the device as a function of the top
copper (component side) area. This is for a horizontally
positioned FR-4 board with 1oz copper after 1000 seconds of
steady state power with no air flow. This graph provides the
necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse
applications can be evaluated using the ON
Semiconductor device Spice thermal model or manually
utilizing the normalized maximum transient thermal
impedance curve.
Thermal resistances corresponding to other copper areas
can be obtained from Figure 21 or by calculation using
Equation 2 or 3. Equation 2 is used for copper area
defined in inches square and equation 3 is for area in
centimeter square. The area, in square inches or square
centimeters is the top copper area including the gate and
source pads.
(EQ. 1)
PDM
TJM TA
–()
RθJA
-----------------------------
=
Area in Inches Squared
(EQ. 2)
RθJA 33.32 23.84
0.268 Area+()
-------------------------------------
+
=
(EQ. 3)
RθJA 33.32 154
1.73 Area+()
----------------------------------
+
=
Area in Centimeters Squared
25
50
75
100
125
0.01 0.1 1 10
Figure 21. Ther mal Resi stance vs Mounting
Pad Area
RθJA = 33.32+ 23.84/(0.268+Area) EQ.2
RθJA (oC/W)
AREA, TOP COPPER AREA in2 (cm2)
RθJA = 33.32+ 154/(1.73+Area) EQ.3
(0.645) (6.45) (64.5)(0.0645)
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7
FDD3682-F085 N-Channel PowerTrench® MOSFET
PSPICE Electrical Model
.SU BC K T FD D3682 2 1 3 ; rev Jun 2002
Ca 12 8 4e-10
Cb 1 5 14 6e-10
Cin 6 8 1.22e-9
D bo dy 7 5 Dbod yMOD
Dbreak 5 11 D break MO D
Dplc ap 10 5 Dplcap M OD
Ebreak 11 7 17 18 112
Ed s 1 4 8 5 8 1
Eg s 1 3 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtem p 20 6 18 22 1
It 8 17 1
Lgate 1 9 4.88e-9
Ldrai n 2 5 1.0e-9
Lsource 3 7 2.24e-9
RLgate 1 9 48.8
R Ld rain 2 5 10
RLsource 3 7 22. 4
Mm e d 16 6 8 8 M m edMOD
Mstro 16 6 8 8 MstroM OD
Mwe ak 16 21 8 8 Mwea kM OD
Rbreak 17 18 Rbreak M OD 1
Rdrain 50 16 RdrainMOD 10.5e-3
Rgate 9 20 1.8
RSLC1 5 51 RSL CM O D 1.0e-6
RSLC2 5 50 1.0e3
Rsource 8 7 RsourceMOD 11.9e-3
Rvthre s 22 8 R vthre sMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BM OD
S2a 6 15 14 13 S2AM OD
S2b 13 15 14 13 S2BM OD
Vbat 22 19 DC 1
ESL C 51 50 VALUE = {(V(5,51)/AB S(V(5, 51)))*(PWR(V(5,5 1)/(1e-6*70),2.5)) }
. M ODEL DbodyMOD D (IS = 2.4E-12 R S=4.4e -3 TRS1=2. 0e-3 TRS2=4 .5e-7
+ CJO=9e-10 M= 0.58 TT=2. 9e-8 XT I=4.0)
.MO DE L Dbrea kM OD D (R S=0.6 TRS 1=1.4 e-3 TRS2=-5.0e-5)
.MO DE L Dplca pM O D D (CJO=2 .7 5e-10 IS=1.0e-30 N=1 0 M =0.56)
.MO DE L M stroMOD NMOS (VTO=4.16 K P=32 IS=1e-30 N =10 T OX = 1 L=1u W=1u)
.MO DE L M m edM OD NMOS (V T O=3.4 8 K P=2.7 IS=1e-30 N=10 TOX = 1 L=1u W=1u RG=1.8)
.MODEL MweakMOD NMOS (VTO=2.96 KP=0.068 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=18 RS=0.1)
.MO DE L Rbrea kM OD RES ( T C1=1.1e-3 TC2=-1.1e-8)
.MO DE L RdrainMOD RE S (TC 1=1.5e -2 T C2=4e -5)
.MODEL RSLCMOD RES (TC1=3.0e-3 TC2=2.9e-6)
.MO DE L Rsou rceMOD RES (T C1=1 e-3 TC2=1 e-6)
.MO DE L RvthresMOD RES (T C1=-3.9e-3 TC2=-1 .4e-5)
.MO DE L Rvtem pMOD RES (TC1=-3. 5e-3 TC2=1.3e-6)
.M ODEL S1AMOD VSWITC H (RON= 1e- 5 ROFF = 0.1 VON= - 5. 0 VOFF =-2 .0 )
.M ODEL S1BMOD VSWITC H (RON= 1e- 5 ROFF = 0.1 VON= - 2. 0 VOFF =-5 .0 )
.M ODEL S2AMOD VSWITC H (RON= 1e- 5 ROFF =0. 1 VON=- 0. 4 VOF F=0.3)
.M ODEL S2BMOD VSWITC H (RON= 1e- 5 ROFF =0. 1 VON=0 .3 VOFF= -0.4)
.ENDS
Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuri ng Global
Temperature Options; IE EE P ower E le ct ronics Spec i al i st Conference Recor ds, 1991, wri tten by W i l liam J. Hepp and C. F rank
Wheatley.
18
22
+-
6
8
+
-
5
51
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
814
13
MWEAK
EBREAK DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ESLC
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE EVTEMP
9
ESG
LGATE
RLGATE 20
+
-
+
-
+
-
6
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8
FDD3682-F085 N-Channel PowerTrench® MOSFET
SABER Electrical Model
REV Ju n 2002
templ ate FDD 3682 n2 ,n 1,n3
electrical n2,n1,n3
{
var i iscl
dp..model dbodymod = (isl=2.4e-12,rs=4.4e-3,trs1=2.0e-3,trs2=4.5e-7,cjo=9e-10,m=0.58,tt=2.9e-8,xti=4.0)
dp.. m odel dbreakmo d = (rs=0.6, t rs1=1.4e-3,t rs 2=-5e- 5)
dp..model dplcapmod = (cjo=2.7e-10,isl=10e-30,nl=10,m=0.56)
m..model mstrongmod = (type=_n,vto=4.16,kp=32,is=1e-30, tox=1)
m..model mmedmod = (type=_n,vto=3.48,kp=2.7,is=1e-30, tox=1)
m..model mweakmod = (type=_n,vto=2.96,kp=0.068,is=1e-30, tox=1,rs=0.1)
sw_v cs p..mo del s1amo d = (ron=1e- 5,roff = 0. 1,von=-5,vof f = -2)
sw_v cs p..mo del s1bmo d = (ron=1e- 5,roff = 0. 1,von=-2,vof f = -5)
sw_v cs p..mo del s2amo d = (ron=1e- 5,roff =0.1,von=-0.4,voff=0.3)
sw_v cs p..mo del s2bmo d = (ron=1e- 5,roff =0.1,von=0.3,voff=-0.4)
c . ca n12 n8 = 4e -10
c.cb n15 n14 = 6e- 10
c.cin n6 n8 = 1.22e-9
dp.dbody n7 n5 = model= dbodym od
dp.dbrea k n5 n11 = model =dbreak m od
dp.dplca p n10 n5 = model =dplca pm od
spe. ebreak n11 n7 n17 n1 8 = 112
spe. eds n14 n8 n5 n8 = 1
spe. egs n13 n8 n6 n8 = 1
spe. esg n6 n10 n6 n8 = 1
spe.evthres n6 n21 n19 n8 = 1
spe. evtemp n20 n6 n18 n2 2 = 1
i.it n8 n17 = 1
l.lg ate n1 n9 = 4.88e-9
l.ldrain n2 n5 = 1.0e-9
l.lsource n3 n7 = 2. 24e-9
res. rl gate n1 n9 = 48.8
res. rl drain n2 n5 = 10
res. rl sour ce n3 n7 = 22.4
m.mmed n16 n6 n8 n8 = m odel=m m edmod, l= 1u, w=1 u
m.ms t rong n16 n6 n8 n8 = m odel=m strongmod, l= 1u, w=1u
m.mw eak n16 n21 n8 n8 = model =m weakm od, l=1u , w =1u
res. rbreak n17 n18 = 1, tc1 =1.1e-3,tc2=-1.1e-8
res. rdrain n50 n16 = 10.5e -3, tc1=1.5e-2,tc2=4e-5
r e s .rgate n9 n2 0 = 1. 8
res. rslc1 n5 n51 = 1.0e-6, tc1=3. 0e-3,tc2=2.9e-6
res. rslc2 n5 n50 = 1.0e3
res. rsour ce n 8 n7 = 11. 9e-3, tc 1=1e-3, t c2=1e- 6
res. rvthres n22 n8 = 1, tc1=-3.9e-3,tc 2=-1. 4e-5
res.rvtemp n18 n19 = 1, tc1=-3.5e-3,tc2=1.3e-6
sw_v cs p.s1a n6 n12 n13 n8 = mo del =s1a m od
sw_v cs p.s1b n13 n12 n1 3 n8 = m odel=s1bmod
sw_v cs p.s2a n6 n15 n14 n13 = m odel=s2amod
sw_v cs p.s2b n13 n15 n1 4 n13 = model =s2bmo d
v.vbat n22 n19 = dc=1
equations {
i (n51->n50) +=iscl
iscl : v (n51,n50) = ((v (n5,n51)/(1e-9+a bs(v(n5,n 51)))) *((abs(v(n5 ,n51)* 1e6/70))** 2. 5))
}
}
18
22
+-
6
8
+
-
19
8
+-
17
18
6
8
+
-
5
8+
-
RBREAK
RVTEMP
VBAT
RVTHRES
IT
17 18
19
22
12
13
15
S1A
S1B
S2A
S2B
CA CB
EGS EDS
14
8
13
814
13
MWEAK
EBREAK
DBODY
RSOURCE
SOURCE
11
73
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES 16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ISCL
RSLC1
10
5
51
50
RSLC2
1
GATE RGATE EVTEMP
9
ESG
LGATE
RLGATE 20
+
-
+
-
+
-
6
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9
FDD3682-F085 N-Channel PowerTrench® MOSFET
SPICE Thermal Model
REV 20 Jun 200 2
FDD 3682_JC T H TL
CTHERM1 TH 6 1.6e-3
CTH ERM2 6 5 4. 5e-3
CTH ERM3 5 4 5. 0e-3
CTH ERM4 4 3 8. 0e-3
CTH ERM5 3 2 8. 2e-3
CTH ERM6 2 TL 4.7e-2
RTHERM1 TH 6 3.3e-2
RTH ERM2 6 5 7. 9e-2
RTH ERM3 5 4 9. 5e-2
RTH ERM4 4 3 1. 4e-1
RTH ERM5 3 2 2. 9e-1
RTH ERM6 2 TL 6.7e-1
SABER Thermal Mod el
SABER t hermal model FDD3682
template thermal_model th tl
the r m al_ c th , tl
{
cth er m.ctherm1 th 6 =1.6e -3
cthe rm.ctherm2 6 5 =4.5e-3
cthe rm.ctherm3 5 4 =5.0e-3
cthe rm.ctherm4 4 3 =8.0e-3
cthe rm.ctherm5 3 2 =8.2e-3
cthe rm.ctherm6 2 tl =4.7e-2
rtherm.rtherm1 th 6 =3.3 e-2
r therm .rtherm2 6 5 =7.9e-2
r therm .rtherm3 5 4 =9.5e-2
r therm .rtherm4 4 3 =1.4e-1
r therm .rtherm5 3 2 =2.9e-1
r therm.rt he rm6 2 tl =6.7e -1
}
RTHERM4
RTHERM6
RTHERM5
RTHERM3
RTHERM2
RTHERM1
CTHERM4
CTHERM6
CTHERM5
CTHERM3
CTHERM2
CTHERM1
tl
2
3
4
5
6
th JUNCTION
CASE
www.onsemi.com
10
FDD3682-F085 N-Channel PowerTrench® MOSFET
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