HA2556-883 - Intersil Corporation

8-7

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

HA2556/883

Wideband Four Quadrant Analog

Multiplier (Voltage Output)

Description

The HA-2556/883 is a monolithic, high speed, four quadrant,

analog multiplier constructed in Intersil’ Dielectrically

Isolated High Frequency Process. The voltage output

simpliﬁes many designs by eliminating the current-to-voltage

conversion stage required for current output multipliers. The

HA-2556/883 provides a 450V/µs output slew rate and

maintains 52MHz and 57MHz bandwidths for the X and Y

channels respectively, making it an ideal part for use in video

systems.

The suitability for precision video applications is

demonstrated further by the Y Channel 0.1dB gain ﬂatness

to 5.0MHz, 1.5% multiplication error, -50dB feedthrough and

differential inputs with 8µA bias current. The HA-2556 also

has low differential gain (0.1%) and phase (0.1o) errors.

The HA-2556/883 is well suited for AGC circuits as well as

mixer applications for sonar, radar, and medical imaging

equipment. The HA-2556/883 is not limited to multiplication

applications only; frequency doubling, power detection, as

well as many other conﬁgurations are possible.

Ordering Information

PART NUMBER TEMPERATURE

RANGE PACKAGE

HA1-2556/883 -55oC to +125oC 16 Lead CerDIP

Features

• This Circuit is Processed in Accordance to MIL-STD-

883 and is Fully Conformant Under the Provisions of

Paragraph 1.2.1.

• High Speed Voltage Output. . . . . . . . . . . 450V/µs (Typ)

• Low Multiplication error . . . . . . . . . . . . . . . . 1.5% (Typ)

• Input Bias Currents . . . . . . . . . . . . . . . . . . . . . 8µA (Typ)

• Signal Input Feedthrough . . . . . . . . . . . . . . -50dB (Typ)

• Wide Y Channel Bandwidth . . . . . . . . . . . 57MHz (Typ)

• Wide X Channel Bandwidth . . . . . . . . . . . 52MHz (Typ)

• 0.1dB Gain Flatness (VY). . . . . . . . . . . . . . 5.0MHz (Typ)

Applications

• Military Avionics

• Missile Guidance Systems

• Medical Imaging Displays

• Video Mixers

• Sonar AGC Processors

• Radar Signal Conditioning

• Voltage Controlled Ampliﬁer

• Vector Generator

July 1994

Pinout

HA-2556/883

(CERDIP)

TOP VIEW

Simpliﬁed Schematic

GND

VREF

VYIOB

VYIOA

VY+

VY-

VOUT

V-

VXIOA

VX+

VX-

V+

VZ-

VZ+

VXIOB

Σ+-

REF

VBIAS

OUT

VZ-

V+

VZ+

V-

V+

VYIOAV

YIOB

VY-

VY+

VXIOAV

XIOB

VX+

REF

GND

VBIAS

VX-

Spec Number 511063-883

File Number 3619

8-8

Speciﬁcations HA2556/883

Absolute Maximum Ratings Thermal Information

Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6V

Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±40mA

ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .< 2000V

Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300oC

Storage Temperature Range . . . . . . . . . . . . . .-65oC ≤ TA≤ +150oC

Max Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

Thermal Resistance θJA θJC

CerDIP Package . . . . . . . . . . . . . . . . . . . 82oC/W 27oC/W

Maximum Package Power Dissipation at +75oC

CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.22W

Package Power Dissipation Derating Factor above +75oC

CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12mW/oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

Operating Conditions

Operating Supply Voltage (±VS) . . . . . . . . . . . . . . . . . . . . . . . . . . ±15V Operating Temperature Range . . . . . . . . . . . . -55oC≤ TA≤ +125oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Tested at: VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Speciﬁed.

PARAMETERS SYMBOL CONDITIONS GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Multiplication Error ME VY, VX = ±5V 1 +25oC -3 3 %FS

2, 3 +125oC, -55oC -6 6 %FS

Linearity Error LE4V VY, VX = ±4V 1 +25oC -0.5 0.5 %FS

LE5V VY, VX = ±5V 1 +25oC -1 1 %FS

Input Offset Voltage (VX)V

XIO VY = ±5V 1 +25oC -15 15 mV

2, 3 +125oC, -55oC -25 25 mV

Input Bias Current (VX)I

B (VX)V

X = 0V, VY = 5V 1 +25oC -15 15 µA

2, 3 +125oC, -55oC -25 25 µA

Input Offset Current (VX)I

IO (VX)V

X = 0V, VY = 5V 1 +25oC-22µA

2, 3 +125oC, -55oC-33µA

Common Mode (VX)

Rejection Ratio CMRR (VX)V

XCM = ±10V

VY = 5V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

Power Supply (VX)

Rejection Ratio +PSRR (VX)V

CC = +12V to +17V

VY = 5V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

-PSRR (VX)V

EE = -12V to -17V

VY= 5V 1 +25oC45-dB

2, 3 +125oC, -55oC45-dB

Input Offset Voltage (VY)V

YIO VX = ±5V 1 +25oC -15 15 mV

2, 3 +125oC, -55oC -25 25 mV

Input Bias Current (VY)I

B (VY)V

Y = 0V, VX = 5V 1 +25oC -15 15 µA

2, 3 +125oC, -55oC -25 25 µA

Input Offset Current (VY)I

IO (VY)V

Y = 0V, VX = 5V 1 +25oC-22µA

2, 3 +125oC, -55oC-33µA

Common Mode (VY)

Rejection Ratio CMRR (VY)V

YCM = +9V, -10V

VX = 5V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

Power Supply (VY)

Rejection Ratio +PSRR (VY)V

CC = +12V to +17V

VX = 5V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

-PSRR (VY)V

EE = -12V to -17V

VX= 5V 1 +25oC45-dB

2, 3 +125oC, -55oC45-dB

Spec Number 511063-883

8-9

Speciﬁcations HA2556/883

Input Offset Voltage (VZ)V

ZIO VX = 0V, VY = 0V 1 +25oC -15 15 mV

2, 3 +125oC, -55oC -25 25 mV

Input Bias Current (VZ)I

B (VZ)V

X = 0V, VY = 0V 1 +25oC -15 15 µA

2, 3 +125oC, -55oC -25 25 µA

Input Offset Current (VZ)I

IO (VZ)V

X= 0V, VY= 0V 1 +25oC-22µA

2, 3 +125oC, -55oC-33µA

Common Mode (VZ)

Rejection Ratio CMRR (VZ)V

ZCM = ±10V

VX = 0V, VY = 0V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

Power Supply (VZ)

Rejection Ratio +PSRR (VZ)V

CC = +12V to +17V

VX = 0V, VY = 0V 1 +25oC65-dB

2, 3 +125oC, -55oC65-dB

-PSRR (VZ)V

EE = -12V to -17V

VX= 0V, VY = 0V 1 +25oC45-dB

2, 3 +125oC, -55oC45-dB

Output Current +IOUT VOUT = 5V, RL = 250Ω1 +25oC20-mA

2, 3 +125oC, -55oC20-mA

-IOUT VOUT = 5V, RL = 250Ω1 +25oC - -20 mA

2, 3 +125oC, -55oC - -20 mA

Output Voltage Swing +VOUT RL = 250Ω1 +25oC5-V

2, 3 +125oC, -55oC5-V

-VOUT RL = 250Ω1 +25oC - -5 V

2, 3 +125oC, -55oC - -5 V

Supply Current ±ICC VX, VY = 0V 1 +25oC - 22 mA

2, 3 +125oC, -55oC - 22 mA

TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

Table 2 Intentionally Left Blank. See AC Specifications in Table 3.

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

Device Tested: at VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Speciﬁed.

PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

VY, VZ CHARACTERISTICS (NOTE 2)

Bandwidth BW(VY) -3dB, VX = 5V,

VY≤ 200mVP-P

1 +25oC 30 - MHz

Gain Flatness GF(VY) 0.1dB, VX = 5V,

VY≤ 200mVP-P

1 +25oC 4.0 - MHz

AC Feedthrough VISO fO = 5MHz,

VY = 200mVP-P

VX = Nulled

1, 3 +25oC - -45 dB

Rise and Fall Time TR, TFVY = 200mV Step,

VX = 5V,

10% to 90% pts

1 +25oC - 9.5 ns

1 +125oC, -55oC - 10 ns

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Tested at: VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Speciﬁed.

PARAMETERS SYMBOL CONDITIONS GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Spec Number 511063-883

8-10

Speciﬁcations HA2556/883

Overshoot +OS, -OS VY = 200mV step,

VX = 5V 1 +25oC - 35 %

1 +125oC, -55oC - 50 %

Slew Rate +SR, -SR VY = 10V step,

VX = 5V 1 +25oC 410 - V/µs

1 +125oC, -55oC 360 - V/µs

Differential Input

Resistance RIN (VY)V

Y = ±5V, VX = 0V 1 +25oC 650 - kΩ

VX CHARACTERISTICS

Bandwidth BW (VX) -3dB, VY = 5V,

VX≤ 200mVP-P

1 +25oC 30 - MHz

Gain Flatness GF (VX) 0.1dB, VY = 5V,

VX≤ 200mVP-P

1 +25oC 2.0 - MHz

AC Feedthrough VISO fO = 5MHz,

VX = 200mVP-P

VY = Nulled

1, 3 +25oC--45dB

Rise & Fall Time TR, TFVX = 200mV step,

VY = 5V,

10% to 90% pts

1 +25oC - 9.5 ns

1 +125oC, -55oC - 10 ns

Overshoot +OS, -OS VX = 200mV step,

VY = 5V 1 +25oC - 35 %

1 +125oC, -55oC - 50 %

Slew Rate +SR, -SR VX = 10V step,

VY = 5V 1 +25oC 410 - V/µs

1 +125oC, -55oC 360 - V/µs

Differential Input

Resistance RIN (VX)V

X = ±5V, VY = 0V 1 +25oC 650 - kΩ

OUTPUT CHARACTERISTICS

Output Resistance ROUT VY = ±5V, VX = 5V

RL = 1kΩ to 250Ω1 +25oC-1Ω

NOTES:

1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These param-

eters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization

based upon data from multiple production runs which reflect lot to lot and within lot variation.

2. VZ AC characteristics may be implied from VY due to the use of VZ as feedback in the test circuit.

3. Offset voltage applied to minimize feedthrough signal.

TABLE 4. ELECTRICAL TEST REQUIREMENTS

MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1)

Interim Electrical Parameters (Pre Burn-In) -

Final Electrical Test Parameters 1 (Note 1), 2, 3

Group A Test Requirements 1, 2, 3

Groups C and D Endpoints 1

NOTE:

1. PDA applies to Subgroup 1 only. No other subgroups are included in PDA.

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)

Device Tested: at VSUPPLY = ±15V, RF = 50Ω, RL = 1kΩ, CL = 20pF, Unless Otherwise Speciﬁed.

PARAMETERS SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

Spec Number 511063-883

8-11

HA2556/883

Die Characteristics

DIE DIMENSIONS:

71mils x 100mils x 19mils ± 1mils

METALLIZATION:

Type: Al, 1% Cu

Thickness: 16kÅ±2kÅ

GLASSIVATION:

Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos)

Silox Thickness: 12kÅ± 2kÅ

Nitride Thickness: 3.5kÅ± 1.5kÅ

TRANSISTOR COUNT: 84

SUBSTRATE POTENTIAL: V-

WORST CASE CURRENT DENSITY:

0.47 x 105A/cm2

Metallization Mask Layout

HA-2556/883

GND

(1)

VREF

(2)

VYIOB (3)

VYIOA(4)

VY+(5)

VY-(6)

V-

(7) VOUT

(8) VZ+

(9) VZ-

(10)

V+(11)

VX-(12)

VX+(13)

VXIOB

(15)

VXIOA

(16)

Spec Number 511063-883

8-12

HA2556/883

Test Waveforms

LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUIT

LARGE SIGNAL RESPONSE SMALL SIGNAL RESPONSE

2V/DIV; 100ns/DIV 50mV/DIV; 50ns/DIV

Burn-In Circuit

HA-2556/883 CERAMIC DIP

VY+

-15V

VOUT

+15 V

VX+

50Ω1K 20pF

VZ-

VZ+

8Σ+-

REF

-4

-8

VX = ±4V PULSE

VY = 5VDC

OUTPUT (V)

0ns 500ns 1µs

OUTPUT (mV)

VY = ±100mV PULSE

VX = 5VDC

0ns 250ns 500ns

200

100

-100

-200

-15.5V 0.01µF

VZ-

VZ+

±0.5V

D1 = D2 = 1N4002 OR EQUIVALENT (PER BOARD)

VY+VX+

NC NC

+15.5V

0.01µF

±0.5V

VOUT

8Σ+-

REF

Spec Number 511063-883

8-13

HA2556/883

F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)

16 LEAD DUAL-IN-LINE FRIT-SEAL CERAMIC PACKAGE

SYMBOL INCHES MILLIMETERS NOTESMIN MAX MIN MAX

A - 0.200 - 5.08 -

b 0.014 0.026 0.36 0.66 2

b1 0.014 0.023 0.36 0.58 3

b2 0.045 0.065 1.14 1.65 -

b3 0.023 0.045 0.58 1.14 4

c 0.008 0.018 0.20 0.46 2

c1 0.008 0.015 0.20 0.38 3

D - 0.840 - 21.34 5

E 0.220 0.310 5.59 7.87 5

e 0.100 BSC 2.54 BSC -

eA 0.300 BSC 7.62 BSC -

eA/2 0.150 BSC 3.81 BSC -

L 0.125 0.200 3.18 5.08 -

Q 0.015 0.060 0.38 1.52 6

S1 0.005 - 0.13 - 7

S2 0.005 - 0.13 - -

α90o105o90o105o-

aaa - 0.015 - 0.38 -

bbb - 0.030 - 0.76 -

ccc - 0.010 - 0.25 -

M - 0.0015 - 0.038 2

N16 168

Packaging

NOTES:

1. Index area: A notch or a pin one identiﬁcation mark shall be locat-

ed adjacent to pin one and shall be located within the shaded

area shown. The manufacturer’s identiﬁcation shall not be used

as a pin one identiﬁcation mark.

2. The maximum limits of lead dimensions b and c or M shall be

measured at the centroid of the finished lead surfaces, when

solder dip or tin plate lead finish is applied.

3. Dimensions b1 and c1 apply to lead base metal only. Dimension

M applies to lead plating and finish thickness.

4. Corner leads (1, N, N/2, and N/2+1) may be configured with a

partial lead paddle. For this configuration dimension b3 replaces

dimension b1.

5. This dimension allows for off-center lid, meniscus, and glass overrun.

6. Dimension Q shall be measured from the seating plane to the

base plane.

7. Measure dimension S1 at all four corners.

8. N is the maximum number of terminal positions.

9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.

10. Controlling Dimension: Inch.

11. Lead Finish: Type A.

12. Materials: Compliant to MIL-I-38535.

bbb C A - B

SEATING

BASE

PLANE

-D-

-A-

-C-

-B-

b2 b

(c)

(b)

SECTION A-A

BASE

LEAD FINISH

METAL

eA/2

ccc C A - B

SSaaa C A - B

Spec Number 511063-883

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-14

DESIGN INFORMATION

August 1999

Semiconductor

Typical Performance Curves

X CHANNEL MULTIPLIER ERROR X CHANNEL MULTIPLIER ERROR

Y CHANNEL MULTIPLIER ERROR Y CHANNEL MULTIPLIER ERROR

Y CHANNEL FULL POWER BANDWIDTH Y CHANNEL FULL POWER BANDWIDTH

-6 -4 -2 0 2 4 6

-1

-0.5

0.5

X INPUT (V)

ERROR %FS

Y = 0

Y = 1

Y = 3

Y = 4

Y = 2

Y = 5

-6 -4 -2 0 2 4 6

-1.5

-1

-0.5

0.5

1.5

X INPUT (V)

ERROR %FS

Y = -4

Y = -2

Y = -1

Y = 0

Y = -5

Y = -3

-6 -4 -2 0 2 4 6

-1

-0.5

0.5

1.5

Y INPUT (V)

ERROR% FS

X = -3 X = -2

X = -4

X = -1

X = -5

X = 0

-6 -4 -2 0 2 4 6

-1.5

-1

-0.5

0.5

Y INPUT (V)

ERROR%FS

X = 0

X = 5

X = 1

X = 2

X = 4

X = 3

-2

GAIN (dB)

-1

-3

-4

1M 10M100K10K

Y CHANNEL = 10VP-P

X CHANNEL = 5VDC

FREQUENCY (Hz)

-3dB

AT 32.5MHz

1M 10M100K10K

FREQUENCY (Hz)

-2

GAIN (dB)

-1

-3

-4

Y CHANNEL = 4VP-P

X CHANNEL = 5VDC

HA2556

Wideband Four Quadrant

Analog Multiplier

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-15

HA2556

X CHANNEL FULL POWER BANDWIDTH X CHANNEL FULL POWER BANDWIDTH

Y CHANNEL BANDWIDTH vs X CHANNEL X CHANNEL BANDWIDTH vs Y CHANNEL

Y CHANNEL CMRR vs FREQUENCY X CHANNEL CMRR vs FREQUENCY

Typical Performance Curves

(Continued)

1M 10M100K10K

FREQUENCY (Hz)

-2

GAIN (dB)

-1

-3

-4

X CHANNEL = 10VP-P

Y CHANNEL = 5VDC

X CHANNEL = 4VP-P

Y CHANNEL = 5VDC

-2

GAIN (dB)

-1

-3

-4

1M 10M100K10K

FREQUENCY (Hz)

10M 100M1M

FREQUENCY (Hz)

10K 100K

-12

GAIN (dB)

-6

-18

-24 VX = 0.5VDC

VX = 2VDC

VX = 5VDC

VY = 200mVP-P

-12

GAIN (dB)

-6

-18

-24

10M 100M1M

FREQUENCY (Hz)

10K 100K

VX = 200mVP-P

VY = 0.5VDC

VY = 2VDC

VY = 5VDC

1M 100M100K10K FREQUENCY (Hz)

-30

-50

-70

CMRR (dB)

-60

-80

-20

-10

-40

10M

5MHz

-38.8dB

0VY+, VY- = 200mVRMS

VX = 5VDC

5MHz

-26.2dB

-30

-50

-70

CMRR (dB)

-60

-80

-20

-10

-40

1M 100M100K10K FREQUENCY (Hz) 10M

VX+, VX- = 200mVRMS

VY = 5VDC

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-16

HA2556

FEEDTHROUGH vs FREQUENCY FEEDTRHOUGH vs FREQUENCY

OFFSET VOLTAGE vs TEMPERATURE INPUT BIAS CURRENT (VX, VY, VZ) vs TEMPERATURE

SCALE FACTOR ERROR vs TEMPERATURE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE

Typical Performance Curves

(Continued)

1M 100M100K10K FREQUENCY (Hz) 10M

-52.6dB

at 5MHz

-30

-50

-70

FEEDTHROUGH (dB)

-60

-80

-20

-10

-40

0VX = 200mVP-P

VY = NULLED

VY = 200mVP-P

VX = NULLED

-49dB

at 5MHz

-30

-50

-70

FEEDTHROUGH (dB)

-60

-80

-20

-10

-40

1M 100M100K10K FREQUENCY (Hz) 10M

-100 -50 0 50 100 15

TEMPERATURE (oC)

OFFSET

VOLTAGE

(

|VIOZ|

|VIOX|

|VIOY|

-100 -50 0 50 100 150

TEMPERATURE (oC)

BIAS CURRENT (uA)

-100 -50 0 50 100 150

-1

-0.5

0.5

1.5

TEMPERATURE (oC)

SCALE FACTOR ERROR (%)

46810121416

± SUPPLY VOLTAGE (V)

INPUT VOLTAGE RANGE (V)

X INPUT Y INPUT

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-17

HA2556

INPUT COMMON MODE RANGE vs SUPPLY VOLTAGE SUPPLY CURRENT vs SUPPLY VOLTAGE

OUTPUT VOLTAGE vs RLOAD

Functional Block Diagram

NOTE:

The transfer equation for the HA-2556 is:

(VX+ - VX-) (VY+ - VY-) = SF (VZ+ - VZ-),

where SF = Scale Factor = 5V VX, VY, VZ = Differential Inputs

Typical Performance Curves

(Continued)

4 6 8 10121416

-15

-10

-5

±SUPPLY VOLTAGE (V)

CMR (V)

X & Y INPUT

X INPUT

Y INPUT

0 5 10 15 20

±SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

IEE

ICC

100 300 500 700 900 1100

4.2

4.4

4.6

4.8

5.0

RLOAD (Ω)

MAX OUTPUT VOLTAGE (V)

HA-2556

1/SF

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-18

HA2556

Applications Information

Operation at Reduced Supply Voltages

The HA-2556 will operate over a range of supply voltages,

±5V to ±15V. Use of supply voltages below ±12V will reduce

input and output voltage ranges. See “Typical Performance

Curves” for more information.

Offset Adjustment

X and Y channel offset voltages may be nulled by using a

20K potentiometer between the VYIO or VXIO adjust pin A

and B and connecting the wiper to V-. Reducing the channel

offset voltage will reduce AC feedthrough and improve the

multiplication error. Output offset voltage can also be nulled

by connecting VZ- to the wiper of a potentiometer which is

tied between V+ and V-.

Capacitive Drive Capability

When driving capacitive loads >20pF a 50Ω resistor should

be connected between VOUT and VZ+, using VZ+ as the out-

put (see Figure 1). This will prevent the multiplier from going

unstable and reduce gain peaking at high frequencies. The

50Ω resistor will dampen the resonance formed with the

capacitive load and the inductance of the output at pin 8.

Gain accuracy will be maintained because the resistor is

inside the feedback loop.

Theory of Operation

The HA-2556 creates an output voltage that is the product of

the X and Y input voltages divided by a constant scale factor

of 5V. The resulting output has the correct polarity in each of

the four quadrants deﬁned by the combinations of positive

and negative X and Y inputs. The Z stage provides the

means for negative feedback (in the multiplier conﬁguration)

and an input for summation into the output. This results in

the following equation, where X, Y and Z are high imped-

ance differential inputs.

FIGURE 1. DRIVING CAPACITIVE LOAD

VY+

-15V

VOUT

+15 V

VX+

50Ω1K 20pF

VZ-

VZ+

8Σ+-

REF

VOUT XxY

---------- Z–=

To accomplish this the differential input voltages are ﬁrst con-

verted into differential currents by the X and Y input transcon-

ductance stages. The currents are then scaled by a constant

reference and combined in the multiplier core. The multiplier

core is a basic Gilbert Cell that produces a differential output

current proportional to the product of X and Y input signal cur-

rents. This current becomes the output for the HA-2557.

The HA-2556 takes the output current of the core and feeds

it to a transimpedance ampliﬁer, that converts the current to

a voltage. In the multiplier conﬁguration, negative feedback

is provided with the Z transconductance ampliﬁer by con-

necting VOUT to the Z input. The Z stage converts VOUT to a

current which is subtracted from the multiplier core before

being applied to the high gain transimpedance amp. The Z

stage, by virtue of it’s similarity to the X and Y stages, also

cancels second order errors introduced by the dependence

of VBE on collector current in the X and Y stages.

The purpose of the reference circuit is to provide a stable

current, used in setting the scale factor to 5V. This is

achieved with a bandgap reference circuit to produce a tem-

perature stable voltage of 1.2V which is forced across a NiCr

resistor. Slight adjustments to scale factor may be possible

by overriding the internal reference with the VREF pin. The

scale factor is used to maintain the output of the multiplier

within the normal operating range of ±5V when full scale

inputs are applied.

The Balance Concept

The open loop transfer equation for the HA-2556 is:

where; A = Output Ampliﬁer Open Loop Gain

VX, VY, VZ = Differential Input Voltages

5V = Fixed Scale Factor

An understanding of the transfer function can be gained by

assuming that the open loop gain, A, of the output ampliﬁer

is inﬁnite. With this assumption, any value of VOUT can be

generated with an inﬁnitesimally small value for the terms

within the brackets. Therefore we can write the equation:

which simpliﬁes to:

This form of the transfer equation provides a useful tool to

analyze multiplier application circuits and will be called the

Balance Concept.

VOUT AVX+ VX-

–





VY+ VY-

–





--------------------------------------------------------------------------- VZ+ VZ-

–





–=

0VX+ VX-

–()VY+ VY-

–()×

-----------------------------------------------------------------VZ+ VZ-

–()–=

VX+ VX-

–()VY+ VY-

–()×5V

Z+ VZ-

–()=

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-19

HA2556

Let’s ﬁrst examine the Balance Concept as it applies to the

standard multiplier conﬁguration (Figure 2).

Signals A and B are input to the multiplier and the signal W

is the result. By substituting the signal values into the Bal-

ance equation you get:

And solving for W:

FIGURE 2. MULTIPLIER

Notice that the output (W) enters the equation in the feed-

back to the Z stage. The Balance Equation does not test for

stability, so remember that you must provide negative feed-

back. In the multiplier conﬁguration, the feedback path is

connected to VZ+ input, not VZ-. This is due to the inversion

that takes place at the summing node just prior to the output

ampliﬁer. Feedback is not restricted to the Z stage, other

feedback paths are possible as in the Divider Conﬁguration

shown in Figure 3.

FIGURE 3. DIVIDER

Inserting the signal values A, B and W into the Balance

Equation for the divider conﬁguration yields:

Solving for W yields:

Notice that, in the divider conﬁguration, signal B must remain

≥0 (positive) for the feedback to be negative. If signal B is

negative, then it will be multiplied by the VX- input to produce

positive feedback and the output will swing into the rail.

() B()×5W()=

WAB

------------=

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

W–() B()×5V A–()×=

W5A

-----=

Signals may be applied to more than one input at a time as

in the Squaring conﬁguration in Figure 4:

Here the Balance equation will appear as:

FIGURE 4. SQUARE

Which simpliﬁes to:

The last basic conﬁguration is the Square Root as shown in

Figure 5. Here feedback is provided to both X and Y inputs.

FIGURE 5. SQUARE ROOT (FOR A > 0)

The Balance equation takes the form:

Which equates to:

Application Circuits

The four basic conﬁgurations (Multiply, Divide, Square and

Square Root) as well as variations of these basic circuits

have many uses.

Frequency Doubler

For example, if ACos(ωτ) is substituted for signal A in the

Square function, then it becomes a Frequency Doubler and

the equation takes the form:

And using some trigonometric identities gives the result:

() A()×5W()=

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

WA2

-----=

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

W() W–()×5A–()=

W5A=

ACos ωτ()()ACos ωτ()()×5W()=

WA2

----- 1Cos2ωτ()+()=

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-20

HA2556

Square Root

The Square Root function can serve as a precision/wide

bandwidth compander for audio or video applications. A

compander improves the Signal to Noise Ratio for your sys-

tem by amplifying low level signals while attenuating or com-

pressing large signals (refer to Figure 17; X0.5 curve). This

provides for better low level signal immunity to noise during

transmission. On the receiving end the original signal may

be reconstructed with the standard Square function.

FIGURE 6. AM SIGNAL GENERATION

FIGURE 7. SYNCHRONOUS AM DETECTION

FIGURE 8. PHASE DETECTION

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

ACos(ωΑτ)

CCos(ωCτ)

CARRIER

AUDIO

WAC

------ Cos ωCωA

–()τCos ωCωA

+()τ+()=

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

AM SIGNAL

CARRIER

LIKE THE FREQUENCY DOUBLER YOU GET AUDIO CENTERED AT DC

AND 2FC.

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

ACos(ωτ)

ACos(ωτ+φ)

WA2

----- Cos φ() Cos 2ωτ φ+()+()=

DC COMPONENT IS PROPORTIONAL TO Cos(f).

Communications

The Multiplier conﬁguration has applications in AM Signal Gener-

ation, Synchronous AM Detection and Phase Detection to men-

tion a few. These circuit conﬁgurations are shown in Figure 6,

Figure 7 and Figure 8. The HA-2556 is particularly useful in

applications that require high speed signals on all inputs.

Each input X, Y and Z has similar wide bandwidth and input

characteristics. This is unlike earlier products where one

input was dedicated to a slow moving control function as is

required for Automatic Gain Control. The HA-2556 is versa-

tile enough for both.

Although the X and Y inputs have similar AC characteristics, they

are not the same. The designer should consider input parame-

ters such as small signal bandwidth, ac feedthrough and 0.1dB

gain ﬂatness to get the most performance from the HA-2556.

The Y channel is the faster of the two inputs with a small signal

bandwidth of typically 57MHz verses 52MHz for the X channel.

Therefore in AM Signal Generation, the best performance will be

obtained with the Carrier applied to the Y channel and the modu-

lation signal (lower frequency) applied to the X channel.

Scale Factor Control

The HA-2556 is able to operate over a wide supply voltage range

±5V to ±17.5V . The ±5V range is particularly useful in video appli-

cations. At ±5V the input voltage range is reduced to ±1.4V. The

output cannot reach its full scale value with this restricted input,

so it may become necessary to modify the scale factor . Adjusting

the scale factor may also be useful when the input signal itself is

restricted to a small portion of the full scale level. Here we can

make use of the high gain output ampliﬁer by adding external

gain resistors. Generating the maximum output possible for a

given input signal will improve the Signal to Noise Ratio and

Dynamic Range of the system. For example, let’s assume that

the input signals are 1VPEAK each. Then the maximum output for

the HA-2556 will be 200mV. (1V x 1V / (5V) = 200mV . It would be

nice to have the output at the same full scale as our input, so let’s

add a gain of 5 as shown in Figure 9.

FIGURE 9. EXTERNAL GAIN OF 5

One caveat is that the output bandwidth will also drop by this

factor of 5. The multiplier equation then becomes:

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

1kΩ

250Ω

ExternalGain RF

------ 1+=

W5AB

---------AB×==

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-21

HA2556

Current Output

Another useful circuit for low voltage applications allows the

user to convert the voltage output of the HA2556 to an out-

put current. The HA-2557 is a current output version offering

100MHz of bandwidth, but its scale factor is ﬁxed and does

not have an output ampliﬁer for additional scaling. Fortu-

nately the circuit in Figure 10 provides an output current that

can be scaled with the value of RCONVERT and provides an

output impedance of typically 1MΩ. The equation for IOUT

becomes:

FIGURE 10. CURRENT OUTPUT

Video Fader

The Video Fader circuit provides a unique function. Here Ch

B is applied to the minus Z input in addition to the minus Y

input. In this way, the function in Figure 11 is generated. VMIX

will control the percentage of Ch A and Ch B that are mixed

together to produce a resulting video image or other signal.

The Balance equation looks like:

Which simpliﬁes to:

When VMIX is 0V the equation becomes VOUT = Ch B and

Ch A is removed, conversely when VMIX is 5V the equation

becomes VOUT = Ch A eliminating Ch B. For VMIX values 0V

≤ VMIX ≤ 5V the output is a blend of Ch A and Ch B.

IOUT AB×

------------1

RCONVERT

---------------------------

×=

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

IOUT

RCONVERT

VMIX

()ChA ChB–()×5V

OUT ChB–()=

VOUT ChB VMIX

----------- ChA ChB–()+=

FIGURE 11. VIDEO FADER

FIGURE 12. DIFFERENCE OF SQUARES

FIGURE 13. PERCENTAGE DEVIATION

FIGURE 14. DIFFERENCE DIVIDED BY SUM (FOR A + B ≥ 0V)

VY+

-15V

VOUT

+15V

VX+

50Ω

VZ-

VZ+

CH A

CH B VY-

VMIX

(0V to 5V)

8Σ+-

REF

HA-2556

1/5V

Y Z

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

W = 5(A2-B2)

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

W = 100

A - B

95K

R1 and R2 set scale to 1V/%, other scale factors possible

for A ≥ 0V.

HA-2556

1/5V

VOUT

VX+

VX-

VY+

VY-

VZ+

VZ-

∑

W = 10

A - B

B + A

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-22

HA2556

Other Applications

As shown above, a function may contain several different

operators at the same time and use only one HA-2556.

Some other possible multi-operator functions are shown in

Figure 12, Figure 13 and Figure 14.

Of course the HA-2556 is also well suited to standard multi-

plier applications such as Automatic Gain Control and Volt-

age Controlled Ampliﬁer.

Automatic Gain Control

Figure 15 shows the HA-2556 conﬁgured in an Automatic

Gain Control or AGC application. The HA-5127 low noise

ampliﬁer provides the gain control signal to the X input. This

control signal sets the peak output voltage of the multiplier to

match the preset reference level. The feedback network

around the HA-5127 provides a response time adjustment.

High frequency changes in the peak are rejected as noise or

the desired signal to be transmitted. These signals do not

indicate a change in the average peak value and therefore

no gain adjustment is needed. Lower frequency changes in

the peak value are given a gain of -1 for feedback to the

control input. At DC the circuit is an integrator automatically

compensating for Offset and other constant error terms.

This multiplier has the advantage over other AGC circuits, in

that the signal bandwidth is not affected by the control signal

gain adjustment.

FIGURE 15. AUTOMATIC GAIN CONTROL

VY+

-V

VOUT

50Ω

HA-2556

5kΩ

10kΩ

HA-5127

0.01µF

10kΩ0.1µF

1N914

5.6V

0.1µF

+15V

20kΩ

8Σ+-

REF

FIGURE 16. VOLTAGE CONTROLLED AMPLIFIER

Voltage Controlled Ampliﬁer

A wide range of gain adjustment is available with the Voltage

Controlled Ampliﬁer conﬁguration shown in Figure 16. Here

the gain of the HFA0002 can be swept from 20V/V to a gain

of almost 1000V/V with a DC voltage from 0 to 5V.

Wave Shaping Circuits

Wave shaping or curve ﬁtting is another class of application

for the analog multiplier. For example, where a non-linear

sensor requires corrective curve ﬁtting to improve linearity

the HA-2556 can provide nonintegral powers in the range 1

to 2 or nonintegral roots in the range 0.5 to 1.0 (refer to Fur-

ther Reading). This effect is displayed in Figure 17.

FIGURE 17. EFFECT OF NONINTEGRAL POWERS / ROOTS

NC VX+ (VGAIN)

-V

VIN

+ V

HFA0002

5kΩ

VOUT

500Ω

HA-2556

8Σ+-

REF

0 0.2 0.4 0.6 0.8 1

0.2

0.4

0.6

0.8

INPUT (V)

OUTPUT (V)

X0.5

X0.7

X1.5

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-23

HA2556

Well, OK a multiplier can’t do nonintegral roots “exactly” but

we can get very close. We can approximate nonintegral

roots with equations of the form:

Figure 18 compares the function VOUT = VIN0.7 to the

approximation VOUT = 0.5VIN0.5 + 0.5VIN.

FIGURE 18. COMPARE APPROXIMATION TO NONINTEGRAL

ROOT

This function can be easily built using an HA-2556 and a

potentiometer for easy adjustment as shown in Figures 19

and 20. If a ﬁxed nonintegral power is desired, the circuit

shown in Figure 21 eliminates the need for the output buffer

amp. These circuits approximate the function VIN

Mwhere M

is the desired nonintegral power or root.

FIGURE 19. NONINTEGRAL ROOTS - ADJUSTABLE

Vo1α–()VIN

2αVIN

Vo1α–()VIN

12⁄αVIN

0 0.2 0.4 0.6 0.8 1

0.2

0.4

0.6

0.8

INPUT (V)

OUTPUT (V)

X0.7

0.5X0.5+ 0.5X

-V VIN

HA-2556

HA-5127

VOUT

0V ≤ VIN ≤ 1V

0.5 ≤ M ≤ 1.0

1-α

8Σ+-

REF

FIGURE 20. NONINTEGRAL POWERS - ADJUSTABLE

FIGURE 21. NONINTEGRAL POWERS - FIXED

-V

VIN

HA-2556

HA-5127

VOUT

0V ≤ VIN ≤ 1V

1.0 ≤ M ≤ 2.0

1-α

8Σ+-

REF

-V

VIN

HA-2556

VOUT

0V ≤ VIN ≤ 1V

1.2 ≤ M ≤ 2.0 R3 R4

VOUT 1

-- R3

-----1+





VIN

2R3

-----1+





R1 R2+

-----------------





VIN

1α–1

-- R3

-----1+





=αR3

-----1+





R1 R2+

-----------------





Setting:

8Σ+-

REF

Spec Number 511063-883

DESIGN INFORMATION (Continued)

The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as

application and design information only. No guarantee is implied.

8-24

HA2556

Values for α to give a desired M root or power are as follows:

Sine Function Generators

Similar functions can be formulated to approximate a SINE

function converter as shown in Figure 22. With a linearly

changing (0 to 5V) input the output will follow 0o to 90o of a

sine function (0 to 5V) output. This conﬁguration is theoreti-

cally capable of ±2.1% maximum error to full scale.

By adding a second HA-2556 to the circuit an improved ﬁt

may be achieved with a theoretical maximum error of 0.5%

as shown in Figure 23. Figure 23 has the added beneﬁt that

it will work for positive and negative input signals. This

makes a convenient triangle (±5V input) to sine wave (±5V

output) converter.

FIGURE 22. SINE-FUNCTION GENERATOR

ROOTS - FIGURE 19 POWERS - FIGURE 20

MαMα

0.5 0 1.0 1

0.6 ≈0.25 1.2 ≈0.75

0.7 ≈0.50 1.4 ≈0.5

0.8 ≈0.70 1.6 ≈0.3

0.9 ≈0.85 1.8 ≈0.15

1.0 1 2.0 0

-V

VIN

HA-2556

VOUT

R3 R4

VOUT VIN

10.1284V

–()

0.6082 0.05VIN

–()

----------------------------------------

=5sin π

-- VIN

-------

⋅





≈

0.6082 R4

R3 R4+

-----------------= 5 0.1284() R2

R1 R2+

-----------------=

50.05() R6

R5 R6+

-----------------=

644 1K

262

470 470

1410

where:

;

for; 0V ≤ VIN ≤ 5V max theoretical error = 2.1%FS

8Σ+-

REF

FIGURE 23. BIPOLAR SINE-FUNCTION GENERATOR