I [AK4220]
MS0627-E-00 2007/05
- 5 -
PIN/FUNCTION
No. Pin Name I/O Function
1 RIN+7 I Rch Audio Positive Input 7
2
PDN I
Power down Mode
“L”: Power down, Reset
“H”: Power up
The AK4220 should always be reset upon power-up.
CAD1 I Chip Address1 (IICN pin = “L”)
3 CSN I Chip Selector (IICN pin = “H”)
SCL I Control Clock Input (IICN pin = “L”)
4 CCLK I Control Clock Input (IICN pin = “H”)
SDA I/O Control Data Input/Output (IICN pin = “L”)
5 CDTI I Control Data Input (IICN pin = “H”)
CAD0 I Chip Address0 (IICN pin = “L”)
6 CDTO O Control Data Output (IICN pin = “H”)
7 INT O Interrupt
8 Q0 O Parallel Output 0 (open drain output)
9 Q1 O Parallel Output 1 (open drain output)
10 Q2 O Parallel Output 2 (open drain output)
11 Q3 O Parallel Output 3 (open drain output)
12 Q4 O Parallel Output 4 (open drain output)
13 DVDD - Digital Power Supply
Normally connected to DVSS with a 0.1μF ceramic capacitor in parallel
with a 10μF electrolytic capacitor.
14 DVSS - Digital Ground
15 VOUT1 O Video Output 1
16 VFB1 I Video Feedback 1
17 TEST I Test pin, Connected to VVSS.
18 VOUT2 O Video Output 2
19 VFB2 I Video Feedback 2
20 VVDD2 - Video Power Supply, 5V
Normally connected to VVSS with a 0.1μF ceramic capacitor in parallel
with a 10μF electrolytic capacitor.
21 VOUT3 O Video Output 3
22 VFB3 I Video Feedback 3
23 VVSS2 - Video Ground2, 0V
24 VIN1 I Video Input 1
25 VVSS3 - Video Ground3, 0V
26 VIN2 I Video Input 2
27 VVDD1 - Video Power Supply, 5V
Normally connected to VVSS with a 0.1μF ceramic capacitor in parallel
with a 10μF electrolytic cap.
28 VIN3 I Video Input 3
29 VVSS1 - Video Ground1, 0V
30 VIN4 I Video Input 4
31 IICN I Control Mode Selection
“L”(Connected to VVSS): IIC Bus
“H” (Connected to VVDD): 4-wire Serial
32 VIN5 I Video Input 5
33 VIN6 I Video Input 6
34 AVDD - Audio Power Supply, 5V
Normally connected to AVSS with a 0.1μF ceramic capacitor in parallel
with a 10μF electrolytic capacitor.