SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCT OBER 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
5-Ω Switch Connection Between Two Ports
D
TTL-Compatible Input Levels
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 250 mA Per
JESD 17
D
Package Options Include Plastic Thin
Shrink Small-Outline (DGG), Thin Very
Small-Outline (DGV), and 300-mil Shrink
Small-Outline (DL) Packages
description
The SN74CBT16390 is a 16-bit to 32-bit switch
used in applications in which two separate data
paths must be multiplexed onto, or demultiplexed
from, a single path. This device can be used for
memory interleaving, in which two different banks
of memory must be addressed simultaneously.
This also can be used to connect or isolate the PCI
bus to one or two slots simultaneously.
Two output enables (OE1 and OE2) control the
data flow. When OE1 is low, A port is connected
to 1B port. When OE2 is low, A port is connected
to 2B port. When both OE1 and OE2 are low, the
A port is connected to both 1B and 2B ports. The
control inputs can be driven with a 5-V CMOS, 5-V
TTL, or an LVTTL driver.
The SN74CBT16390 is characterized for
operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
FUNCTION
OE1 OE2
FUNCTION
L L A = 1B and A = 2B
L H A = 1B
H L A = 2B
H H Isolation
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
A1
2B1
2B2
A3
2B3
2B4
A5
2B5
2B6
A7
2B7
2B8
GND
VCC
A9
2B9
2B10
A11
2B11
2B12
A13
2B13
2B14
A15
2B15
2B16
NC
NC
1B1
1B2
A2
1B3
1B4
A4
1B5
1B6
A6
1B7
1B8
A8
GND
VCC
1B9
1B10
A10
1B11
1B12
A12
1B13
1B14
A14
1B15
1B16
A16
OE1
OE2
NC – No internal connection
Copyright 1998, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCT OBER 1998
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
1B16
1B1
A16
A1
OE1
2B1
2B16
OE2
1
31
30
29
56
2
32
26
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous channel current 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DGG package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 86°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DL package 74°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 3)
MIN MAX UNIT
VCC Supply voltage 4.5 5.5 V
VIH High-level control input voltage 2 V
VIL Low-level control input voltage 0.8 V
TAOperating free-air temperature –40 85 °C
NOTE 3: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCT OBER 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 V
II
VCC = 0, VI = 5.5 V 10
µA
I
IVCC = 5.5 V, VI = 5.5 V or GND ±1µ
A
ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3 µA
∆ICC‡Control inputs VCC = 5.5 V, One input at 3.4 V, Other input at VCC or GND 2.5 mA
CiControl inputs VI = 3 V or 0 5 pF
Cio(OFF) VO = 3 V or 0 5.5 pF
§
VI=0
II = 64 mA 5 7
ron
§
VCC = 4.5 V
V
I =
0
II = 30 mA 5 7 Ω
VI = 2.4 V, II = 15 mA 7 12
†All typical values are at VCC = 5 V, TA = 25°C.
‡This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
§Measured by the voltage drop between A and B terminals at the indicated current through the switch. On-state resistance is determined by the
lower of the voltages of the two (A or B) terminals.
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 1)
PARAMETER FROM
(INPUT) TO
(OUTPUT) MIN MAX UNIT
tpdA or B B or A 0.25 ns
ten OE A or B 1.3 5.9 ns
tdis OE A or B 1 5.3 ns
The propagation delay is based on the RC time constant of the typical on-state resistance of the switch and a load capacitance of 50 pF, when
driven by an ideal voltage source (zero output impedance).
SN74CBT16390
16-BIT TO 32-BIT FET MULTIPLEXER/DEMULTIPLEXER BUS SWITCH
SCDS035C – OCTOBER 1997 – REVISED OCT OBER 1998
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1 7 V
Open
GND
500 Ω
500 Ω
tPLH tPHL
Output
Control
(low-level
enabling)
Output
W aveform 1
S1 at 7 V
(see Note B)
Output
W aveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
1.5 V1.5 V
1.5 V 1.5 V 3 V
0 V
1.5 V 1.5 V VOH
VOL
0 V
1.5 V VOL + 0.3 V
1.5 V VOH – 0.3 V
0 V
Input
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
tpd
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated