LFE3-95EA-SP-EVN - Lattice

August 2012

Revision: EB43_01.2



LatticeECP3 PCI Express Solutions Board – Revision A 

User’s Guide

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Introduction

As PCI Express applications have emerged, the LatticeECP3™ FPGA family has become a well-suited solution for

many system designs. The features of the LatticeECP3 PCI Express Solutions Board can assist engineers with

rapid-prototyping and testing their designs. The board is an enhanced form-factor of the PCI Express add-in card

specification. It allows for full x1 form-factor compliance and x4 is available for demonstration purposes with some

non-standard form-factor issues. The flexibility to use the same board to demonstrate both x1 and x4 configurations

is accomplished by simply changing the mounting hardware. The board has several debugging and analyzing fea-

tures for complete evaluation of the LatticeECP3 device. This guide is intended to be referenced in conjunction with

evaluation design tutorials to demonstrate the LatticeECP3 FPGA.

This user’s guide describes the LatticeECP3 PCI Express Solutions Board featuring the LatticeECP3 LFE3-95EA-

FN672 FPGA. The stand-alone evaluation board provides a functional platform for development and rapid prototyp-

ing of applications that require high-speed SERDES interfaces to demonstrate PCI Express capabilities using an

add-on card form-factor. The board is manufactured using standard FR4 dielectric and through-hole vias. The nom-

inal impedance is 50-ohm for single-ended traces and 85-ohm for differential traces.

Important: This document (including the schematics in the appendix) describes LatticeECP3 PCI Express Solu-

tions Boards marked as Rev A. This marking can be seen on the silkscreen of the printed circuit board, under the

Lattice Semiconductor logo.

Figure 1. LatticeECP3 PCI Express Solutions Board

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Features

• PCI Express x1 and x4 edge connector interfaces

• Allows demonstration of PCI Express (x 1and x4) interfaces

– x1 is form-factor compliant and will fit a standard PC-equipped PCI Express motherboard socket

– x4 is non-compliant but will demonstrate x4 functionality by a simple change to the hardware

• Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra)

• On-board Boot Flash

– Both Serial SPI Flash and Parallel Flash via MachXO™ programming bridge

• Shows interoperation with a high performance DDR2 memory component

• Includes driver based “run-time” device configuration capability via ORCAstra or PCI Express

• Switches, LEDs, displays for demo purposes

• Input connection for lab-power supply

• Power connections and power sources

• ispVM™ programming support

• On-board and external reference clock sources

The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation

board, descriptions of the on-board connectors, diodes and switches and a complete set of schematics of the

board.

Figure 2. PCI Express Solutions Board Outline Drawing, Top Side

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 3. PCI Express Solutions Board Outline Drawing, Bottom Side

x1 and x4 PCI Express Support

PCI Express x1 and x4 is supported with the same PCB. This add-in PCB is designed to work in both types of

motherboard slots. The PCB complies with the width and length dimensions of the PCI Express Card Electrome-

chanical (CEM) Specification Revision 1.1. The only exclusion of the CEM specification is the component and back

side of the add-in board may interfere with other boards in a fully-populated motherboard.

This board is easily interchanged from x1 to x4 configurations by removing the back-panel bracket and reinstalling

it on the opposite side. This permits plug-in into PCI Express sockets on the motherboard and securing it in the

chassis if desired. The back-panel bracket is shown below.

Figure 4. Back Panel Drawing

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

LatticeECP3 Device

This board features a LatticeECP3 FPGA with a 1.2V core supply. It can accommodate all pin compatible

LatticeECP3 devices in the 672-ball fpBGA (1mm pitch) package. A complete description of this device can be

found in the LatticeECP3 Family Data Sheet on the Lattice website at www.latticesemi.com.

Note: The connections referenced in this document refer to the LFE3-95EA-FN672 device. Available I/Os and

associated sysI/O™ banks may differ for other densities within this device family.

Applying Power to the Board

The LatticeECP3 PCI Express Solutions Board is ready to power on. The board can be supplied with power from

an AC wall-type transformer power supply shipped with the board. Or it can be supplied from a benchtop supply via

terminal screw connections. It also has provisions to be supplied from the PCI Express edge fingers from a host

board.

To supply power from the factory-supplied wall transformer, simply connect the output connection of the power cord

to J1 and plug the wall-transformer into an AC wall-outlet.

Power Supplies

(see Appendix A, Figure 21)

The evaluation board incorporates an alternate scheme to provide power to the board. The board is equipped to

accept a main supply via the TB1 connection. This connection is provided to use with a benchtop supply adjusted

to provide a nominal +12V DC.

All input power sources and on-board power supplies are fused with surface-mounted fuses and have green LEDs

to indicate power GOOD status of the intermediate supplies

Table 1. Board Power Supply Fuses (see Appendix A, Figure 21)

F1 12V Fuse

F2 1.2V Core Fuse

F3 3.3V Fuse

F4 1.8V Fuse

F5 1.2V Analog Supply

Table 2. Board Power Supply Indicators (see Appendix A, Figure 21)

D1 3.3V Source Good Indicator

D2 1.2V VCC Core Source Good Indicator

D3 1.8V Source Good Indicator

D4 1.2V Analog Source Good Indicator

D5 12V Input Good Indicator

External power can be alternatively connected rather than the wall transformer power pack.

Table 3. External Board Supply Input Terminal (see Appendix A, Figure 21)

TB1

Screw terminal for +12V DC

Pin1 (square PCB pad): +12V DC

Pin2: Ground

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

PCI Express Power Interface

Power can be sourced to the board via the PCB edge-fingers (CN1 and CN2). This interface allows the user to pro-

vide power from a PCI Express Host board.

Programming/FPGA Configuration

(see Appendix A, Figure 23)

A programming header is provided on the evaluation board, providing access to the LatticeECP3 JTAG port.

ispVM Download Interface

J4 and J8 are 6-pin JTAG connectors used in conjunction with the ispVM USB download cable to program and con-

trol the device. These connectors are available through the back-panel bracket as needed for x1 or x4 PCI Express

configurations. These connectors are used in conjunction with the ispVM programming cable and software to pro-

gram the configuration memory or FPGA directly.

Table 4. Standard ispVM Programming Cable Configuration

Pin 1 VCC

Pin 2 TDO

Pin 3 TDI

Pin 4 TMS

Pin 5 GND

Pin 6 TCK

After initial board setup, use the following procedure to program the evaluation board. Instructions assume ispVM

software has been installed on a local PC.

Connect the ispDOWNLOAD cable rainbow colored flywires to the connector J4.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Table 5. ispVM JTAG Connector (see Appendix A, Figure 21)

6 32154

Note: A dot denotes PIN 1 on the both the

PCB or back-panel bracket.

Pin Function Color

1PWR Red

2TDO Brown

3TDI Orange

4TMS Purple

5 GND Black

6TCK White

Figure 5. ispVM Programming Cable Connector

Programming the Daisy Chain

This board includes two Lattice Semiconductor programmable (U1=LFE3-95, U12=LCMXO1200) devices that can

be programmed in a daisy chain.

Figure 6. JTAG Chain

LatticeECP3

FPGA

(U1)

MachXO1200

CPLD

(U13)

TCK

TMS

TDI

TDO

TCK

TMS

TDI

TDO

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Download Procedures

Requirements:

• PC with ispVM System v.17.7 (or later) programming management software, installed with appropriate drivers

(USB driver for USB Cable, Windows NT/2000/XP parallel port driver for ispDOWNLOAD Cable).

Note: An option to install these drivers is included as part of the ispVM System setup.

• ispDOWNLOAD Cable (pDS4102-DL2A, HW7265-DL3A, HW-USB-1A, etc.)

JTAG Download

The LatticeECP3 device can be configured easily via its JTAG port. The device is SRAM-based; it must remain

powered on to retain its configuration when programmed in this fashion.

1. Connect the LatticeECP3 PCI Express Solutions Board to the appropriate power sources and power up board.

2. Connect the ispDOWNLOAD cable to the appropriate header. J4 is used for the 1x6 connection. J8 is used in

the same manner for x4 configurations.

3. Start the ispVM System software.

4. Press the SCAN button located in the toolbar. The LatticeECP3 and the MachXO1200 devices should be auto-

matically detected.

Figure 7. ispVM Main Window

5. Double-click the device to open the device information dialog. In the device information dialog, click the Browse

button located under Data File. Locate the desired bitstream file (.bit). Click OK to both dialog boxes.

6. To program only the LatticeECP3-95, place the LCMXO1200C device into BYPASS and the LFE3-95 should be

in FA ST PROGRAM mode.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 8. ispVM Fast Programming Mode

Figure 9. ispVM Device Information Dialog Box

7. Add Data File.

8. Click the green GO button. This will begin the download process into the device. Upon successful download, the

device will be operational.

Configuration Status Indicators

(see Appendix A, Figure 23)

These LEDs indicate the status of configuration to the FPGA.

• D6 (red) illuminated, this indicates that the programming was aborted or reinitialized driving the INITN output low.

• D9 (green) is illuminated, this indicates the successful completion of configuration by releasing the open collector

DONE output pin.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

• D10 (green) will flash indicating TDI activity.

• D8 (red) illuminated, this indicates that PROGRAMN is low.

• D7 (red) illuminated, this indicates that GSRN is low.

PROGRAMN & GSRN

(see Appendix A, Figure 23)

• These push-button switches assert/de-assert the logic levels on the PROGRAMN (SW3 or SW7) and GSRN

(SW1 or SW6). Depressing the button drives a logic level “0” to the device.

• These push-buttons are accessible from the back panel if the evaluation board is mounted in a PCI Express slot

of a PC.

CFG [2:0]

(see Appendix A, Figure 23)

• The FPGA CFG pins are set on the board for a particular programming mode via the SW2 DIP switch.

•JTAG programming is independent of the MODE pins and is always available to the user.

• Pushing in (depressing) the switch is ON and sets the value to 0.

Table 6. CFG Mode Selections

CFG2 CFG1 CFG0 Configuration Mode

0 (ON) 0 (ON) 0 (ON) SPI Flash

0 (ON) 1 (OFF) 0 (ON) SPIm

1 (OFF) 0 (ON) 1 (OFF) Slave Serial

1 (OFF) 1 (OFF) 1 (OFF) Slave Parallel

(don’t care)

(don’t care) ispJTAG™

On-Board Serial SPI Flash Memory

(see Appendix A, Figure 23)

• One Serial SPI (16-pin tssop 64M) Flash memory device (U6) is on-board for non-volatile configuration memory

storage. Either a STMicro M25P64VMF16 or Macronix MX25L6405 device is populated on-board.

• All CFG [2:0] need to be [000] depressed to read the Flash memory at power-up or after toggling the PRO-

GRAMN pin.

• Install jumper across pins 2 and 4 on J2.

Programming Serial SPI Flash Memory

The Serial SPI Flash memory device can be configured easily via its JTAG port. This mode enables the FPGA to

be programmed at power-up or assertion of PROGRAMN with a bitstream stored in the memory device.

1. Connect the LatticeECP3 PCI Express Solutions Board to the appropriate power sources and power-up board.

2. Connect the ispDOWNLOAD cable to the appropriate header. J4 is used with the cable.

3. Start the ispVM System software.

4. Press the SCAN button located in the toolbar. The LFE3-95 and the LCMXO1200C devices should be automat-

ically detected.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 10. Results of Scanning Board via ispVM

5. Double-click the Operation column for the LFE3-95 and the Device Dialog box shown below will open.

6. In the dialog box, select the SPI Flash Programming mode in the Device Access Options pull-down menu.

This will open the SPI Serial Flash Dialog box.

Figure 11. Device Information Dialog Screen

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 12. SPI Serial Flash Dialog Screen

7. The SPI Serial Flash Device dialog box will open. In this box select SPI Flash Erase, Program, Verify in the

Operation pull-down menu.

8. Select SPI Serial Flash in the Device Family pull-down menu, STMicro under the Vendor pull-down menu,

SPI-M2564 under the Device pull-down menu, and 16-lead SOIC under the Package submenu.

Figure 13. Select Device Dialog Box

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 14. Sample SPI Serial Flash Device Dialog Box

9. Click OK in the SPI Flash Device dialog box. Then click OK in the Select Device dialog box. You will then

return to the main configuration screen. If you do not desire to load the LCMXO1200C device, this device

should be placed in Flash Bypass mode by double-clicking the Operation column and selecting the Bypass

operation shown below.

Figure 15. FLASH Bypass for LCMXO1200C Device

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 16. Programming Main Window

10.From the main programming window, select GO in the top toolbar. This will begin the SPI Serial Flash program-

ming.

Figure 17. SPI Serial Flash Programming Status Window

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 18. Successful SPI Serial Flash Programming Session

On-Board Parallel SPI Flash Memory

(see Appendix A, Figure 24)

• A 16-bit parallel Flash device is also available. This board uses a Lattice MachXO CPLD device to act as a pro-

gramming bridge from the Flash device.

• The CFG [2:0] need to be [111], all up.

• Lattice ispVM programming software can be used to program either the serial SPI Flash or the parallel Flash

devices. Application note AN8077, Pa r alle l Flas h Pro gra mm in g an d F PGA Co nfig u ra tio n, addresses the use of

the parallel Flash implementation. Note: For parallel Flash loading, th e board nee ds the appropr iate conne ctions

of J2. J2 requires a jumper be installed between pins 1 and 3.

User-Defined General Purpose Clock Oscillator

(see Appendix A, Figure 27, Y1)

A 100MHz oscillator is included on-board. It is fanned-out to several destinations on the board, as described in

Ta bl e 7.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Table 7. 100MHz Clock Destin at ion s

Clock Destination PCB Designation Destination Pin

CPLD U12 A8

FPGA U1 P21-PCLKT2_0

FPGA U1 K3-LLUM0-GDLLT_IN

FPGA U1 M4-PCLKT7_0

SERDES

(see Appendix A, Figure 25)

SERDES/FPGA Reference Clocks

The 50-ohm terminated SMA connectors are optionally provided to supply reference clocks directly to the

LatticeECP3 device. Please contact the factory for information to populate the PCB with SMA connectors.

Table 8. SMA Inputs for External Clock Source

Connector SERDES Signal FPGA Pin

J6 FPGA_SMA_REFCLKP V20

J7 FPGA_SMA_REFCLKN W19

SERDES PCI Express Channels

(see Appendix A, Figure 25)

This board is equipped to communicate directly as an add-on card to a PCI Express host. It is designed with edge-

fingers (CN1 or CN2) that fit directly into a PCI Express host receptacle. Power can be supplied directly from the

PCI Express host via the edge-finger connections.

Table 9. x1 PCI Expres s Connections

CML Pin Name FPGA Pin PCIE PCI Express Edge Description

PCSA_HDOUTP_0 AF21 PERp0 A16 Integrated endpoint block transmit pair

PCSA_HDOUTN_0 AF20 PERn0 A17

PCSA_HDINP_0 AD21 PETp0 B14 Integrated endpoint block receive pair

PCSA_HDINN_0 AD20 PETn0 B15

PCSA_REFCLKP AC17 PCIe_CLKp A13 Integrated endpoint block differential clock pair

PCSA_REFCLKN AC18 PCIe_CLKn A14

PCIE_PERSETN U20 PERSTN A11 Fundamental PCI Express reset

Table 10. x4 PCI Express Connections

CML Pin Name FPGA Pin PCIE PCI Express Edge Description

PCSB_HDOUTP_0 AF13 PERp0 A16 Integrated endpoint block transmit pair

PCSB_HDOUTN_0 AF12 PERn0 A17

PCSB_HDINP_0 AD13 PETp0 B14 Integrated endpoint block receive pair

PCSB_HDINN_0 AD12 PETn0 B15

PCSB_HDOUTP_1 AF10 PERp1 A21 Integrated endpoint block transmit pair

PCSB_HDOUTN_1 AF11 PERn1 A22

PCSB_HDINP_1 AD10 PETp1 B19 Integrated endpoint block receive pair

PCSB_HDINN_1 AD11 PETn1 B20

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

FPGA Test Pins

(see Appendix A, Figure 27)

General Purpose DIP Switch

(see Appendix A, Figure 27, SW5)

General-purpose FPGA pins are available for user applications. FPGA pins are connected to a switch (SW5) which

is an SPST side actuated DIP switch. The switch is physically located on the secondary side of the PCB along the

back-panel edge. The switches are connected to a logic level 0 when depressed toward the board and a 1 when

away from the board. The designated pins are connected according to Tabl e 11.

Table 11. FPGA Te s t Pins (S e e Appe n d ix A, Figure 26)

FPGA BGA SW5 Switch Position

D9 1

12345678

Logic 1

Logic 0

PCB

F9 2

G8 3

A6 4

A5 5

E9 6

E8 7

A7 8

PCSB_HDOUTP_2 AF9 PERp2 A25 Integrated endpoint block transmit pair

PCSB_HDOUTN_2 AF8 PERn2 A26

PCSB_HDINP_2 AD9 PETp2 B23 Integrated endpoint block receive pair

PCSB_HDINN_2 AD8 PETn2 B24

PCSB_HDOUTP_3 AF6 PERp3 A29 Integrated endpoint block transmit pair

PCSB_HDOUTN_3 AF7 PERn3 A30

PCSB_HDINP_3 AD6 PETp3 B27 Integrated endpoint block receive pair

PCSB_HDINN_3 AD7 PETn3 B28

PCSB_REFCLKP AC9 PCIe_CLKp A13 Integrated endpoint block differential clock pair

PCSB_REFCLKN AC10 PCIe_CLKn A14

PCIE_PERSETN U20 PERSTN A11 Fundamental PCI Express reset

Table 10. x4 PCI Express Connections (Continued)

CML Pin Name FPGA Pin PCIE PCI Express Edge Desc r ipti on

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 19. 8-position DIP Switch (SW5) on Secondary PCB Side

General Purpose LEDs

(see Appendix A, Figure 27)

LEDs are provided along the back panel edge of the PCB. These LEDs are connected to general-purpose FPGA

I/Os. The LEDs are illuminated by the associated FPGA outputs being driven to a valid LOW level. The use of these

LEDs is defined for PCI Express applications to observe the status of the PCI Express link during operation. The

LEDs must be included in the FPGA design. These status LEDs are available in both x1 or x4 configurations. The

back panel marking reflects PCI Express specific status.

Table 12. LED Definitions

PCI Express x1 PCI Express x4

FPGA Pin# PCB Designator FPGA Pin# PCB Designator Description

H11 D19 C10 D20 User defined

H10 D21 A9 D22 User defined

F11 D26 A10 D27 User defined

G11 D24 B10 D25 User defined

D10 D11 D10 D12 Data link up active

F10 D13 A8 D14 L0 state active

G9 D15 B8 D16 Polling state inactive

G10 D17 C9 D18 PLL locked

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

General-Purpose Header

(see Appendix A, Figure 27, J5)

A 2x9 header (J5) provides a general-purpose connection to communicate with general purpose FPGA I/Os.

Table 13. General Purpose Header Connections

Header Pin FPGA Pin Header Pin FPGA Pin

1 GND 2 GND

3C15 4E15

5B15 6E14

7C14 8A20

9D14 10 A19

11 B16 12 C17

13 C16 14 B17

15 F13 16 A18

17 F14 18 A17

17-Segment LED Display

(see Appendix A, Figure 27, D13)

General-purpose FPGA pins are connected to a 17-segment display according to Ta b l e 14. These pins can be

driven low to illuminate the display segments.

Table 14. 17-Segment LED Display

Segment BGA

FE DP

TSR

KMN

Logic Analyzer Probe

(see Appendix A, Figure 27, LA1)

An AMP/TYCO 767004 38-position .025 VERT SMD logic analyzer probe connection is provided for the user to uti-

lize for test points. This connection provides 34 general I/O signals to be observed on a Logic Analyzer probe using

Mictor connections such as the Agilent 5346A.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Table 15. Logic Analyzer To FPGA Pin Reference

Signal FPGA Pin Signal FPGA Pin

LA1 AA25 LA2 Y24

LA3 W23 LA4 W22

LA5 AA26 LA6 AB26

LA7 W21 LA8 W20

LA9 AD26 LA10 AD25

LA11 AA24 LA12 AA23

LA13 AC26 LA14 AC25

LA15 Y19 LA16 Y20

LA17 AB24 LA18 AC24

LA19 Y22 LA20 AA22

LA21 AE25 LA22 AF24

LA23 AD24 LA24 AE24

LA25 AD23 LA26 AC23

LA27 AB20 LA28 AB21

LA29 AF23 LA30 AE23

LA31 W17 LA32 AB23

LA33 AB22 LA34 Y21

DDR2 Memory Devices

(see Appendix A, Figure 26, U14)

• The LatticeECP3 PCI Express Solutions Board is equipped with a 84-ball BGA DDR2 SDRAM memory device

such as a Micron MT47H16M16BG-3 device.

• The DDR2 memory interfaces include a 16-bit wide device.

• The evaluation board includes termination of address and command signals. It includes all power and external

components needed to demonstrate the memory controller of the LatticeECP3 device.

CPLD Device

(see Appendix A, Figure 24, U12)

The board includes a Lattice Semiconductor LCMXO-1200C CPLD. This device is used in conjunction with the par-

allel Flash device for loading the configuration memory of the FPGA. It is also used for general-purpose board

management functions. It has several connections to the FPGA and other devices on the PCB. It includes an active

high, push-button (SW4) if needed for a user design.

Generic user-defined interconnections are defined in Ta bl e 16.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Table 16. CPLD TO FPGA Interconnections

CPLD Pin FPGA Pin

M1 B2

P13 B3

P10 D4

N7 E4

N8 C3

P11 D3

N13 G5

N1 G6

N3 E3

N4 F4

P1 H6

M12 J6

M2 C2

M3 D2

M4 K8

M6 J7

Ordering Information

Description Ordering Part Number China RoHS Environment-Friendly

Use Period (EFUP)

LatticeECP3 PCI Express Development Kit

(Includes LatticeECP3 PCI Express Solutions

Board)

LFE3-95EA-PCIE-DKN

Technical Support Assistance

Hotline: 1-800-LATTICE (North America)

+1-503-268-8001 (Outside North America)

e-mail: techsupport@latticesemi.com

Internet: www.latticesemi.com

Revision History

Date Version Change Summary

March 2010 01.0 Initial release.

December 2010 01.1 LED definitions table, L0 state changed from active to inactive.

Download Procedures section, changed ispVM requirement from ispVM

v.17.4 (or later) to ispVM v.17.7 (or later).

August 2012 01.2 Updated document with new corporate logo.

Replaced Programming schematic.

listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of

their respective holders. The specifications and information herein are subject to change without notice.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Appendix A. Schematic

Figure 20. Cover Page

D D

A A

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Cover Page

19Thursday, May 21, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Cover Page

19Thursday, May 21, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Cover Page

19Thursday, May 21, 2009

PCSB

PCSA

PCIE_CLOCK

SMA CLOCK

16-bit DDR2

PCIe-X1

PCIe-X4

CH0

CH3

CH1, CH2

LOOPS

16- GPIO HEADER

LOGIC ANALYZER PROBE

JTAG/ISPVM

STATUS LEDs

16-SEGMENT DISPLAY

DIP SWITCH

100MHZ

GENERAL

OSC.

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 21. Power Generation

D D

A A

GND

1_8_TRIM

12_0V

3_3V

GND

VCCA_TRIM

12_0V

1_8V

1_2V_A

3_3V

1_8V

3_3V

VCC_CORE

12_0VIN

3_3V

VCC_CORE

12_0V

3_3VIN

12_0V 12_0V

12_0VIN

3_3V

1_8V

1_2V_A

3_3V12_0V

VCC_CORE

12_0V

1_8V

12_0V

1_2V_A

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Generation

29Thursday, March 26, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Generation

29Thursday, March 26, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Generation

29Thursday, March 26, 2009

1.2V

Core

1.8V

GND Pads

Distributed around the board

POWER INPUT

3.3V

12VIN GOOD

+12VDC

GND

1.2V

Analog

POWER RAIL GOOD INDICATORS

1.2V

VCC_CORE 1.8V 3.3V

1.2V

Analog

TP2

TestPoint

TP2

TestPoint

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

LP1

5016

LP1

5016

TB1

Terminal Block/ED1202DS

TB1

Terminal Block/ED1202DS

TP4

TestPoint

TP4

TestPoint

220R-0603SMT

1_8K-1206SMT

F1251CT-ND

10A Fast-Blo SMT Socketed Fuse

F1251CT-ND

10A Fast-Blo SMT Socketed Fuse

R13

12_1K-0603SMT

R13

12_1K-0603SMT

TP6

TestPoint

TP6

TestPoint

R18

806R-0603SMT

R18

806R-0603SMT

LP3

5016

LP3

5016

LED-SMT1206_GREEN

10UF-16V-TANTBSMT

TP8

TestPoint

TP8

TestPoint

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

R12

OPEN-0805SMT

R12

OPEN-0805SMT

330UF-FKSMT

0R-0603SMT

LP2

5016

LP2

5016

1_8K-1206SMT

TP10

TestPoint

TP10

TestPoint

R16

100R-0805SMT

R16

100R-0805SMT

330UF-FKSMT

10UF-16V-TANTBSMT

TP12

TestPoint

TP12

TestPoint

10K-0603SMT

22HP037-2.1mm

Male Power Jack 2.1mm

22HP037-2.1mm

Male Power Jack 2.1mm

470UF-FKSMT

R14

2K-0603SMT

R14

2K-0603SMT

R19

1K-0603SMT

R19

1K-0603SMT

D33

SCHOTTKY/VISHAY-V12P10

D33

SCHOTTKY/VISHAY-V12P10

2N2222/SOT23

LED-SMT1206_GREEN

TP1

TestPoint

TP1

TestPoint

2N2222/SOT23

SC1592

ILIM 1

IN 2

CNTL 3

GND 4

OUT 5

SENSE 6

EN 7

TAB

10K-0603SMT

PTH12060L

GND

VIN

INHIBIT#

ADJUST

SENSE 5

VOUT 6

GND

7TRACK 8

MDWN 9

MUP 10

R10 0R-0603SMTR10 0R-0603SMT

TP3

TestPoint

TP3

TestPoint

1_8K-1206SMT

2N2222/SOT23

100UF-FKSMT

R11

OPEN-0805SMT

R11

OPEN-0805SMT

R15

100R-0805SMT

R15

100R-0805SMT

R21

10K-0603SMT

R21

10K-0603SMT

LP5

5016

LP5

5016

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

LED-SMT1206_GREEN

TP5

TestPoint

TP5

TestPoint

LED-SMT1206_GREEN

R17

1K-0603SMT

R17

1K-0603SMT

TP7

TestPoint

TP7

TestPoint

1_8K-1206SMT

10UF-16V-TANTBSMT

R20

2K-0603SMT

R20

2K-0603SMT

10K-0603SMT

PTH12060W

GND

VIN

INHIBIT#

ADJUST

SENSE 5

VOUT 6

GND

7TRACK 8

MDWN 9

MUP 10

LP4

5016

LP4

5016

TP9

TestPoint

TP9

TestPoint

10UF-16V-TANTBSMT

SC1592

ILIM 1

IN 2

CNTL 3

GND 4

OUT 5

SENSE 6

EN 7

TAB

TP11

TestPoint

TP11

TestPoint

LED-SMT1206_GREEN

C10

330UF-FKSMT

C10

330UF-FKSMT

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

F1228CT-ND

5A Fast-Blo SMT Socketed Fuse

R22

10K-0603SMT

R22

10K-0603SMT

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 22. Power Supplies

D D

A A

VCC_CORE

VCC_PLL

3_3V

1_2V_A

1_8V

3_3V

1_2V_A

VCC_PLL

3_3V

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Supplies

39Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Supplies

39Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Power Supplies

39Monday, February 23, 2009

C12

1000PF-0402SMT

C12

1000PF-0402SMT

C83

1000PF-0402SMT

C83

1000PF-0402SMT

C75

100NF-0603SMT

C75

100NF-0603SMT

C31

100NF-0603SMT

C31

100NF-0603SMT

ECP3-672fpBGA

U1J

ECP3-672fpBGA

U1J

VCCA V13

VCCA V14

VCCA W12

VCCA W13

VCCA W14

VCCA W15

VCCA Y13

VCCA Y14

VCCAUX J11

VCCAUX J16

VCCAUX J18

VCCAUX J9

VCCAUX L18

VCCAUX L9

VCCAUX T18

VCCAUX T9

VCCAUX V11

VCCAUX V16

VCCAUX V18

VCCAUX V9

VCCPLL_L M10

VCCPLL_L R10

VCCPLL_R M17

VCCPLL_R R17

C82

100NF-0603SMT

C82

100NF-0603SMT

C54

10NF-0603SMT

C54

10NF-0603SMT

MH2

M HOLE2

MH2

M HOLE2

C64

1000PF-0402SMT

C64

1000PF-0402SMT

C22

10NF-0603SMT

C22

10NF-0603SMT

C71

1UF-16V-0805SMT

C71

1UF-16V-0805SMT

C17

1000PF-0402SMT

C17

1000PF-0402SMT

C56

1000PF-0402SMT

C56

1000PF-0402SMT

C80

10NF-0603SMT

C80

10NF-0603SMT

C35

100NF-0603SMT

C35

100NF-0603SMT

C63

1000PF-0402SMT

C63

1000PF-0402SMT

C69

22UF-16V_TANTBSMT

C69

22UF-16V_TANTBSMT

C24

10NF-0603SMT

C24

10NF-0603SMT

C46

100NF-0603SMT

C46

100NF-0603SMT

C34

1UF-16V-0805SMT

C34

1UF-16V-0805SMT

C77

1UF-16V-0805SMT

C77

1UF-16V-0805SMT

C14

1000PF-0402SMT

C14

1000PF-0402SMT

C37

1000PF-0402SMT

C37

1000PF-0402SMT

C21

10NF-0603SMT

C21

10NF-0603SMT

C57

1000PF-0402SMT

C57

1000PF-0402SMT

C26

1UF-16V-0805SMT

C26

1UF-16V-0805SMT

C81

22UF-16V_TANTBSMT

C81

22UF-16V_TANTBSMT

C29

22UF-16V_TANTBSMT

C29

22UF-16V_TANTBSMT

C65

1000PF-0402SMT

C65

1000PF-0402SMT

C30

100NF-0603SMT

C30

100NF-0603SMT

C38

1000PF-0402SMT

C38

1000PF-0402SMT

ECP3-672fpBGA

U1I

ECP3-672fpBGA

U1I

VCC K11

VCC K12

VCC K13

VCC K14

VCC K15

VCC K16

VCC L10

VCC L11

VCC L12

VCC L15

VCC L16

VCC L17

VCC M11

VCC M16

VCC N10

VCC N17

VCC P10

VCC P17

VCC R11

VCC R16

VCC T10

VCC T11

VCC T12

VCC T15

VCC T16

VCC T17

VCC U11

VCC U12

VCC U13

VCC U14

VCC U15

VCC U16

C78

100NF-0603SMT

C78

100NF-0603SMT

C45

100NF-0603SMT

C45

100NF-0603SMT

C51

10NF-0603SMT

C51

10NF-0603SMT

C13

1000PF-0402SMT

C13

1000PF-0402SMT

C39

1000PF-0402SMT

C39

1000PF-0402SMT

C36

1000PF-0402SMT

C36

1000PF-0402SMT

C28

100NF-0603SMT

C28

100NF-0603SMT

C55

10NF-0603SMT

C55

10NF-0603SMT

C41

10NF-0603SMT

C41

10NF-0603SMT

C40

1000PF-0402SMT

C40

1000PF-0402SMT

C47

10NF-0603SMT

C47

10NF-0603SMT

C20

10NF-0603SMT

C20

10NF-0603SMT

C74

100NF-0603SMT

C74

100NF-0603SMT

C62

1000PF-0402SMT

C62

1000PF-0402SMT

FB1

BLM41PG600SN1

FB1

BLM41PG600SN1

MH1

M HOLE2

MH1

M HOLE2

C43

10NF-0603SMT

C43

10NF-0603SMT

C27

22UF-16V_TANTBSMT

C27

22UF-16V_TANTBSMT

C42

100NF-0603SMT

C42

100NF-0603SMT

C59

1000PF-0402SMT

C59

1000PF-0402SMT

C50

10NF-0603SMT

C50

10NF-0603SMT

C19

10NF-0603SMT

C19

10NF-0603SMT

MH3

M HOLE2

MH3

M HOLE2

C48

1UF-16V-0805SMT

C48

1UF-16V-0805SMT

C61

1000PF-0402SMT

C61

1000PF-0402SMT

C85

1000PF-0402SMT

C85

1000PF-0402SMT

C15

1000PF-0402SMT

C15

1000PF-0402SMT

C72

100NF-0603SMT

C72

100NF-0603SMT

ECP3-672fpBGA

U1K

ECP3-672fpBGA

U1K

GND A2

GND A25

GND AA13

GND AA14

GND AA18

GND AA19

GND AA21

GND AA6

GND AA8

GND AA9

GND AB19

GND AB2

GND AB25

GND AB8

GND AC11

GND AC12

GND AC13

GND AC14

GND AC15

GND AC16

GND AC19

GND AC20

GND AC21

GND AC22

GND AC5

GND AC6

GND AC7

GND AC8

GND AD22

GND AD5

GND AE1

GND AE10

GND AE11

GND AE12

GND AE13

GND AE14

GND AE15

GND AE16

GND AE17

GND AE18

GND AE19

GND AE20

GND AE21

GND AE22

GND AE26

GND AE5

GND AE6

GND AE7

GND AE8

GND AE9

GND AF2

GND AF22

GND AF25

GND AF5

GND B1

GND B14

GND B18

GND B22

GND B26

GND B5

GND B9

GND D11

GND D16

GND D20

GND D7

GND E2

GND E25

GND F21

GND F6

GND G12

GND G15

GND G23

GND G4

GND H18

GND H9

GND J12

GND J15

GND J19

GND J2

GND J25

GND J8

GND K10

GND K17

GND L13

GND L14

GND L23

GND L4

GND M12

GND M13

GND M14

GND M15

GND M18

GND M20

GND M7

GND M9

GND N11

GND N12

GND N13

GND N14

GND N15

GND N16

GND N2

GND P11

GND P12

GND P13

GND P14

GND P15

GND P16

GND P25

GND R12

GND R13

GND R14

GND R15

GND R20

GND R7

GND R9

GND T13

GND T14

GND T19

GND T23

GND T4

GND U17

GND V12

GND V15

GND V19

GND V2

GND V25

GND W11

GND W16

GND Y10

GND Y11

GND Y12

GND Y15

GND Y16

GND Y17

GND Y18

GND Y23

GND Y4

GND Y9

C32

100NF-0603SMT

C32

100NF-0603SMT

C67

1000PF-0402SMT

C67

1000PF-0402SMT

C44

22UF-16V_TANTBSMT

C44

22UF-16V_TANTBSMT

C53

10NF-0603SMT

C53

10NF-0603SMT

C84

1000PF-0402SMT

C84

1000PF-0402SMT

C58

1000PF-0402SMT

C58

1000PF-0402SMT

C16

1000PF-0402SMT

C16

1000PF-0402SMT

C33

100NF-0603SMT

C33

100NF-0603SMT

C66

1000PF-0402SMT

C66

1000PF-0402SMT

C73

10NF-0603SMT

C73

10NF-0603SMT

C86

1000PF-0402SMT

C86

1000PF-0402SMT

C52

10NF-0603SMT

C52

10NF-0603SMT

C76

10NF-0603SMT

C76

10NF-0603SMT

C49

10NF-0603SMT

C49

10NF-0603SMT

C25

10NF-0603SMT

C25

10NF-0603SMT

C11

1000PF-0402SMT

C11

1000PF-0402SMT

C70

10NF-0603SMT

C70

10NF-0603SMT

C68

1000PF-0402SMT

C68

1000PF-0402SMT

C60

1000PF-0402SMT

C60

1000PF-0402SMT

C18

1000PF-0402SMT

C18

1000PF-0402SMT

C79

10NF-0603SMT

C79

10NF-0603SMT

C23

10NF-0603SMT

C23

10NF-0603SMT

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 23. Programming

D D

C C

B B

A A

CONFIG

CFG Switches

SPI FLASH

FROM ISPVM CABLE

This LED

indicates activity

on TDI.

JTAG

FPGA GSRN

PROGRAMN

DONE indicator will light when

configuration is successfully

completed

INITN indicator will light

if an error occurs during

configuration programming

edoM noitarugifnoC2GFC CFG1 CFG0

ispJTAG

Slave Serial

SPIm

SPI Flash

Slave Parallel

0(ON)

1(OFF)1(OFF)1(OFF)

1(OFF) 1(OFF)

0(ON)0(ON) 1(OFF)

0(ON)

0(ON) 0(ON)

TMS

TCK

+3.3V

TDI

GND

TDO

CONFIG

Status LEDs

PROGRAMN

& GSRN

Pushbuttons

Primary

Component

Side

Secondary

Component

Side

SW1 and SW3 on Primary Side

SW6 and SW7 on Secondary Side

PROGRAMN

CFG2

CFG1

CFG0

TCK_BUF

FPGA_D1

FPGA_D0

FPGA_D3

FPGA_D4

FPGA_D5

FPGA_D6

FPGA_D2

TMS_BUF

FLASH_DIS

PROGRAMN

FPGA_XRES

FPGA_CSSPI0N_DI

SPI0_Q

DONE

LOADER_CK

PROGRAMN

FPGA_CSSPI1N_DOUT

GSRN

FPGA_CSSPI0N_DI

CFG2

CFG1

CFG0

INITN

FPGA_SISPI

INITN

DONE

GSRN

TDI_BUF

FPGA_CCLK

SPI_CLK

FPGA_D7

FPGA_SISPI

FPGA_WRITEN

DONE

FPGA_D0SPIFASTN

FPGA_XRES

FPGA_CCLK

INITN

PROGRAMN

SPI_CLK

FPGA_MCLK

TCK_BUF

TMS_BUF

TDI_BUF

TDI_XO

FPGA_MCLK

FPGA_CCLK

FPGA_CSN

SPI0_Q FPGA_D7

FPGA_CS1N

GSRN

LOCAL_TDI

LOCAL_TMS

LOCAL_TCK

FPGA_CS1N

FPGA_CSN

FPGA_WRITEN

FPGA_D13

FPGA_D12

FPGA_D11

FPGA_D10

FPGA_D9

FPGA_D8

FPGA_D15

FPGA_D14

FPGA_D[8..15]

3_3V

TMS_BUF[5]

PROGRAMN [5]

DONE [5]

INITN [5]

LOADER_CK[5]

CFG[0..2] [5]

TDI_XO [5]

FPGA_CCLK [5]

]5[NRSG

SPI_CLK[5]

TCK_BUF[5]

TDO_XO[5]

FPGA_WRITEN [5]

FPGA_CS1N [5]

FPGA_CSN [5]

FPGA_D[0..7] [5]

FPGA_D[8..15] [5]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Progamming

49Thursday, August 09, 2012

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Progamming

49Thursday, August 09, 2012

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Progamming

49Thursday, August 09, 2012

NC7WZ16-MAAO6A/Fairchild TinyLogic

IN A1 1

GND

IN A2 3

OUT Y2

VCC 5

OUT Y1

R46

10K-0603SMT

U10

NC7WZ16-MACO6A/Fairchild TinyLogic

IN A1 1

GND

IN A2 3

OUT Y2

VCC 5

OUT Y1

LED-SMT1206_GREEN

R27

10K-0603SMT

R48

10K-0603SMT

RN1C

4.7K

C90

100NF-0603SMT

C87

100NF-0603SMT

C92

100NF-0603SMT

D10

LED-SMT1206_GREEN

HEADER 6

R39

10K-0603SMT

SW3

SW PUSHBUTTON-SPST

R36

10K-0603SMT

R31

10K-0603SMT

SW6

SW PUSHBUTTON-SPST

R42OPEN-0603SMT

R50

100R-0603SMT

RN1B

4.7K

HEADER 2

R44

4_7K-0603SMT

RN1D

EXBV8V472JV

4.7K

R24

680R-0603SMT

M25P64-FLASH

DU1

DU2

VCC

2HOLD#

DU4

6DU3

W# 9

VSS 10

DU5 11

DU6 12

DU7 13

DU8 14

D15

CK 16

HEADER 6

R38

10K-0603SMT

R49

10K-0603SMT

LED-SMT1206_RED

R51

100R-0603SMT

LED-SMT1206_RED

RN1A

4.7K

ECP3-672fpBGA

U1G

PR16B/BUSY/SISPI/AVDN K21

PR14B/D6/SPID1 C26

PR16A/D7/SPID0 K20

PR14A/D5 B25

PR13B/D4/SO J22

PR13A/D3/SI J21

PR11B/D2 D26

PR11A/D1 D25

PR10B/D0/SPIFAST N D23

PR8B/MCLK C25

PR10A/W RITEN/OEN E24

PR8A/DOUT/CSON/CSSPI1N D24

PR7B/CSN/SN/CONT1N H22

PR5B/DI/CSSPI0N/CEN C24

PR7A/CS1N/HOLD/CONT2N G22

PR5A C23

DONE B24

CCLK A24

INITN H21

PROGRAMN J20

CFG0 B23

CFG1 A23

CFG2 E21

PT145B F22

PT145A F23

PT143B E22

PT143A E23

PT142B G21

PT142A G20

PT140B D21

PT140A D22

TMS E6

TDO E7

TCK E5

TDI F5

XRES R18

TEMPSENSE U10

TEMPVSS V8

VCCIO8 H19

VCCIO8 H20

VCCJ H7

C91

100NF-0603SMT

SW7

SW PUSHBUTTON-SPST

R43

4_7K-0603SMT

R33

10K-0603SMT

R30 10K-0603SMT

R47

220R-0603SMT

SW1

SW PUSHBUTTON-SPST

R25

680R-0603SMT

R23

680R-0603SMT

R29

10K-0603SMT

R41OPEN-0603SMT

C88

10NF-0603SMT

R34

10K-0603SMT

C89

100NF-0603SMT

SW2INS38259285

SW DIP-3 CTS 194-3MST

HEADER 2X2

R40

4_7K-0603SMT

R26

220R-0603SMT

R37

10K-0603SMT

R32

10K-0603SMT

R28

10K-0603SMT

MAX6817

IN1

GND

IN2

OUT2 4

VCC 5

OUT1 6

U9B

SN74LVC125A/SO14

83A 9

3OE_N 10

11 4A 12

4OE_N 13

VCC 14

U9A

SN74LVC125A/SO14

1OE_N 1

1A 2

2OE_N 4

2A 5

GND

LED-SMT1206_RED

R45

10K-0603SMT

R35

10K-0603SMT

2N2222/SOT23

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 24. Parallel FPGA Loader

D D

A A

FLASH_A21

FLASH_A20

FLASH_A19

FLASH_A18

FLASH_A17

FLASH_A16

FLASH_A15

FLASH_A14

FLASH_A13

FLASH_A12

FLASH_A11

FLASH_A10

FLASH_A9

FLASH_A8

FLASH_A7

FLASH_A6

FLASH_A5

FLASH_A4

FLASH_A3

FLASH_A2

FLASH_A1

FLASH_A0

FLASH_A[0..21]

FLASH_D0

FLASH_D1

FLASH_D2

FLASH_D3

FLASH_D4

FLASH_D5

FLASH_D6

FLASH_D7

FLASH_D8

FLASH_D9

FLASH_D10

FLASH_D11

FLASH_D12

FLASH_D13

FLASH_D14

FLASH_D15

FLASH_D[0..15]

FLASH_WE_N

FLASH_WP_N_ACC

FLASH_RESET_N

FLASH_OE_N

FLASH_CEm

FLASH_RD/BY

FLASH_BYTEn

TMS_BUF

TDI_XO

PROGRAMN

GSRN

DONE

TCK_BUF

INITN

FPGA_0

FPGA_D[0..7]

FPGA_1

FPGA_2

FPGA_3

FPGA_4

FPGA_5

FPGA_D2

FPGA_6

FPGA_7

FPGA_8

FPGA_D3

FPGA_D4

FPGA_D5

FPGA_D6

FPGA_D7

FPGA_D0

FPGA_D1

FPGA_9

FPGA_10

FPGA_11

FPGA_12

FPGA_13

FPGA_14

FPGA_15

LOADER_CK

CFG1

CFG2

CFG0

FLASH_A21

FLASH_A9

FLASH_A8

FLASH_A7

FLASH_A6

FLASH_A5

FLASH_A4

FLASH_A3

FLASH_A2

FLASH_A1

FLASH_A0

FLASH_A20

FLASH_A19

FLASH_A18

FLASH_A17

FLASH_A16

FLASH_A15

FLASH_A14

FLASH_A13

FLASH_A12

FLASH_A11

FLASH_A10

FLASH_CLK

FLASH_WE_N

FLASH_WP_N_ACC

FLASH_RESET_N

FLASH_OE_N

FLASH_CEm

FLASH_RD/BY

FLASH_BYTEn

FLASH_D0

FLASH_D1

FLASH_D2

FLASH_D3

FLASH_D4

FLASH_D5

FLASH_D6

FLASH_D7

FLASH_D8

FLASH_D9

FLASH_D10

FLASH_D11

FLASH_D12

FLASH_D13

FLASH_D14

FLASH_D15

FPGA_D[8..15]

FPGA_D13

FPGA_D12

FPGA_D11

FPGA_D10

FPGA_D9

FPGA_D8

FPGA_D15

FPGA_D14

3_3V

3_3V TDO_XO[4]

TMS_BUF[4]

TDI_XO[4]

FPGA_[0:15][8]

PROGRAMN[4]

GSRN[4]

DONE[4]

TCK_BUF[4]

INITN[4]

FPGA_D[0..7][4]

LOADER_CK[4]

CFG[0..2][4]

SPI_CLK[4]

FPGA_CCLK[4]

FPGA_WRITEN [4]

FPGA_CS1N [4]

FPGA_CSN [4]

FLASH_CLK [9]

FPGA_D[8..15][4]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Parallel FPGA Loader

59Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Parallel FPGA Loader

59Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

Parallel FPGA Loader

59Monday, February 23, 2009

CPLD RESET

R55

2_2K-0603SMT

R55

2_2K-0603SMT

C98

10NF-0603SMT

C98

10NF-0603SMT

R57

1K-0603SMT

R57

1K-0603SMT

Lattice

FPGA

Loader

LCMXO1200C-CSBGA132

U12

Lattice

FPGA

Loader

LCMXO1200C-CSBGA132

U12

FPGA_INITN

CFG1

A2 CFG0

FPGA_DONE

FPGA_DATA_1

FLASH_ADDRESS_1 A6

CLOCK A8

FLASH_ADDRESS_4 A9

FLASH_ADDRESS_9 A11

FLASH_ADDRESS_19 A12

FLASH_ADDRESS_17 A13

FLASH_ADDRESS_12 A14

SPI_CLK

FLASH_CEm B2

FLASH_ADDRESS_2 B3

FLASH_ADDRESS_3 B5

FLASH_ADDRESS_0 B6

FPGA_DATA_7

FLASH_ADDRESS_13 B8

FLASH_ADDRESS_5 B9

FLASH_ADDRESS_7 B10

FLASH_ADDRESS_15 B12

FLASH_ADDRESS_18 B13

FLASH_ADDRESS_21 B14

FLASH_OE_N C1

FLASH_CE0_N C3

FLASH_DQ_6 C4

FLASH_ADDRESS_11 C8

FLASH_ADDRESS_6 C10

FLASH_ADDRESS_8 C11

FLASH_ADDRESS_20 C12

FLASH_ADDRESS_16 C13

FLASH_ADDRESS_14 C14

FLASH_RD/BY D1

FLASH_DQ_7 D3

FLASH_DQ_14 D12

FLASH_ADDRESS_10 D14

FPGA_DATA_6

FLASH_DQ_8 E13

FLASH_DQ_15 E14

FLASH_BYTEn F2

FLASH_CE1_N F3

FPGA_CSN F12

FLASH_DQ_9 F13

FLASH_DQ_10 F14

FPGA_DATA_0

FLASH_DQ_0 G3

FLASH_DQ_1 G13

FLASH_DQ_12 G14

FLASH_DQ_4 H1

FPGA_PROGRAMN

GPIO16

H12

GPIO17

H13

FPGA_CS1N H14

FLASH_DQ_5 J1

TSALL

FPGA_DATA_4

FLASH_DQ_13 J12

FLASH_DQ_11 J13

FPGA_DATA_5

FLASH_WE_N K2

FUNC_RESET

K12

FLASH_DQ_2 K13

FLASH_WP_N_ACC L1

FPGA_CLK

GPIO0

GPIO12

GPIO13

GPIO14

GPIO15

FPGA_DATA_3

CFG2

GPIO11

M12

GPIO18

M13

GPIO20

M14

GPIO7

GPIO8

GPIO9

GPIO19

GPIO3

GPIO4

FLASH_DQ_3 N9

FPGA_WRITEN N10

GPIO6

N13

FPGA_RESET N

N14

GPIO10

FPGA_CCLK

FPGA_DATA_2

GPIO2

P10

GPIO5

P11

GPIO1

P13

FLASH_RESET_N P14

TCK

TDI

TDO

TMS

GND

VCC H3

GND

VCC P6

VCCAUX P7

GND

N11

GND

L13

VCC G12

GND

D13

GND

A10

VCCAUX A7

VCC C7

GND

J14

GND

VCCIO0 C5

VCCIO1 B11

VCCIO2 E12

VCCIO3 L12

VCCIO4 M10

VCCIO5 N2

VCCIO7 D2

VCCIO6 K3

SLEEPN

N12

FPGA_D15

FPGA_D14

FPGA_D13

K14

FPGA_D12

P12

FPGA_D11

L14

FPGA_D10

M11

FPGA_D9

FPGA_D8

C96

10NF-0603SMT

C96

10NF-0603SMT

R54

10K-0603SMT

R54

10K-0603SMT

C97

100NF-0603SMT

C97

100NF-0603SMT

SW4

B3F-1150

Momentary Switch

SW4

B3F-1150

Momentary Switch

1 3

C94

10NF-0603SMT

C94

10NF-0603SMT

R56

1K-0603SMT

R56

1K-0603SMT

U11

S29GL064A

U11

S29GL064A

A21

A20

A19

A18

A17

A16

A15

A14

A13

A12

A11

A10

GND

H1 RESETn B4

WPn B3

BYTEn F6

RD/BY A3

WEn A4

OEn G1

CEn F1

DQ0 E2

DQ1 H2

DQ2 E3

DQ3 H3

DQ4 H4

DQ5 E4

DQ6 H5

DQ7 E5

DQ8 F2

DQ9 G2

DQ10 F3

DQ11 G3

DQ12 F4

DQ13 G5

DQ14 F5

DQ15 G6

VCC G4

C95

100NF-0603SMT

C95

100NF-0603SMT

C100

10NF-0603SMT

C100

10NF-0603SMT

C93

100NF-0603SMT

C93

100NF-0603SMT

R53

0R-0603SMT

R53

0R-0603SMT

R52

OPEN-0603SMT

R52

OPEN-0603SMT

C99

100NF-0603SMT

C99

100NF-0603SMT

C101

100NF-0603SMT

C101

100NF-0603SMT

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 25. SERDES

D D

A A

PCSA_HDOUTP0

PCSA_HDOUTN0

x1_PERp0

x1_PERn0

PCIE_3V3

x1_PERp0

x1_PERn0

PCIE_PERSTN

x1_PETp0

x1_PETn0

PCIE_3V3

x1_PCIE_CLKN

x1_PCIE_CLKP

x4_PERp0

x4_PERn0

x4_PERp1

x4_PERn1

x4_PETp3

x4_PERp2

x4_PERn2

x4_PERp3

x4_PERn3

PCIE_PERSTN

PCIE_3V3

x4_PETp0

x4_PETn0

x4_PETp1

x4_PETn1

x4_PETp2

x4_PETn2

x4_PETn3

PCIE_3V3

x4_PCIE_CLKN

x4_PCIE_CLKP

x4_PERp3

x4_PERn3

x4_PERp2

x4_PERn2

x4_PERp1

x4_PERn1

x4_PERp0

x4_PERn0

x4_PCIE_CLKP x4_PCIE_CLKN

x1_PCIE_CLKP x1_PCIE_CLKN

LOOP3_N

LOOP3_P

LOOP3_N

x1_PCIE_CLKN

x1_PCIE_CLKP

LOOP2_P

LOOP2_N

LOOP1_P

LOOP1_N

x1_PETp0

x1_PETn0

LOOP2_P

LOOP2_N

LOOP1_P

LOOP1_N

PCSA_HDOUTP0

PCSA_HDOUTN0

LOOP3_P

x4_PCIE_CLKP

x4_PCIE_CLKN

x4_PETn0

x4_PETp0

x4_PETp3

x4_PETp1

x4_PETn3

x4_PETn1

x4_PETp2

x4_PETn2

PCSB_HDOUTP0

PCSB_HDOUTN0

PCSB_HDOUTN1

PCSB_HDOUTP1

PCSB_HDOUTN2

PCSB_HDOUTP2

PCSB_HDOUTP3

PCSB_HDOUTN3

PCSB_HDOUTP1

PCSB_HDOUTN1

PCSB_HDOUTP2

PCSB_HDOUTP3

PCSB_HDOUTN3

PCSB_HDOUTP0

PCSB_HDOUTN0

PCSB_HDOUTN2

12_0V

PCSA_VCCIB

1_2V_A

PCSA_VCCOB

1_2V_A

PCSB_VCCIB

PCSB_VCCOB

1_2V_A

PCSA_VCCIB

PCSA_VCCOB

PCSB_VCCIB

PCSB_VCCOB

PCSA_VCCOB

PCSB_VCCOBPCSB_VCCIB

PCSA_VCCIB

PCIE_PERSTN[8]

x1_PRSNTn [8]

x4_PRSNTn [8]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

SERDES

69Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

SERDES

69Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

SERDES

69Monday, February 23, 2009

X1 PCIe Board Fingers

B side = Primary Component Side(TOP)

A side = Secondary Component Side(BOTTOM)

Place near U1

X4 PCIe Board Fingers

B side = Secondary Component Side(BOTTOM)

A side = PRIMARY Component Side(TOP)

All Nets are 85-ohm differential pairs.

The P and N traces shall be <20mil matched in length

All Nets are 85-ohm differential pairs.

The P and N traces shall be <20mil matched in length

C122

100NF-0603SMT

C122

100NF-0603SMT

C116

100NF-0603SMT

C116

100NF-0603SMT

C111

10NF-0603SMT

C111

10NF-0603SMT

C114

100NF-0603SMT

C114

100NF-0603SMT

C123

10NF-0603SMT

C123

10NF-0603SMT

C107

1UF-16V-0805SMT

C107

1UF-16V-0805SMT

C126100NFX5R-0402SMT C126100NFX5R-0402SMT

C109

1UF-16V-0805SMT

C109

1UF-16V-0805SMT

CN1

PCI Express x4 Edge Finger Conn.

CN1

PCI Express x4 Edge Finger Conn.

PRSNT1#

+12V

GND

JTAG2

JTAG3

JTAG4

JTAG5

+3.3V

A10

PERST#

A11

GND

A12

REFCLK+

A13

REFCLK-

A14

GND

A15

PERp0

A16

PERn0

A17

GND

A18

RSVD_A19

A19

GND

A20

PERp1

A21

PERn1

A22

GND

A23

GND

A24

PERp2

A25

PERn2

A26

GND

A27

GND

A28

PERp3

A29

PERn3

A30

GND

A31

+12V B1

+12V B2

RSVD_B3 B3

GND B4

SMCLK B5

SMDAT B6

GND B7

+3.3V B8

JTAG1 B9

3.3Vaux B10

WAKE# B11

RSVD_B12 B12

GND B13

PETp0 B14

PETn0 B15

GND B16

PRSNT3# B17

GND B18

PETp1 B19

PETn1 B20

GND B21

GND B22

PETp2 B23

PETn2 B24

GND B25

GND B26

PETp3 B27

PETn3 B28

GND B29

RSVD_B30 B30

PRSNT4# B31

GND B32

RSVD_A32

A32

R59 OPEN-0603SMTR59 OPEN-0603SMT

C106

22UF-16V_TANTBSMT

C106

22UF-16V_TANTBSMT

C135100NFX5R-0402SMT C135100NFX5R-0402SMT

C108

22UF-16V_TANTBSMT

C108

22UF-16V_TANTBSMT

C115

10NF-0603SMT

C115

10NF-0603SMT

C125

10NF-0603SMT

C125

10NF-0603SMT

C134100NFX5R-0402SMT C134100NFX5R-0402SMT

C117

10NF-0603SMT

C117

10NF-0603SMT

C133100NFX5R-0402SMT C133100NFX5R-0402SMT

ECP3-672fpBGA

U1H

ECP3-672fpBGA

U1H

PCSA_HDINP0 AD21

PCSA_HDINN0 AD20

PCSA_HDINP1 AD18

PCSA_HDINN1 AD19

PCSA_HDINP2 AD17

PCSA_HDINN2 AD16

PCSA_HDINP3 AD14

PCSA_HDINN3 AD15

PCSA_HDOUT P0 AF21

PCSA_HDOUTN0 AF20

PCSA_HDOUT P1 AF18

PCSA_HDOUT N1 AF19

PCSA_HDOUT P2 AF17

PCSA_HDOUTN2 AF16

PCSA_HDOUT P3 AF14

PCSA_HDOUTN3 AF15

PCSA_REFCLKP AC17

PCSA_REFCLKN AC18

PCSA_VCCIB0 AB18

PCSA_VCCIB1 AA16

PCSA_VCCIB2 AA15

PCSA_VCCIB3 AB14

PCSA_VCCOB0 AA17

PCSA_VCCOB1 AB17

PCSA_VCCOB2 AB16

PCSA_VCCOB3 AB15

PCSB_HDINP0 AD13

PCSB_HDINN0 AD12

PCSB_HDINP1 AD10

PCSB_HDINN1 AD11

PCSB_HDINP2 AD9

PCSB_HDINN2 AD8

PCSB_HDINP3 AD6

PCSB_HDINN3 AD7

PCSB_HDOUT P0 AF13

PCSB_HDOUT N0 AF12

PCSB_HDOUT P1 AF10

PCSB_HDOUTN1 AF11

PCSB_HDOUT P2 AF9

PCSB_HDOUTN2 AF8

PCSB_HDOUT P3 AF6

PCSB_HDOUTN3 AF7

PCSB_REFCLKP AC9

PCSB_REFCLKN AC10

PCSB_VCCIB0 AB13

PCSB_VCCIB1 AB11

PCSB_VCCIB2 AA11

PCSB_VCCIB3 AB9

PCSB_VCCOB0 AB12

PCSB_VCCOB1 AA12

PCSB_VCCOB2 AB10

PCSB_VCCOB3 AA10

FB3

BLM41PG600SN1

FB3

BLM41PG600SN1

C113

10NF-0603SMT

C113

10NF-0603SMT

C132100NFX5R-0402SMT C132100NFX5R-0402SMT

FB4

BLM41PG600SN1

FB4

BLM41PG600SN1

C127100NFX5R-0402SMT C127100NFX5R-0402SMT

C131100NFX5R-0402SMT C131100NFX5R-0402SMT

C120

100NF-0603SMT

C120

100NF-0603SMT

FB2

BLM41PG600SN1

FB2

BLM41PG600SN1

C130100NFX5R-0402SMT C130100NFX5R-0402SMT

C121

10NF-0603SMT

C121

10NF-0603SMT

FB5

BLM41PG600SN1

FB5

BLM41PG600SN1

C112

100NF-0603SMT

C112

100NF-0603SMT

CN2

PCI Express x1 Edge Finger Conn.

CN2

PCI Express x1 Edge Finger Conn.

PRSNT1#

+12V

GND

JTAG2

JTAG3

JTAG4

JTAG5

+3.3V

A10

PERST#

A11

GND

A12

REFCLK+

A13

REFCLK-

A14

GND

A15

PERp0

A16

PERn0

A17

GND

A18

+12V B1

+12V B2

RSVD_B3 B3

GND B4

SMCLK B5

SMDAT B6

GND B7

+3.3V B8

JTAG1 B9

3.3Vaux B10

WAKE# B11

RSVD_B12 B12

GND B13

PETp0 B14

PETn0 B15

GND B16

PRSNT3# B17

GND B18

C103

1UF-16V-0805SMT

C103

1UF-16V-0805SMT

TP14

TESTPOINT

TP14

TESTPOINT

C118

100NF-0603SMT

C118

100NF-0603SMT

C129100NFX5R-0402SMT C129100NFX5R-0402SMT

C124

100NF-0603SMT

C124

100NF-0603SMT

C128100NFX5R-0402SMT C128100NFX5R-0402SMT

TP13

TESTPOINT

TP13

TESTPOINT

C102

22UF-16V_TANTBSMT

C102

22UF-16V_TANTBSMT

R58 OPEN-0603SMTR58 OPEN-0603SMT

C104

22UF-16V_TANTBSMT

C104

22UF-16V_TANTBSMT

C110

100NF-0603SMT

C110

100NF-0603SMT

C119

10NF-0603SMT

C119

10NF-0603SMT

C105

1UF-16V-0805SMT

C105

1UF-16V-0805SMT

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 26. DDR2 Memory

D D

A A

DDR2_CS0#

DDR2_CE0#

DDR2_ODT0

DDR2_DQS0 DDR2_15

DDR2_DQ1 DDR2_30

DDR2_DQ4 DDR2_33

DDR2_DQ6 DDR2_35

DDR2_DQ2 DDR2_31

DDR2_DQ0 DDR2_29

DDR2_DQ5 DDR2_34

DDR2_DQ7 DDR2_36

DDR2_DQ3 DDR2_32

DDR2_DQ8 DDR2_37

DDR2_DQ9 DDR2_38

DDR2_DQ14 DDR2_43

DDR2_DQ13 DDR2_42

DDR2_DQ11 DDR2_40

DDR2_DQ10 DDR2_39

DDR2_DQ15 DDR2_44

DDR2_DQ12 DDR2_41

DDR2_DQS1 DDR2_13

DDR2_DQS0# DDR2_14

DDR2_A5 DDR2_23

DDR2_A3 DDR2_25

DDR2_A0 DDR2_28

DDR2_A8 DDR2_20

DDR2_A4 DDR2_24

DDR2_A1 DDR2_27

DDR2_A7 DDR2_21

DDR2_A6 DDR2_22

DDR2_BA1

DDR2_BA0

DDR2_RAS#

DDR2_A2 DDR2_26

DDR2_A9 DDR2_19

DDR2_A10 DDR2_18

DDR2_WE#

DDR2_CAS#

DDR2_A12 DDR2_16

DDR2_A11 DDR2_17

DDR2_VREF

DDR2_A5

DDR2_A3

DDR2_A0

DDR2_A8

DDR2_A4

DDR2_A1

DDR2_A7

DDR2_A6

DDR2_A2

DDR2_A9

DDR2_A12

DDR2_A11

DDR2_A10

DDR2_A[0:12]

DDR2_DM0 DDR2_11

DDR2_DM1 DDR2_10

DDR2_DQS1# DDR2_12

DDR2_ODT0 DDR2_3

DDR2_RAS# DDR2_5

DDR2_WE# DDR2_6

DDR2_CS0# DDR2_2

DDR2_CE0# DDR2_7

DDR2_BA0 DDR2_1

DDR2_BA1 DDR2_0

DDR2_K# DDR2_8

DDR2_K DDR2_9

DDR2_CAS# DDR2_4

DDR2_K

DDR2_K#

DDR2_VDDQ

DDR2_VDD

1_8V

VDDL

DDR2_VDD

DDR2_VDDQ

1_8V

3_3V

DDR2_VTT

1_8V

DDR2_[0:44] [8]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

DDR2 Memory

79Thursday, March 26, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

DDR2 Memory

79Thursday, March 26, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

DDR2 Memory

79Thursday, March 26, 2009

VTT

needs to be matched length

for all traces

U1 Pin

MEMORY DEVICE

X2 Termination

at end of line

ALL Memory controller

buses, clocks, and control

traces must be 50 Ohm

Transmission lines

PLACE CLOSE TO U14

C169

10NF-0603SMT

C169

10NF-0603SMT

SP2SP2

C137

1UF-16V-0805SMT

C137

1UF-16V-0805SMT

R1R1

R1=50 Ohm

RP1

CTS-R2402B7

R1R1

R1=50 Ohm

RP1

CTS-R2402B7

A2 A2

B2 B2

C2 C2

D2 D2

E2 E2

F2 F2

G2 G2

H2 H2

J2 J2

A1 A1

B1 B1

C1 C1

D1 D1

E1 E1

F1 F1

G1 G1

H1 H1

J1 J1

C177

100NF-0603SMT

C177

100NF-0603SMT

FB7

BLM41PG600SN1

FB7

BLM41PG600SN1

C172

10NF-0603SMT

C172

10NF-0603SMT

R62

1K_ADJ/SMT3MM

R62

1K_ADJ/SMT3MM

C167

1UF-16V-0805SMT

C167

1UF-16V-0805SMT

C152

22UF-16V-TANTBSMT

C152

22UF-16V-TANTBSMT

C155

10NF-0603SMT

C155

10NF-0603SMT

SP1SP1

C149

10NF-0603SMT

C149

10NF-0603SMT

C150

10NF-0603SMT

C150

10NF-0603SMT

C141

1UF-16V-0805SMT

C141

1UF-16V-0805SMT

R224

50R-0402SMT

R224

50R-0402SMT

C176

10NF-0603SMT

C176

10NF-0603SMT

C148

10NF-0603SMT

C148

10NF-0603SMT

PP2PP2

U14A

DDR2-SDRAM-84FBGA

U14A

DDR2-SDRAM-84FBGA

NC_A2 A2

DQ14 B1

DQ15 B9

DQ9 C2

DQ8 C8

DQ12 D1

DQ11 D3

DQ10 D7

DQ13 D9

DQ6 F1

DQ7 F9

DQ1 G2

DQ0 G8

DQ4 H1

DQ3 H3

DQ2 H7

DQ5 H9

NC_E2 E2

LDQS#/NU E8

LDM F3

LDQS F7

CK J8

CK# K8

CKE K2

WE# K3

RAS# K7

ODT K9

BA0 L2

BA1 L3

CAS# L7

CS# L8

RFU_L1 L1

A0 M8

A1 M3

A2 M7

A3 N2

A4 N8

A5 N3

A6 N7

A7 P2

A8 P8

A9 P3

A10 M2

A11 P7

A12 R2

RFU_R3 R3

RFU_R7 R7

NC_R8 R8

UDM B3

UDQS B7

UDQS#/NU A8

C163

10NF-0603SMT

C163

10NF-0603SMT

C178

10NF-0603SMT

C178

10NF-0603SMT

C147

100NF-0603SMT

C147

100NF-0603SMT

PP1PP1

C164

10NF-0603SMT

C164

10NF-0603SMT

C139

100NF-0603SMT

C139

100NF-0603SMT

C146

10NF-0603SMT

C146

10NF-0603SMT

C145

100NF-0603SMT

C145

100NF-0603SMT

C151

100NF-0603SMT

C151

100NF-0603SMT

R66

1K-0603SMT

R66

1K-0603SMT

C165

100NF-0603SMT

C165

100NF-0603SMT

C174

10NF-0603SMT

C174

10NF-0603SMT

C157

100NF-0603SMT

C157

100NF-0603SMT

FB6

BLM41PG600SN1

FB6

BLM41PG600SN1

U14B

DDR2-SDRAM-84FBGA

U14B

DDR2-SDRAM-84FBGA

VDD

VSS

VDDQ

VSSQ

VDDL

J1 VREF

VSSDL

C153

22UF-16V-TANTBSMT

C153

22UF-16V-TANTBSMT

C142

10UF-16V-TANTBSMT

C142

10UF-16V-TANTBSMT

FB8

BLM41PG600SN1

FB8

BLM41PG600SN1

C168

100NF-0603SMT

C168

100NF-0603SMT

R61

1K-0603SMT

R61

1K-0603SMT

R1R1

R1=50 Ohm

RP2

CTS-RT2402B7

R1R1

R1=50 Ohm

RP2

CTS-RT2402B7

A2 A2

B2 B2

C2 C2

D2 D2

E2 E2

F2 F2

G2 G2

H2 H2

J2 J2

A1 A1

B1 B1

C1 C1

D1 D1

E1 E1

F1 F1

G1 G1

H1 H1

J1 J1

C181

100NF-0603SMT

C181

100NF-0603SMT

C166

22UF-16V-TANTBSMT

C166

22UF-16V-TANTBSMT

C170

10NF-0603SMT

C170

10NF-0603SMT

SP3SP3

C154

1UF-16V-0805SMT

C154

1UF-16V-0805SMT

C140

100UF-FKSMT

C140

100UF-FKSMT

C180

10NF-0603SMT

C180

10NF-0603SMT

C144

1UF-16V-0805SMT

C144

1UF-16V-0805SMT

C220

10NF-0402SMT

C220

10NF-0402SMT

R63

OPEN-0603SMT

R63

OPEN-0603SMT

U13

LP2998-SO8

U13

LP2998-SO8

GND

VSENSE 3

VREF

VDDQ

AVIN 6

PVIN 7

VTT 8

C179

100NF-0603SMT

C179

100NF-0603SMT

C171

100NF-0603SMT

C171

100NF-0603SMT

R64

0R-0603SMT

R64

0R-0603SMT

C159

100NF-0603SMT

C159

100NF-0603SMT

C156

10NF-0603SMT

C156

10NF-0603SMT

C162

10NF-0603SMT

C162

10NF-0603SMT

R223

50R-0402SMT

R223

50R-0402SMT

C138

47UF-10V-TANTBSMT

C138

47UF-10V-TANTBSMT

C175

100NF-0603SMT

C175

100NF-0603SMT

C160

100NF-0603SMT

C160

100NF-0603SMT

C143

100NF-0603SMT

C143

100NF-0603SMT

C173

100NF-0603SMT

C173

100NF-0603SMT

C161

10NF-0603SMT

C161

10NF-0603SMT

C136

100NF-0603SMT

C136

100NF-0603SMT

SP4SP4

C158

100NF-0603SMT

C158

100NF-0603SMT

R60

4_7K-0603SMT

R60

4_7K-0603SMT

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 27. FPGA Test

D D

A A

DDR2_DQS0 DDR2_15

DDR2_DQ1 DDR2_30

DDR2_DQ4 DDR2_33

DDR2_DQ6 DDR2_35

DDR2_DQ2 DDR2_31

DDR2_DQ0 DDR2_29

DDR2_DQ5 DDR2_34

DDR2_DQ7 DDR2_36

DDR2_DQ3 DDR2_32

DDR2_DQ8 DDR2_37

DDR2_DQ9 DDR2_38

DDR2_DQ14 DDR2_43

DDR2_DQ13 DDR2_42

DDR2_DQ11 DDR2_40

DDR2_DQ10 DDR2_39

DDR2_DQ15 DDR2_44

DDR2_DQ12 DDR2_41

DDR2_DQS1 DDR2_13

DDR2_DQS0# DDR2_14

DDR2_A5 DDR2_23

DDR2_A3 DDR2_25

DDR2_A0 DDR2_28

DDR2_A8 DDR2_20

DDR2_A4 DDR2_24

DDR2_A1 DDR2_27

DDR2_A7 DDR2_21

DDR2_A6 DDR2_22

DDR2_A2 DDR2_26

DDR2_A9 DDR2_19

DDR2_A10 DDR2_18

DDR2_A12 DDR2_16

DDR2_A11 DDR2_17

DDR2_DM0 DDR2_11

DDR2_DM1 DDR2_10

DDR2_DQS1# DDR2_12

DDR2_ODT0 DDR2_3

DDR2_RAS# DDR2_5

DDR2_WE# DDR2_6

DDR2_CS0# DDR2_2

DDR2_CE0# DDR2_7

DDR2_BA0 DDR2_1

DDR2_BA1 DDR2_0

DDR2_K# DDR2_8

DDR2_K DDR2_9

DDR2_CAS# DDR2_4

SEG8

SEG2

SEG11

SEG14

SEG7

SEG4

SEG10

SEG13

SEG15

SEG6

SEG16

SEG9

SEG3

SEG12

SEG0

SEG1

SEG5

SWITCH5

SWITCH6

SWITCH7

SWITCH8

SWITCH3

SWITCH2

SWITCH4

SWITCH1

LA18

LA19

LA20

LA21

LA34

LA22

LA23

LA24

LA25

LA26

LA27

LA28

LA29

LA30

LA31

LA32

LA33

LA1

LA2

LA3

LA4

LA5

LA6

LA7

LA8

LA9

LA10

LA11

LA12

LA13

LA14

LA15

LA16

LA17

FPGA_0

FPGA_1

FPGA_2

FPGA_3

FPGA_4

FPGA_5

FPGA_6

FPGA_7

FPGA_8

FPGA_9

FPGA_10

FPGA_11

FPGA_12

FPGA_13

FPGA_14

FPGA_15

LED0

LED1

LED3

LED2

LED5

LED7

LED6

LED4

LED9

LED11

LED10

LED8

LED13

LED15

LED14

LED12

TP_3

TP_4

TP_5

TP_6

TP_7

TP_14

TP_2

TP_15

TP_1

TP_0

TP_9

TP_10

TP_11

TP_13

TP_12

TP_8

OSC_IN_1

OSC_IN_2

OSC_IN_3

VREF1_6

DDR2_ODT0

DDR2_DQS1

DDR2_DM0

DDR2_DM1

DDR2_DQS1#

DDR2_A5

DDR2_A3

DDR2_A0

DDR2_A4

DDR2_A2

DDR2_RAS#

DDR2_CS0#

DDR2_CE0#

DDR2_BA0

DDR2_BA1

DDR2_CAS#

DDR2_A8

DDR2_A7

DDR2_A6

DDR2_A9

DDR2_A10

DDR2_WE#

DDR2_K#

DDR2_K

DDR2_DQ9

DDR2_DQ8

DDR2_DQ14

DDR2_DQ13

DDR2_DQ11

DDR2_DQ15

DDR2_DQ12

DDR2_DQS0

DDR2_DQ1

DDR2_DQ4

DDR2_DQ6

DDR2_DQ2

DDR2_DQ0

DDR2_DQ5

DDR2_DQ7

DDR2_DQ3

DDR2_DQ10

DDR2_DQS0#

OSC_IN_3

DDR2_A12

DDR2_A11

DDR2_A1

DDR2_OSC_CLKN

DDR2_OSC_CLKP

DDR2_OSC_CLKN

DDR2_OSC_CLKP

1_8V

DDR2_VTT

3_3V

1_8V

3_3V

DDR2_VTT

DDR2_[0:44] [7]

SEG[0:16] [9]

SWITCH[1:8] [9]

x1_PRSNTn [6]

x4_PRSNTn [6]

LA[1:34] [9]

FPGA_[0:15] [5]

LED[0:15] [9]

TP_[0:15] [9]

OSC_IN_[1:3] [9]

FPGA_SMA_REFCLKP [9]

FPGA_SMA_REFCLKN [9]

PCIE_PERSTN [6]

GSRN [6]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA

89Monday, April 06, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA

89Monday, April 06, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA

89Monday, April 06, 2009

These pins are connected

to the XO CPLD.

PLACE CLOSE TO U1

R228

50R-0402SMT

R228

50R-0402SMT

ECP3-672fpBGA

U1C

ECP3-672fpBGA

U1C

PR19A J23

PR19B H23

PR20A G26

PR20B F26

PR22A F24

PR22B G24

PR23A H26

PR23B H25

PR25A K23

PR25B K22

PR25E_A F25

PR25E_B E26

PR25E_C L21

PR25E_D L22

PR26A H24

PR26B G25

PR28A L20

PR28B M21

PR29A K24

PR29B J24

PR31A M23

PR31B M24

PR32A L24

PR32B K25

PR34A/VREF1_2 M22

PR34B/VREF2_2 N21

PR35A J26

PR35B K26

PR37A/RUM0_GDLLT_IN_A N23

PR37B/RUM0_GDLLT_IN_B N22

PR38A/RUM0_GDLLT_FB_A K19

PR38B/RUM0_GDLLT_FB_B L19

PR40A P23

PR40B R22

PR41A L25

PR41B L26

PR43A/PCLKT 2_0 P21

PR43B/PCLKC2_0 P22

PR43E_A/RUM2_GPLLT_FB_A M25

PR43E_B/RUM2_GPLLT_FB_B M26

PR43E_C/RUM2_GPLL_IN_A T21

PR43E_D/RUM2_GPLLT_IN_B R21

VCCIO2 K18

VCCIO2 M19

VCCIO2 N18

VCCIO2 N19

VTT2 N20

ECP3-672fpBGA

U1E

ECP3-672fpBGA

U1E

PL44A/LDQ49 P1

PL44B/LDQ49 P2

PL46A/PCLKT6_0/LDQ49 N5

PL46B/PCLKC6_0/LDQ49 N6

PL47A/LDQ49 R1

PL47B/LDQ49 R2

PL49A/LDQS49 N3

PL49B/LDQS49# P3

PL50A/LDQ49 T2

PL50B/LDQ49 U3

PL52A/VREF1_6/LDQ49 P5

PL52B/VREF_2_6/LDQ49 P6

PL53A/LDQ58 P4

PL53B/LDQ58 R3

PL55A/LDQ58 R5

PL55B/LDQ58 R6

PL56A/LDQ58 T1

PL56B/LDQ58 U1

PL58A/LDQS58 T3

PL58B/LDQS58# R4

PL59A/LDQ58 V1

PL59B/LDQ58 U2

PL61A/LDQ58 T7

PL61B/LDQ58 T8

PL61E_A/LLM1_GPLLT_FB_A W1

PL61E_B/LLM1_GPLLT_FB_B W2

PL61E_C/LLM1_GPLLT_IN_A U4

PL61E_D/LLM1_GPLLT_IN_B V5

PL62A/LDQ67 Y3

PL62B/LDQ67 W3

PL64A/LDQ67 T5

PL64B/LDQ67 T6

PL65A/LDQ67 V3

PL65B/LDQ67 V4

PL70E_A/LLM2_GPLLT_FB_A W4

PL70E_B/LLM2_GPLLT_FB_B W5

PL70E_C/LLM2_GPLLT_IN_A U6

PL70E_D/LLM2_GPLLT_IN_B U5

PL79E_A/LLM3_GPLLT_FB_A Y1

PL79E_B/LLM3_GPLLT_FB_B Y2

PL79E_C/LLM3_GPLLT_IN_A U7

PL79E_D/LLM3_GPLLT_IN_A U8

PL80A/LDQ85 AA1

PL80B/LDQ85 AA2

PL82A/LDS85 V6

PL82B/LDQ85 V7

PL83A/LDQ85 AB1

PL83B/LDQ85 AC1

PL85A/LDQS85 W7

PL85B/LDQS85# W6

PL86A/LDQ85 AC2

PL86B/LDQ85 AC3

PL88A/LDQ85 Y5

PL88B/LDQ85 AA5

PL89A/LDQ94 AA3

PL89B/LDQ94 AA4

PL91A/LDQ94 AB5

PL91B/LDQ94 AB6

PL92A/LDQ94 AB3

PL92B/LDQ94 AB4

PL94A/LDQS94 Y6

PL94B/LDQS94# Y7

PL95A/LDQ94 AD1

PL95B/LDQ94 AD2

PL97A/LDQ94 W8

PL97B/LDQ94 W9

PB2A AD4

PB2B AE3

PB4A AA7

PB4B AB7

PB5A AD3

PB5B AC4

PB8A AE2

PB8B AF3

PB10A Y8

PB11A AE4

PB11B AF4

PB13A V10

PB13B W10

VCCIO6 P8

VCCIO6 P9

VCCIO6 R8

VCCIO6 U9

VTT6 P7

R73

0R-0603SMT

R73

0R-0603SMT

ECP3-672fpBGA

U1A

ECP3-672fpBGA

U1A

PT2A B6

PT2B C7

PT4A D5

PT4B C4

PT5A D6

PT5B C6

PT7A C5

PT7B B4

PT8A D8

PT8B C8

PT10A G7

PT10B H8

PT11A A3

PT11B A4

PT13A F7

PT13B F8

PT14A B7

PT14B A7

PT16A E8

PT16B E9

PT17A A5

PT17B A6

PT19A G8

PT19B F9

PT38A D9

PT38B D10

PT40A F10

PT40B E10

PT41A A8

PT41B B8

PT43A G10

PT43B G9

PT44A C9

PT44B C10

PT46A H10

PT46B H11

PT56A A9

PT56B B10

PT58A F11

PT58B G11

PT59A A10

PT59B A11

PT61A D12

PT61B C11

PT62A B11

PT62B B12

PT64A E11

PT64B E12

PT65A A12

PT65B B13

PT67A C12

PT67B C13

PT68A A13

PT68B A14

PT70A F12

PT70B G13

PT71A A15

PT71B A16

PT73A E13

PT73B D13

VCCIO0 H12

VCCIO0 H13

VCCIO0 J10

VCCIO0 J13

R74

1K-0603SMT

R74

1K-0603SMT

ECP3-672fpBGA

U1B

ECP3-672fpBGA

U1B

PT74A C15

PT74B B15

PT76A C14

PT76B D14

PT77A B16

PT77B C16

PT79A F13

PT79B F14

PT80A A17

PT80B A18

PT82A B17

PT82B C17

PT83A A19

PT83B A20

PT85A E14

PT85B E15

PT86A A21

PT86B B20

PT88A G14

PT88B F15

PT89A C20

PT89B B19

PT91A D15

PT91B E16

PT101A E17

PT101B F18

PT103A G16

PT103B F16

PT104A C19

PT104B D19

PT106A H16

PT106B H17

PT107A C18

PT107B D18

PT109A F17

PT109B G17

PT128A E19

PT128B E20

PT130A E18

PT130B D17

PT131A B21

PT131B A22

PT133A F19

PT133B F20

PT134A C22

PT134B C21

PT136A/VREF1_1 G18

PT136B/VREF2_1 G19

VCCIO1 H14

VCCIO1 H15

VCCIO1 J14

VCCIO1 J17

R72

1K_ADJ/SMT3MM

R72

1K_ADJ/SMT3MM

R70

4_7K-0603SMT

R70

4_7K-0603SMT

C224

100NF-0603SMT

C224

100NF-0603SMT

R68

1K-0603SMT

R68

1K-0603SMT

C223

10UF-16V-TANTBSMT

C223

10UF-16V-TANTBSMT

ECP3-672fpBGA

U1F

ECP3-672fpBGA

U1F

PL8A B2

PL8B B3

PL10A D4

PL10B E4

PL11A C3

PL11B D3

PL13A G5

PL13B G6

PL14A E3

PL14B F4

PL16A H6

PL16B J6

PL17A C2

PL17B D2

PL19A K8

PL19B J7

PL20A F2

PL20B F3

PL22A K7

PL22B K6

PL23A G2

PL23B G3

PL25A H5

PL25B J5

PL25E_A/LUM2_GPLLT_FB_A H4

PL25E_B/LUM2_GPLLT_FB_B H3

PL25E_C/LUM2_GPLLT_IN_A L8

PL25E_D/LUM2_GPLLT_IN_B L7

PL26A K2

PL26B K1

PL28A J4

PL28B J3

PL29A D1

PL29B C1

PL31A K4

PL31B K5

PL32A E1

PL32B F1

PL34A/VREF1_7 L5

PL34B/VREF2_7 L6

PL35A H2

PL35B G1

PL37A/LUM0_GDLLT_IN_A K3

PL37B/LUM0_GDLLT_IN_B L3

PL38A/LUM0_GDLLT_FB_A H1

PL38B/LUM0_GDLLT_FB_B J1

PL40A M5

PL40B M6

PL41A L2

PL41B L1

PL43A/PCLKT7_0 M4

PL43B/PCLKC7_0 N4

PL43E_A/LUM0_GPLLT_FB_A M1

PL43E_B/LUM0_GPLLT_FB_B N1

PL43E_C/LUM0_GPLLT_IN_A M3

PL43E_D/LUM0_GPLLT_IN_B M2

VCCIO7 K9

VCCIO7 M8

VCCIO7 N8

VCCIO7 N9

VTT7 N7

C222

100NF-0603SMT

C222

100NF-0603SMT

R71

4_7K-0603SMT

R71

4_7K-0603SMT

R222

50R-0603SMT

R222

50R-0603SMT

R227

1_6R-0603SMT

R227

1_6R-0603SMT

R69

4_7K-0603SMT

R69

4_7K-0603SMT

C225

10NF-0402SMT

C225

10NF-0402SMT

CRYSTEK-133MHZ

Q_N 5

VCC 6

GND

DIS#

R67

0R-0603SMT

R67

0R-0603SMT

R75

0R-0603SMT

R75

0R-0603SMT

R229

50R-0402SMT

R229

50R-0402SMT

C182

10NF-0603SMT

C182

10NF-0603SMT

ECP3-672fpBGA

U1D

ECP3-672fpBGA

U1D

PR44A N24

PR44B N25

PR46A/PCLKT 3_0 U20

PR46B/PCLKC3_0 U19

PR47A P24

PR47B R24

PR49A R23

PR49B T22

PR50A N26

PR50B P26

PR52A/VREF1_3 T20

PR52B/VREF2_3 U21

PR53A R25

PR53B R26

PR55A U24

PR55B V24

PR56A T25

PR56B T24

PR58A V21

PR58B V22

PR59A T26

PR59B U26

PR61A U23

PR61B U22

PR61E_A/RLM1_GPLLT_FB_A U25

PR61E_B/RLM1_GPLLT_FB_B V26

PR61E_C/RLM1_GPLLT_IN_A V20

PR61E_D/RLM1_GPLLT_IN_B W19

PR70E_A/RLM2_GPLLT_FB_A W26

PR70E_B/RLM2_GPLLT_FB_B W25

PR70E_C/RLM2_GPLLT_IN_A Y26

PR70E_D/RLM2_GPLLT_IN_B Y25

PR79E_A/RLM3_GPLLT_FB_A V23

PR79E_B/RLM3_GPLLT_FB_B W24

PR79E_C/RLM3_GPLLT_IN_A V17

PR79E_D/RLM3_GPLLT_IN_B W18

PR80A AA25

PR80B Y24

PR82A W23

PR82B W22

PR83A AA26

PR83B AB26

PR85A W21

PR85B W20

PR86A AD26

PR86B AD25

PR88A AA24

PR88B AA23

PR89A AC26

PR89B AC25

PR91A Y19

PR91B Y20

PR92A AB24

PR92B AC24

PR94A Y22

PR94B AA22

PR95A AE25

PR95B AF24

PR97A AD24

PR97B AE24

PB137A AD23

PB137B AC23

PB139A AB20

PB139B AB21

PB140A AF23

PB140B AE23

PB142A W17

PB143A AB23

PB143B AB22

PB145A Y21

PB145B AA20

VCCIO3 P18

VCCIO3 P19

VCCIO3 R19

VCCIO3 U18

VTT3 P20

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Figure 28. VSS/Decoupling

D D

A A

SEG0

SEG1

LA27

LA33

LA31

LA25

LA29

LA17

LA13

LA23

LA21

LA5

LA15

LA11

LA7

LA19

LA3

LA1

LA9

LA34

LA32

LA22

LA26

LA16

LA30

LA14

LA20

LA12

LA28

LA24

LA10

LA6

LA8

LA4

LA2

LA18

FLASH_CLK

OSC_IN_2

OSC_IN_3

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

TP_8

TP_3

TP_4

TP_5

TP_6

TP_7

TP_2

TP_1

TP_0

TP_9

TP_10

TP_11

TP_13

TP_12

TP_14

TP_15

SEG16

USR0_PU

SWITCH5

SWITCH6

SWITCH7

SWITCH8

SWITCH3

SWITCH2

SWITCH4

SWITCH1

PLL_LK_PU

USR1_PU

X4_USR0 LED12

POLL_PU

X4_USR1LED15

X4_POLL LED4

X4_USR2LED11

SWITCH5

SWITCH6

L0_PU

SWITCH7

SWITCH8

SWITCH3

SWITCH2

SWITCH4

SWITCH1

USR3_PU

X4_PLL_LKLED7

X4_L0LED3

PLL_LK_PU

USR0_PU

USR1_PU

DL_UP_PU

L0_PU

USR3_PU

USR2_PU

POLL_PU

X1_POLL LED6

X1_PLL_LKLED5

X1_DL_UP LED2

X1_L0LED1

X1_USR0 LED14

X1_USR1LED13

DL_UP_PU

X1_USR3 LED10

X1_USR2LED9

USR2_PU

X4_USR3 LED8

LED0

OSC_IN_1

3_3V

FLASH_CLK[5]

FPGA_SMA_REFCLKP[8]

FPGA_SMA_REFCLKN[8]

SWITCH[1:8] [8]

LA[1:34] [8]

SEG[0:16] [8]

LED[0:15] [8]

OSC_IN_[1:3] [8]

TP_[0:15] [8]

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA TEST

99Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA TEST

99Monday, February 23, 2009

Title

Size Project Rev

Date: Sheet of

1605 Valley Center Parkway

Bethlehem, PA 18017

ECP3 PCIe DevKit Eval Board

1.0

FPGA TEST

99Monday, February 23, 2009

SEGMENT BGA

A B7

B F8

C F7

D A4

E A3

F H8

G G7

H C8

K D8

M B4

N C5

P C6

R D6

S C4

T D5

U C7

DP B6

LOGIC ANALYZER PROBE

100MHZ GENERAL PURPOSE CLOCKS

16-SEGMENT DISPLAY

PLACE CLOSE TO U1

Connected to SMA inputs

DIP SWITCH LEDs

PLL LOCK STATUSPOLLING STATUS

L0DL UP

LED USER 3 LED USER 2

LED USER 1LED USER 0

SWITCH BGA

1 D9

2 F9

3 G8

4 A6

5 A5

6 E9

7 E8

8 A7

LED BGA

0 D10

1 F10

2 E10

3 A8

4 B8

5 G10

6 G9

7 C9

8 C10

9 H10

10 H11

11 A9

12 B10

13 F11

14 G11

15 A10

RN4HRN4H

8 9

RN5F

EXB2HV471JV

470R RN5F

EXB2HV471JV

470R

611

RN2G

EXB2HV472JV

4_7K RN2G

EXB2HV472JV

4_7K

710

D24

LED-SMT1206_BLUE

D24

LED-SMT1206_BLUE

ABCDEFGH KMNPR STU

D23

LTP-587HR/16-SEGMENT

ABCDEFGH KMNPR STU

D23

LTP-587HR/16-SEGMENT

RN2C

EXB2HV472JV

4_7K RN2C

EXB2HV472JV

4_7K

314

RN4ARN4A

116

RN3CRN3C

314

RN5G

EXB2HV471JV

470R RN5G

EXB2HV471JV

470R

710

RN2H

EXB2HV472JV

4_7K RN2H

EXB2HV472JV

4_7K

RN2B

EXB2HV472JV

4_7K RN2B

EXB2HV472JV

4_7K

215

RN4C

EXB2HV151JV

150R

RN4C

EXB2HV151JV

150R

314

RN4BRN4B

215

R80

OPEN-0603SMT

R80

OPEN-0603SMT

D25

LED-SMT1206_BLUE

D25

LED-SMT1206_BLUE

D11

LED-SMT1206_GREEN

D11

LED-SMT1206_GREEN

RN2D

EXB2HV472JV

4_7K RN2D

EXB2HV472JV

4_7K

413

RN3DRN3D

413

SMA

1 2

CTS-CB3LV-3C-100.00MHZ

N/C 1

GND 2

OUT

Vcc

RN5H

EXB2HV471JV

470R RN5H

EXB2HV471JV

470R

8 9

D20

LED-SMT1206_RED

D20

LED-SMT1206_RED

C187

100NF-0603SMT

C187

100NF-0603SMT

D26

LED-SMT1206_BLUE

D26

LED-SMT1206_BLUE

RN3A

EXB2HV151JV

150R

RN3A

EXB2HV151JV

150R

116

RN4DRN4D

413

RN5A

EXB2HV471JV

470R RN5A

EXB2HV471JV

470R

116

D13

LED-SMT1206_GREEN

D13

LED-SMT1206_GREEN

RN3ERN3E

512

C183

100NF-0603SMT

C183

100NF-0603SMT

D15

LED-SMT1206_YELLOW

D15

LED-SMT1206_YELLOW

RN5C

EXB2HV471JV

470R RN5C

EXB2HV471JV

470R

314

RN4ERN4E

512

R76

150R-0603SMT

R76

150R-0603SMT

SW5

SW DIP-8/SM

SW5

SW DIP-8/SM

RN3FRN3F

611

RN5B

EXB2HV471JV

470R RN5B

EXB2HV471JV

470R

215

C186

100NF-0603SMT

C186

100NF-0603SMT

D17

LED-SMT1206_YELLOW

D17

LED-SMT1206_YELLOW

D16

LED-SMT1206_YELLOW

D16

LED-SMT1206_YELLOW

R78

51R-0603SMT

R78

51R-0603SMT

C184

100NF-0603SMT

C184

100NF-0603SMT

D12

LED-SMT1206_GREEN

D12

LED-SMT1206_GREEN

RN4FRN4F

611

R79

OPEN-0603SMT

R79

OPEN-0603SMT

RN5D

EXB2HV471JV

470R RN5D

EXB2HV471JV

470R

413

RN3GRN3G

710

R77

51R-0603SMT

R77

51R-0603SMT

D22

LED-SMT1206_RED

D22

LED-SMT1206_RED

D19

LED-SMT1206_RED

D19

LED-SMT1206_RED

SMA

RN2E

EXB2HV472JV

4_7K RN2E

EXB2HV472JV

4_7K

512

C185

10NF-0603SMT

C185

10NF-0603SMT

RN4GRN4G

710

D14

LED-SMT1206_GREEN

D14

LED-SMT1206_GREEN

LA1

2-5767004-2

LA1

2-5767004-2

1SCL 2

GND

3SDA 4

CLK1

5CLK 6

788

910 10

11 12 12

13 14 14

15 16 16

17 18 18

19 20 20

21 22 22

23 24 24

25 26 26

27 28 28

29 30 30

31 32 32

33 34 34

35 36 36

37 38 38

D27

LED-SMT1206_BLUE

D27

LED-SMT1206_BLUE

D21

LED-SMT1206_RED

D21

LED-SMT1206_RED

RN3HRN3H

8 9

RN2F

EXB2HV472JV

4_7K RN2F

EXB2HV472JV

4_7K

611

HEADER 9X2

RN5E

EXB2HV471JV

470R RN5E

EXB2HV471JV

470R

512

RN3BRN3B

215

RN2A

EXB2HV472JV

4_7K RN2A

EXB2HV472JV

4_7K

116

D18

LED-SMT1206_YELLOW

D18

LED-SMT1206_YELLOW

U15

CY2304-1

U15

CY2304-1

REF

CLKA1

CLKA2

GND

4CLKB1 5

CLKB2 6

VDD 7

FBK 8

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

Appendix B. Bill of Materials

Table 17. Bill of Materials

Item Quantity Reference Part Manufacturer Part Number Description

1 1 CN1 PCI Express x4 Edge Finger Conn. PCB Edge finger

2 1 CN2 PCI Express x1 Edge Finger Conn. PCB Edge finger

3 1 C1 470UF-FKSMT Panasonic EEV-FK1V471Q CAP 470UF 35V

ELECT FK SMD

4 2 C2, C140 100UF-FKSMT Panasonic EEEFK1V101XP CAP 100UF 35V

ELECT FK SMD

5 5 C3, C4, C7, C9, C142 10UF-16V-TANTBSMT AVX TAJB106K016R CAP 10UF 16V

TANT B-SIZE

6 4 C5, C6, C8, C10 330UF-FKSMT Panasonic EEEFK1C331P CAP 330UF 16V

ELECT FK SMD

730 C11, C12, C13, C14, C15, C16, C17,

C18, C36, C37, C38, C39, C40, C56,

C57, C58, C59, C60, C61, C62, C63,

C64, C65, C66, C67, C68, C83, C84,

C85, C86

1000PF-0402SMT Panasonic ECJ-0EB1E102K CAP 1000PF 25V

CERAMIC X7R

0402

854 C19, C20, C21, C22, C23, C24, C25,

C41, C43, C47, C49, C50, C51, C52,

C53, C54, C55, C70, C73, C76, C79,

C80, C88, C94, C96, C98, C100,

C111, C113, C115, C117, C119,

C121, C123, C125, C146, C148,

C149, C150, C155, C156, C161,

C162, C163, C164, C169, C170,

C172, C174, C176, C178, C180,

C182, C185

10NF-0603SMT Kemet C0603C103K5RACTU CAP .01UF 50V

CERAMIC X7R

0603

914 C26, C34, C48, C71, C77, C103,

C105, C107, C109, C137, C141,

C144, C154, C167

1UF-16V-0805SMT Panasonic ECJ-2FB1C105K CAP 1UF 16V

CERAMIC 0805

X5R

10 12 C27, C29, C44, C69, C81, C102,

C104, C106, C108, C152, C153,

C166

22UF-16V_TANTBSMT Kemet T491B226M016AT CAPACITOR TANT

22UF 16V 20%

SMD

11 54 C28, C30, C31, C32, C33, C35, C42,

C45, C46, C72, C74, C75, C78, C82,

C87, C89, C90, C91, C92, C93, C95,

C97, C99, C101, C110, C112, C114,

C116, C118, C120, C122, C124,

C136, C139, C143, C145, C147,

C151, C157, C158, C159, C160,

C165, C168, C171, C173, C175,

C177, C179, C181, C183, C184,

C186, C187

100NF-0603SMT Panasonic ECJ-1VF1C104Z CAP .1UF 16V

CERAMIC Y5V

0603

12 10 C126, C127, C128, C129, C130,

C131, C132, C133, C134, C135

100NFX5R-0402SMT Kemet C0402C104K8PACTU CAP .10UF 10V

CERAMIC X5R

0402

13 1C138 47UF-10V-TANTBSMT Kemet T491B476M010AT CAPACITOR TANT

47UF 10V 20%

SMD

14 11 D1, D2, D3, D4, D5, D9, D10, D11,

D12, D13, D14

LED-SMT1206_GREEN Panasonic LNJ316C83RA LED GREEN (UP)

W/LENS 1206

15 7D6, D7, D8, D19, D20, D21, D22 LED-SMT1206_RED Panasonic LNJ211R82RA LED RED (UP)

W/LENS 1206

16 4D15, D16, D17, D18 LED-SMT1206_YELLOW Panasonic LNJ411K84RA LED YELLOW (UP)

W/LENS 1206

17 1D23 LTP-587HR/16-SEGMENT Lite-On LTP-587HR 16-segment array

18 4D24, D25, D26, D27 LED-SMT1206_BLUE Panasonic LNJ916C8BRA LED BLUE (UP)

W/LENS 1206

19 8FB1, FB2, FB3, FB4, FB5, FB6, FB7,

FB8

BLM41PG600SN1 Murata BLM41PG600SN1L FERRITE CHIP 60

OHM 6000MA 1806

20 5F1, F2, F3, F4, F5 F1228CT-ND Littlefuse 0154005.DR FUSEBLOCK WITH

5A FUSE SMD

21 1 J1 22HP037-2.1mm Condor 22HP037-2.1mm power input

22 1 J2 HEADER 2X2 Samtec TSW-102-07-T-D 2x2-0.25 Header

23 1 J3 HEADER 2 Samtec TSW-102-07-T-S 2x1-0.25 Header

24 2J4, J8 HEADER 6 Samtec TSM-106-01-T-SH 6x1-0.25 Header-

SMT

25 1 J5 HEADER 9X2 Samtec TSW-109-07-T-D 9x2-0.25 Header

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

26 2J6, J7 SMA Molex 73391-0060 CONN JACK SMA

STR 50 OHM PCB

27 1LA1 2_5767004-2 Amp 2_5767004-2 CONN RECEPT

38POS .025 VERT

SMD

28 5LP1, LP2, LP3, LP4, LP5 5016 Keystone Electronics 5016 TEST POINT PC

COMPACT SMT

29 3MH1, MH2, MH3 M HOLE2

30 2PP1, PP2 PROBEPOINT

31 4Q1, Q2, Q3, Q4 2N2222/SOT23 Diodes Inc. MMBT2222A-7-F TRANS NPN 40V

350MW SMD SOT-

32 1RN1 EXBV8V472JV Panasonic EXBV8V472JV RES ARRAY 4.7K

OHM 5% 4 RES

SMD

33 1RN2 EXB2HV472JV Panasonic EXB2HV472JV RES ARRAY 4.7K

OHM 5% 8 RES

SMD

34 2RN3, RN4 EXB2HV151JV Panasonic EXB2HV151JV RES ARRAY 150

OHM 5% 8 RES

SMD

35 1RN5 EXB2HV471JV Panasonic EXB2HV471JV RES ARRAY 470

OHM 5% 8 RES

SMD

36 2RP1, RP2 CTS-R2402B7 CTS Corporation Resistor/

Electrocomponents

CTS-R2402B7TR7 RES NET DDR

SDRAM 50 OHM

3X9 BGA

37 4R1, R2, R3, R4 1_8K-1206SMT Panasonic ERJ-8GEYJ182V RES 1.8K OHM

1/4W 5% 1206 SMD

38 1R76 150R-0603SMT Panasonic ERA-3YEB151V RES 150 OHM

1/16W .1% 0603

SMD

39 23 R6, R7, R8, R21, R22, R27, R28,

R29, R30, R31, R32

10K-0603SMT Panasonic ERJ-3GEYJ103V RES 10K OHM

1/10W 5% 0603

SMD

R33, R34, R35, R36, R37, R38, R39,

R45, R46, R48, R49, R54

40 7R9, R10, R53, R64, R67, R73, R75 0R-0603SMT Panasonic ERJ-3GEY0R00V RES ZERO OHM

1/10W 5% 0603

SMD

41 2R11, R12 OPEN-0805SMT

42 1R13 12_1K-0603SMT Susumu Co Ltd. RG1608P-1212-B-T5 RES 12.1K OHM

1/10W .1% 0603

SMD

43 2R14, R20 2K-0603SMT Panasonic ERJ-3EKF2001V RES 2.00K OHM

1/10W 1% 0603

SMD

44 2R15, R16 100R-0805SMT Panasonic ERJ-6GEYJ101V RES 100 OHM

1/8W 5% 0805 SMD

45 8R17, R19, R56, R57, R61, R66, R68,

R74

1K-0603SMT Panasonic ERJ-3EKF1001V RES 1.00K OHM

1/16W 1% 0603

SMD

46 1R18 806R-0603SMT Panasonic ERJ-3EKF8060V RES 806 OHM

1/10W 1% 0603

SMD

47 3R23, R24, R25 680R-0603SMT Panasonic ERJ-3GEYJ681V RES 680 OHM

1/10W 5% 0603

SMD

48 3R5, R26, R47 220R-0603SMT Panasonic ERJ-3GEYJ221V RES 220 OHM

1/10W 5% 0603

SMD

49 7R40, R43, R44, R60, R69, R70, R71 4_7K-0603SMT Panasonic ERJ-3GEYJ472V RES 4.7K OHM

1/10W 5% 0603

SMD

50 8R41, R42, R52, R58, R59, R63, R79,

R80

OPEN-0603SMT

51 2R50, R51 100R-0603SMT Panasonic ERA-3YEB101V RES 100 OHM

1/16W .1% 0603

SMD

Table 17. Bill of Materials (Continued)

Item Quantity Reference Part Manufacturer Part Number Description

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

52 1R55 2_2K-0603SMT Panasonic ERJ-3GEYJ222V RES 2.2K OHM

1/10W 5% 0603

SMD

53 2R62, R72 1K_ADJ/SMT3MM Murata PVG3A102C01R00 POT 1K 3MM

CERM SQ S/T SMD

54 0R65(deleted) 0R-2010SMT Vishay/Dale CRCW20100000Z0EF RES 0.0 OHM1/2W

5% 2010 SMD

55 2R77, R78 51R-0603SMT Panasonic ERJ-3GEYJ510V RES 51 OHM

1/10W 5% 0603

SMD

56 4SP1, SP2, SP3, SP4 TEST POINT

57 4SW1, SW3, SW6, SW7 SW PUSHBUTTON-SPST C&K Components EP11FPD1SAPE SPST- Momentary

RA/SMT

58 1SW2 SW DIP-3 CTS 194-3MST CTS Corporation Resis-

tor/Electrocomponents

194-3MST SWITCH SIDE

ACTUATED GOLD

3 SEC

59 1SW4 B3F-1150 Omron B3F-1150 SWITCH TACT

6MM 100GF

H=7.3MM

60 1SW5 SW DIP-8/SM C&K Components BPA08SB 8-POSITION DIP

PACK

61 1TB1 Terminal Block/ED1202DS On-Shore Tech. ED120/2DS TERMINAL BLOCK

5.08MM VERT

2POS

62 14 TP1, TP2, TP3, TP4, TP5, TP6, TP7,

TP8, TP9, TP10

TESTPOINT

TP11, TP12, TP13, TP14

63 1U1 ECP3-672fpBGA LATTICE SUPPLIED

64 1U2 PTH12060L Texas Instruments PTH12060LAH MODULE PIP

12VIN 10A ADJ 10-

65 1U3 PTH12060W Texas Instruments PTH12060WAH MODULE PIP

12VIN 10A ADJ 10-

66 2U4, U5 SC1592 Semtech SC1592IMTRT IC LDO ADJ REG

3A TO-263-7

67 1U6 M25P64-FLASH STMicro M25P64-VMF6P IC SRL FLASH

64MBIT 3V 16-SOP

Wide(300MIL)

68 1U7 MAX6817 Maxim MAX6817-EUT+T ±15kV ESD-Pro-

tected, Dual, CMOS

Switch Debouncers

69 2U8,U10 NC7WZ16-MAAO6A/Fair-

child TinyLogic

Fairchild NC7WZ16P6X IC BUFFER UHS

DUAL SC70-6

70 1U9 SN74LVC125A/SO14 Texas Instruments SN74LVC125AD IC QUAD BUS BUF-

FER GATE 14-SOIC

71 1U11 S29GL064A Spansion S29GL064N90BF1040 48fBGA FLASH-

VBN048

72 1U12 LCMXO1200C-

CSBGA132

LATTICE SUPPLIED

73 1U13 LP2998-SO8 National Semi LP2998MA/NOPB IC DDR TERMINA-

TION REG 8SOIC

74 1U14 DDR2-SDRAM-84FBGA Micron MT47H16M16BG-37E 16-Bit DDR2

75 1U15 CY2304-1 Cypress Semiconductor CY2304SXC-1 zero delay buffer

76 1Y1 CTS-CB3LV-3C-

100.00MHZ

CTS-Frequency Controls CB3LV-3l-100M0000-T OSC CLOCK

100.000 MHZ 3.3V

SMD

77 1Bracket

78 2Screw 4-40 x .250

79 2Flat washer 4-40

80 2Lock washer 4-40

81 2C222, C224 100NF-0603SMT Panasonic ECJ-1VF1C104Z CAP .1UF 16V

CERAMIC Y5V

0603

82 1C223 10UF-16V-TANTBSMT AVX TAJB106K016R CAP 10UF 16V

TANT B-SIZE

Table 17. Bill of Materials (Continued)

Item Quantity Reference Part Manufacturer Part Number Description

LatticeECP3 PCI Express Solutions Board – Revision A

User’s Guide

83 1R227 1_6R-0603SMT Panasonic ERJ-3GEYJ1R6V RESISTOR 1.6

OHM 1/10W 5%

0603

84 4R223, R224, R228, R229 50R-0402SMT Vishay FC0402E50R0BTBST1 RES 50 OHM

50MW .1% 0402

SMD

85 1Y2 CRYSTEK_133MHZ Crystek CCLD-033-50-133.000 OSC LVDS 133.0

MHZ 3.3V

7mmx5mm SMD

86 2C220, C225 10NF-0402SMT Panasonic ECJ0EB1E103K CAP .01UF 25V

CERAMIC X7R

0402

87 1R222 50R-0603SMT Vishay FC0603E50R0BTBT1 RES 50 OHM

125MW .1% 0603

SMD

88 1D33 SCHOTTKY/VISHAYV12P

Vishay V12P10-E3/87A TO277 SCHOTTKY

DIODE

Table 17. Bill of Materials (Continued)

Item Quantity Reference Part Manufacturer Part Number Description

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

Lattice:

LFE3-95EA-SP-EVN LFE3-95EA-PCIE-DKN