Revised February 2000 DM9334 8-Bit Addressable Latch General Description Features The DM9334 is a high speed 8-bit Addressable Latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable of storing single line data in eight addressable latches, and being a one-of-eight decoder and demultiplexer with active level HIGH outputs. The device also incorporates an active level LOW common clear for resetting all latches, as well as an active level LOW enable. Common clear Easily expandable Random (addressable) data entry Serial to parallel capability 8 bits of storage/output of each bit available Active high demultiplexing/decoding capability The DM9334 has four modes of operation which are shown in the mode selection table. In the addressable latch mode, data on the data line (D) is written into the addressed latch. The addressed latch will follow the data input with all nonaddressed latches remaining in their previous states. In the memory mode, all latches remain in their previous state and are unaffected by the data or address inputs. In the one-of-eight decoding or demultiplexing mode, the addressed output will follow the state of the D input with all other inputs in the LOW state. In the clear mode all outputs are LOW and unaffected by the address and data inputs. When operating the device as an addressable latch, changing more than one bit of the address could impose a transient wrong address. Therefore, this should only be done while in the memory mode. The function tables summarize the operation of the product. Ordering Code: Order Number DM9334N Package Number N16E Package Description 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Connection Diagram (c) 2000 Fairchild Semiconductor Corporation DS006609 www.fairchildsemi.com DM9334 8-Bit Addressable Latch August 1986 DM9334 Function Tables E C L H Mode H H Memory L L Active HIGH Eight Channel Demultiplexer H L Clear Addressable Latch Inputs Present Output States Mode C E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 L H X X X X L L L L L L L L L L L L L L L L L L L L L L L L H L L L H L L L L L L L L L L H L L L L L L L L L L L L H H L L L H L L L L L L * * * * * * * * * * * * * * L L H H H H L L L L H H H X X X X QN-1 H L L L L L L QN-1 QN-1 QN-1 H L H L L L H QN-1 QN-1 H L L H L L QN-1 L QN-1 H L H H L L QN-1 H QN-1 * * * * * * * * * * * * * * H L L H H H QN-1 QN-1 L H L H H H H QN-1 QN-1 H Demultiplex * L L L Memory Addressable Latch * H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Condition QN-1 = Previous Output State Logic Diagram www.fairchildsemi.com Clear 2 Supply Voltage Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation. 7V Input Voltage 5.5V 0 to +70C Operating Free Air Temperature Range -65C to +150C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max Units 4.75 5 5.25 V LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current -0.8 mA IOL LOW Level Output Current 16 mA tW ENABLE Pulse Width (Figure 1) (Note 3) 19 13 tSU Setup Time 20 13 Data 0 (Figure 5) 20 14 Address (Figure 6) 10 5 VCC Supply Voltage VIH HIGH Level Input Voltage VIL (Note 3) 2 Data 1 (Figure 5) V ns ns (Note 2) tH TA Hold Time Data 1 (Figure 5) 0 -10 (Note 3) Data 0 (Figure 5) 0 -13 Free Air Operating Temperature ns 0 C 70 Note 2: The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is addressed without affecting the other latches. Note 3: TA = 25C and VCC = 5V. Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = -12 mA VOH HIGH Level VCC = Min, IOH = Max Output Voltage VIL = Max, VIH = Min VOL LOW Level VCC = Min, IOL = Max Output Voltage VIH = Min, VIL = Max Min 2.4 Typ (Note 4) Max Units -1.5 V 3.6 0.2 V 0.4 V 1 mA II Input Current @ Max Input Voltage VCC = Max, VI = 5.5V IIH HIGH Level VCC = Max E Input 60 Input Current VI = 2.4V Others 40 LOW Level VCC = Max E Input -2.4 Input Current VI = 0.4V Others IOS Short Circuit Output Current VCC = Max (Note 5) ICC Supply Current VCC = Max IIL -1.6 -30 56 A mA -100 mA 86 mA Note 4: All typicals are at VCC = 5V, TA = 25C. Note 5: Not more than one output should be shorted at a time, and the duration should not exceed one second. 3 www.fairchildsemi.com DM9334 Absolute Maximum Ratings(Note 1) DM9334 Switching Characteristics at VCC = 5V and TA = 25C Symbol tPLH Parameter Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPLH Propagation Delay Time LOW-to-HIGH Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output From (Input) RL = 400, CL = 15 pF To (Output) Min Enable to Output, (Figure 1) Enable to Output, (Figure 1) Data to Output, (Figure 4) Data to Output, (Figure 4) Address to Output, (Figure 2) Address to Output, (Figure 2) Clear to Output, (Figure 3) Max Units 28 ns 27 ns 35 ns 28 ns 35 ns 35 ns 31 ns Switching Time Waveforms Other Conditions: C = H, A = Stable Other Conditions: E = L, C = L, D = H FIGURE 1. FIGURE 2. Other Conditions: E = L, C = H, A = Stable Other Conditions: E = H FIGURE 4. FIGURE 3. Other Conditions: C = H Note: The shaded areas indicate when the inputs are permitted to change for predictable output performance. Other Conditions: C = H, A = Stable FIGURE 6. FIGURE 5. www.fairchildsemi.com 4 DM9334 8-Bit Addressable Latch Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com