© 2000 Fairchild Semiconductor Corporation DS006609 www .fairchildsemi.com
August 1986
Revised February 2000
DM9334 8-Bit Addressable Latch
DM9334
8-Bit Addressable Latch
General Descript ion
The DM9334 is a high speed 8-bit Addressable Latch
designed for general purpose storage applications in digital
systems. It is a multifunctional device capable of storing
single line data in eight addressable latches, and being a
one-of-eight decoder and demultiplexer with active level
HIGH outputs. The device also incorporates an active level
LOW commo n clear for resetting all lat ches, as well as an
active level LOW enable.
The DM9334 has four modes of operation which are shown
in the mode selection table. In the addressable latch mode,
data on the data line (D) is written into the addressed latch.
The addressed latch will follow the data input wit h all non-
addressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous state
and are unaffected by the data or address inputs.
In the one-of-eight decoding or demultiplexing mode, the
addressed output will follow the state of the D input with all
other inputs in the LOW state. In the clear mode all outputs
are LOW and unaffected by the address and data inputs.
When operating the device as an addressable latch,
changin g more than one bi t of th e addre ss could im pos e a
transient wrong address. Therefore, this should only be
done while in the memory mode.
The function tables summarize the operation of the prod-
uct.
Features
Common clear
Easily expandable
Random (addressable) data entry
Serial to parallel capability
8 bits of storage/output of each bit available
Active high demultiplexing/decoding capability
Ordering Code:
Connection Diagram
Order Number Package Number Package Description
DM9334N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
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DM9334
Function Tables
H = HIGH Voltage Leve l
L = LOW Voltage Level
X = Don’t Care Condition
QN1 = Previou s Out put Stat e
Logic Diagram
E C Mode
L H Addressable Latch
H H Memory
L L Active HIGH Eight Channel Demultiplexer
H L Clear
Inputs Present Output States Mode
CED A0A1A2Q0Q1Q2Q3Q4Q5Q6Q7
LHXXXXLLLLLLLL Clear
LLLLLLLLLLLLLL
Demultiplex
LLHLLLHLLLLLLL
LLLHLLLLLLLLLL
LLHHLLLHLLLLLL
•••
•••
•••
LLHHHHLLLLLLLH
HHXXXXQ
N1Memory
HLLLLLLQ
N1QN1QN1
Addressable
Latch
HLHLLLHQ
N1QN1
HLLHLLQ
N1LQ
N1
HLHHLLQ
N1HQ
N1
•••
•••
•••
HLLHHHQ
N1QN1L
HLHHHHQ
N1QN1H
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DM9334
Absolute Maximum Ratings(Note 1) Note 1: The “Abso lute Maxim um Ratings” ar e those value s beyond whic h
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Re comm ended Operat ing Co ndition s” table will de fine the cond itions
for actu al device operation.
Recommended Operating Conditions
Note 2: The ADDRESS setup time is the time before the negative ENABLE transition that the ADDRESS must be stable so that the correct latch is
addressed without affecting the other latches.
Note 3: TA = 25°C and VCC = 5V.
Electri cal Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 4: All typicals are at VCC = 5V, TA = 25°C.
Note 5: N ot m ore than one output sh ould be sh orted at a tim e, and the duration sh ould not ex c eed one sec ond.
Supply Voltage 7V
Input Voltage 5.5V
Operating Free Air Temperature Range 0° to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current 0.8 mA
IOL LOW Level Output Current 16 mA
tWENABLE Pulse Width (Figure 1) (Note 3) 19 13 ns
tSU Setup Time Data 1 (Figure 5) 20 13
(Note 3) Data 0 (Figure 5) 20 14 ns
Address (Figure 6) 10 5
(Note 2)
tHHold Time Data 1 (Figure 5) 0 10 ns
(Note 3) Data 0 (Figure 5) 0 13
TAFree Air Operating Temperature 0 70 °C
Symbol Parameter Conditions Min Typ Max Units
(Note 4)
VIInput Clamp Voltage VCC = Min, II = 12 mA 1.5 V
VOH HIGH Level VCC = Min, IOH = Max 2.4 3.6 V
Output Voltage VIL = Max, VIH = Min
VOL LOW Level VCC = Min, IOL = Max 0.2 0.4 V
Output Voltage VIH = Min, VIL = Max
IIInput Current @ Max Input Voltage VCC = Max, VI = 5.5V 1 mA
IIH HIGH Level VCC = Max E Input 60 µA
Input Current VI = 2.4V Others 40
IIL LOW Level VCC = Max E Input 2.4 mA
Input Current VI = 0.4V Others 1.6
IOS Short Circuit Output Current VCC = Max (Note 5) 30 100 mA
ICC Supply Current VCC = Max 56 86 mA
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DM9334
Switching Characteri stics
at VCC = 5V and TA = 25°C
Switching Time Waveforms
Othe r C onditio ns : C = H, A = Stab le
FIGURE 1. Other Conditi ons : E = L, C = L, D = H
FIGURE 2.
Othe r C onditio ns : E = H FIGURE 3.
Other Conditi ons : E = L, C = H, A = Stable
FIGURE 4.
Othe r C onditio ns : C = H, A = Stab le
FIGURE 5.
Other Conditi ons : C = H
Note: The sh aded areas indic ate when the input s are permitted to c hange
for pred ic ta ble outp ut performa nc e.
FIGURE 6.
Symbol Parameter From (Input) RL = 400, CL = 15 pF Units
To (Output) Min Max
tPLH Propagation Delay Time Enable to Output, 28 ns
LOW-to-HIGH Level Output (Figure 1)
tPHL Propagation Delay Time Enable to Output, 27 ns
HIGH-to-LOW Level Output (Figure 1)
tPLH Propagation Delay Time Data to Output, 35 ns
LOW-to-HIGH Level Output (Figure 4)
tPHL Propagation Delay Time Data to Output, 28 ns
HIGH-to-LOW Level Output (Figure 4)
tPLH Propagation Delay Time Address to Output, 35 ns
LOW-to-HIGH Level Output (Figure 2)
tPHL Propagation Delay Time Address to Output, 35 ns
HIGH-to-LOW Level Output (Figure 2)
tPHL Propagation Delay Time Clear to Output, 31 ns
HIGH-to-LOW Level Output (Figure 3)
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DM9334 8-Bit Addressable Latch
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circu itry descr ibed, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life suppor t de vices o r syst ems are devices or syste ms
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instruct ions fo r use pr ovi de d in the labe l ing, can be re a-
sonably expected to result in a significant injury to the
user.
2. A criti cal com ponen t in any compo nent o f a l ife supp ort
device or system whose failure to perform can be rea-
sonabl y e xpec ted to c ause th e fa i lure of the li fe s upp or t
device or system, or to affect its safety or effectiveness.
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