CLC1001 Ultra-Low Noise Amplifier General Description The CLC1001 is a high-performance, voltage feedback amplifier with ultra-low input voltage noise, 0.6nV/Hz. The CLC1001 provides 2.1GHz gain bandwidth product and 410V/s slew rate making it well suited for high-speed data acquisition systems requiring high levels of sensitivity and signal integrity. This high-performance amplifier also offers low input offset voltage. The CLC1001 is designed to operate from 4V to 12V supplies. It consumes only 12.5mA of supply current per channel and offers a power saving disable pin that disables the amplifier and decreases the supply current to below 225A. The CLC1001 amplifier operates over the extended temperature range of -40C to +125C. If a lower minimum stable gain is required, the CLC1002 offers a minimum stable gain of 5. FE ATU R E S 0.6nV/Hz input voltage noise 1mV maximum input offset voltage 2.1GHz gain bandwidth product Minimum stable gain of 10 410V/s slew rate 130mA output current -40C to +125C operating temperature range Fully specified at 5 and 5V supplies CLC1001: ROHS compliant TSOT-6, SOIC-8 package options A P P LICATION S Transimpedance amplifiers Pre-amplifier Low noise signal processing Medical instrumentation Probe equipment Test equipment Ultrasound channel amplifier Ordering Information - back page Input Voltage Noise vs Competition Typical Application +Vs Input Voltage Noise (nV/Hz) Rf R3 Photo Diode R2 + VOUT R1 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 Competition CLC1001 0.1 CLC1002 1 10 Frequency (MHz) Single Supply Photodiode Amplifier (c) 2007-2014 Exar Corporation 1 / 18 exar.com/CLC1001 Rev 1H CLC1001 Absolute Maximum Ratings Operating Conditions Stresses beyond the limits listed below may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Supply Voltage Range........................................................4 to 12V Operating Temperature Range................................-40C to 125C Junction Temperature............................................................ 150C Storage Temperature Range....................................-65C to 150C Lead Temperature (Soldering, 10s).......................................260C VS.................................................................................. 0V to +14V VIN............................................................. -VS - 0.5V to +VS +0.5V Package Thermal Resistance JA (TSOT-6)......................................................................192C/W JA (SOIC-8)......................................................................150C/W Package thermal resistance (JA), JEDEC standard, multi-layer test boards, still air. ESD Protection CLC1001 (HBM)........................................................................2kV ESD Rating for HBM (Human Body Model). (c) 2007-2014 Exar Corporation 2 / 18 exar.com/CLC1001 Rev 1H CLC1001 Electrical Characteristics at +5V TA = 25C, VS = +5V, Rf = 200, RL = 500 to VS/2; G = 10; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product G = +40, VOUT = 0.2Vpp 2000 MHz BWSS -3dB Bandwidth G = +10, VOUT = 0.2Vpp 265 MHz f0.1dBSS 0.1dB Gain Flatness Small Signal G = +10, VOUT = 0.2Vpp 37 MHz BWLS Large Signal Bandwidth G = +10, VOUT = 2Vpp 105 MHz f0.1dBLS 0.1dB Gain Flatness Large Signal G = +10, VOUT = 2Vpp 36 MHz tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 2.4 ns tS Settling Time to 0.1% VOUT = 1V step 11 ns OS Overshoot VOUT = 1V step 6 % SR Slew Rate 4V step 360 V/s Time Domain Distortion/Noise Response HD2 2nd Harmonic Distortion 10MHz, VOUT = 1Vpp 80 dBc HD3 3rd Harmonic Distortion 10MHz, VOUT = 1Vpp 83 dBc THD Total Harmonic Distortion 10MHz, VOUT = 1Vpp 79 dB en Input Voltage Noise >100kHz 0.6 nV/Hz in Input Current Noise >100kHz 4.2 pA/Hz DC Performance VIO Input Offset Voltage 0.1 mV dVIO Average Drift 2.7 V/C IB Input Bias Current 28 A dIB Average Drift 45 nA/C IOS Input Offset Current 0.5 A PSRR Power Supply Rejection Ratio DC 83 dB AOL Open Loop Gain VOUT = VS / 2 82 dB IS Supply Current per channel 12 mA 1V step, 1% settling 100 ns Disable Characteristics tON Turn On Time tOFF Turn Off Time OFFISO Off Isolation OFFCOUT Off Output Capacitance VOFF Power Down Voltage VON Enable Voltage ISD Disable Supply Current 900 ns 80 dB 5.7 pF Disabled if DIS pin is grounded or pulled below VOFF Disabled if DIS < 1.5 V Enabled if DIS pin is floating or pulled above VON Enabled if DIS > 3 V No Load, DIS pin tied to ground 130 A Non-inverting 2.6 M 1.6 pF 0.8 to 5.1 V 85 dB RL = 500 0.93 to 4 V RL = 2k 0.9 to 4.1 V 130 mA 150 mA 2Vpp , 5MHz Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio DC, VCM = 1.5V to 4V Output Characteristics VOUT Output Swing IOUT Output Current ISC Short Circuit Current VOUT = VS / 2 (c) 2007-2014 Exar Corporation 3 / 18 exar.com/CLC1001 Rev 1H CLC1001 Electrical Characteristics at 5V TA = 25C, VS = 5V, Rf = 200, RL = 500 to GND; G = 10; unless otherwise noted. Symbol Parameter Conditions Min Typ Max Units Frequency Domain Response GBWP -3dB Gain Bandwidth Product G = +40, VOUT = 0.2Vpp 2100 MHz BWSS -3dB Bandwidth G = +10, VOUT = 0.2Vpp 284 MHz f0.1dBSS 0.1dB Gain Flatness Small Signal G = +10, VOUT = 0.2Vpp 42 MHz BWLS Large Signal Bandwidth G = +10, VOUT = 2Vpp 117 MHz f0.1dBLS 0.1dB Gain Flatness Large Signal G = +10, VOUT = 2Vpp 47 MHz tR, tF Rise and Fall Time VOUT = 1V step; (10% to 90%) 2.2 ns tS Settling Time to 0.1% VOUT = 1V step 11 ns OS Overshoot VOUT = 1V step 3 % SR Slew Rate 4V step 410 V/s Time Domain Distortion/Noise Response HD2 2nd Harmonic Distortion 10MHz, VOUT = 2Vpp 81 dBc HD3 3rd Harmonic Distortion 10MHz, VOUT = 2Vpp 75 dBc THD Total Harmonic Distortion 10MHz, VOUT = 2Vpp 74 dB en Input Voltage Noise >100kHz 0.6 nV/Hz in Input Current Noise >100kHz 4.2 pA/Hz DC Performance VIO Input Offset Voltage -1 0.35 1 dVIO Average Drift IB Input Bias Current dIB Average Drift IOS Input Offset Current PSRR Power Supply Rejection Ratio DC 78 83 dB AOL Open Loop Gain VOUT = VS / 2 74 83 dB IS Supply Current per channel 12.5 1V step, 1% settling 125 4.4 -60 mV V/C 30 60 44 A nA/C 0.8 6 16 A mA Disable Characteristics tON Turn On Time tOFF Turn Off Time OFFISO Off Isolation OFFCOUT Off Output Capacitance VOFF Power Down Voltage VON Enable Voltage ISD Disable Supply Current No Load, DIS pin tied to ground ns 840 ns 80 dB 5.6 pF Disabled if DIS pin is grounded or pulled below VOFF Disabled if DIS < 1.3 V Enabled if DIS pin is floating or pulled above VON Enabled if DIS > 3 V 180 A 2Vpp , 5MHz 225 Input Characteristics RIN Input Resistance CIN Input Capacitance CMIR Common Mode Input Range CMRR Common Mode Rejection Ratio Non-inverting DC, VCM = -3.5V to 4V 4 M 1.5 pF -4.3 to 5.1 V 75 90 dB -3.8 4 Output Characteristics VOUT Output Swing IOUT Output Current ISC Short Circuit Current RL = 500 RL = 2k VOUT = VS / 2 (c) 2007-2014 Exar Corporation 4 / 18 3.8 V 4 V 130 mA 160 mA exar.com/CLC1001 Rev 1H CLC1001 CLC1001 Pin Configurations CLC1001 Pin Assignments TSOT-6 TSOT-6 OUT 1 -Vs 2 +IN 3 6 + - +Vs 5 DIS 4 -IN SOIC-8 Pin No. Pin Name Description 1 OUT Output 2 -VS Negative supply 3 +IN Positive input 4 -IN Negative input 5 DIS Disable. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. 6 +VS Positive supply SOIC-8 NC 1 -IN 2 +IN 3 -Vs 4 + 8 DIS 7 +Vs 6 OUT 5 NC (c) 2007-2014 Exar Corporation Pin No. Pin Name Description 1 NC No Connect 2 -IN Negative input 3 +IN Positive input 4 -VS Negative supply 5 NC No Connect 6 OUT Output 7 +VS Positive supply 8 DIS Disable. Enabled if pin is left floating or pulled above VON, disabled if pin is grounded or pulled below VOFF. 5 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. Non-Inverting Frequency Response Inverting Frequency Response 3 0 Normalized Gain (dB) Normalized Gain (dB) 3 G = +10 -3 G = +20 G = +40 -6 0 G = -10 -3 G = -20 G = -40 -6 VOUT = 0.2Vpp VOUT = 0.2Vpp -9 0.1 1 10 100 -9 1000 0.1 Frequency (MHz) 1 10 100 1000 Frequency (MHz) Frequency Response vs. CL Frequency Response vs. RL 3 3 0 Normalized Gain (dB) Normalized Gain (dB) CL = 470pF Rs = 4.3 CL = 100pF Rs = 13 CL = 47pF Rs = 20 -3 CL = 22pF Rs = 33 -6 VOUT = 0.2Vpp 0 Rl = 1K Rl = 2K -3 Rl = 5K -6 CL = 10pF Rs = 43 VOUT = 0.2Vpp -9 -9 0.1 1 10 100 0.1 1000 1 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. VOUT -3dB Bandwidth vs. Output Voltage 1 300 250 -1 -3dB Bandwidth (MHz) Normalized Gain (dB) 0 VOUT = 4Vpp -2 VOUT = 3Vpp -3 VOUT = 2Vpp -4 -5 200 150 100 50 -6 -7 0.1 1 10 100 0 1000 0.0 Frequency (MHz) (c) 2007-2014 Exar Corporation 1.0 2.0 3.0 4.0 VOUT (VPP) 6 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. Non-Inverting Frequency Response at VS = 5V Inverting Frequency Response at VS = 5V 3 Normalized Gain (dB) Normalized Gain (dB) 3 0 G = +10 -3 G = +20 G = +40 0 G = -10 -3 G = -20 G = -40 -6 -6 VOUT = 0.2Vpp VOUT = 0.2Vpp -9 -9 0.1 1 10 100 0.1 1000 1 10 100 1000 Frequency (MHz) Frequency (MHz) Frequency Response vs. CL at VS = 5V Frequency Response vs. RL at VS = 5V 3 3 0 Normalized Gain (dB) Normalized Gain (dB) CL = 470pF Rs = 5 CL = 100pF Rs = 15 CL = 47pF Rs = 22 -3 CL = 22pF Rs = 36 -6 VOUT = 0.2Vpp 0 Rl = 1K Rl = 2K -3 Rl = 5K -6 CL = 10pF Rs = 50 VOUT = 0.2Vpp -9 -9 0.1 1 10 100 1000 0.1 1 Frequency (MHz) 10 100 1000 Frequency (MHz) Frequency Response vs. VOUT at VS = 5V -3dB Bandwidth vs. Output Voltage at VS = 5V 1 300 0 VOUT = 2Vpp -2 -3dB Bandwidth (MHz) Normalized Gain (dB) 250 -1 VOUT = 1.5Vpp -3 VOUT = 1Vpp -4 -5 200 150 100 50 -6 -7 0.1 1 10 100 0 1000 0.0 Frequency (MHz) (c) 2007-2014 Exar Corporation 0.5 1.0 1.5 2.0 VOUT (VPP) 7 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. Input Voltage Noise at VS = 5V 2.6 2.6 2.4 2.4 2.2 2.2 Input Voltage Noise (nV/Hz) Input Voltage Noise (nV/Hz) Input Voltage Noise 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0.2 0 0.0001 0.001 0.01 0.1 1 0 0.0001 10 10 0.001 0.01 0.85 0.85 0.8 0.8 0.75 0.7 0.65 0.6 0.55 0.5 0.01 0.1 10 10 0.75 0.7 0.65 0.6 0.55 0.5 0.01 10 10 1 1 Input Voltage Noise at VS = 5V (>10kHz) Input Voltage Noise (nV/Hz) Input Voltage Noise (nV/Hz) Input Voltage Noise (>10kHz) 0.1 Frequency (MHz) Frequency (MHz) 0.1 1 Frequency (MHz) Frequency (MHz) 10 10 ROUT vs. Frequency 100 ROUT () 10 1 0.1 0.01 0.001 0.01 0.1 1 10 100 1000 Frequency (MHz) (c) 2007-2014 Exar Corporation 8 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. 2nd Harmonic Distortion vs. RL 3rd Harmonic Distortion vs. RL -65 -65 -75 RL = 500 Distortion (dBc) Distortion (dBc) -75 -85 -95 RL = 1k -105 RL = 500 -85 RL = 1k -95 -105 VOUT = 1Vpp VOUT = 1Vpp -115 5 10 15 -115 20 5 Frequency (MHz) 20 3rd Harmonic Distortion vs. VOUT -65 -55 20MHz -70 -60 10MHz -75 20MHz -65 10MHz -70 -80 Distortion (dBc) Distortion (dBc) 15 Frequency (MHz) 2nd Harmonic Distortion vs. VOUT -85 5MHz -90 -95 -75 -80 -85 -90 5MHz -95 -100 -100 RL = 500 -105 0.5 0.75 1 1.25 1.5 1.75 Output Amplitude (Vpp) 2 2.25 RL = 500 -105 2.5 0.5 2nd Harmonic Distortion vs. Gain 0.75 1 1.25 1.5 1.75 Output Amplitude (Vpp) 2 2.25 2.5 3rd Harmonic Distortion vs. Gain -50 -50 -55 -55 -60 -60 AV+40 -65 Distortion (dBc) -65 Distortion (dBc) 10 AV+20 -70 -75 -80 -85 -90 -95 5 -80 -85 RL = 500 -100 10 15 5 20 10 15 20 Frequency (MHz) Frequency (MHz) (c) 2007-2014 Exar Corporation AV+10 VOUT = 1VPP -95 RL = 500 -100 AV+20 -75 -90 AV+10 VOUT = 1VPP AV+40 -70 9 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. 2nd Harmonic Distortion vs. RL at VS = 5V 3rd Harmonic Distortion vs. RL at VS = 5V -65 -65 RL = 500 RL = 500 -75 Distortion (dBc) Distortion (dBc) -75 -85 RL = 1k -95 -105 -85 -95 RL = 1k -105 VOUT = 1Vpp VOUT = 1Vpp -115 -115 5 10 15 20 5 10 Frequency (MHz) 2nd Harmonic Distortion vs. VOUT at VS = 5V -55 -60 -60 20MHz -65 -65 -70 -70 20MHz Distortion (dBc) Distortion (dBc) 20 3rd Harmonic Distortion vs. VOUT at VS = 5V -55 -75 -80 -85 -75 -80 -85 10MHz 0.5 0.75 -100 1 5MHz -95 RL = 500 -95 10MHz -90 5MHz -90 1.25 1.5 1.75 Output Amplitude (Vpp) 2 2.25 RL = 500 -105 2.5 0.5 2nd Harmonic Distortion vs. Gain at VS = 5V 0.75 1 1.25 1.5 1.75 Output Amplitude (Vpp) 2 2.25 2.5 3rd Harmonic Distortion vs. Gain at VS = 5V -50 -50 -55 -55 AV+40 -60 -60 AV+20 -65 Distortion (dBc) -65 Distortion (dBc) 15 Frequency (MHz) -70 -75 -80 -85 AV+10 -70 AV+20 -75 -80 -85 AV+10 -90 -90 VOUT = 1VPP -95 5 VOUT = 1VPP -95 RL = 500 -100 AV+40 RL = 500 -100 10 15 5 20 (c) 2007-2014 Exar Corporation 10 15 20 Frequency (MHz) Frequency (MHz) 10 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. Small Signal Pulse Response Small Signal Pulse Response at VS = 5V 0.1 2.6 0.05 2.55 Voltage (V) 2.65 Voltage (V) 0.15 0 2.5 -0.05 2.45 -0.1 2.4 -0.15 2.35 0 50 100 150 200 0 50 100 Time (ns) Large Signal Pulse Response 200 Large Signal Pulse Response at VS = 5V 3 4 2 3.5 1 3 Voltage (V) Voltage (V) 150 Time (ns) 0 2.5 -1 2 -2 1.5 -3 1 0 50 100 150 200 0 50 100 Time (ns) Enable Response 5.5 200 Disable Response 1.5 5.5 1.5 Disable Enable 4.5 150 Time (ns) 4.5 0.5 Output 1.5 Disable Voltage (V) 2.5 1 3.5 Output 2.5 0.5 1.5 0 Output Voltage (V) 3.5 Output Voltage (V) Enable Voltage (V) 1 0 0.5 0.5 -0.5 -0.5 -100 -0.5 -50 0 50 100 150 200 Time (ns) (c) 2007-2014 Exar Corporation -0.5 0 100 200 300 400 500 600 700 800 900 Time (ns) 11 / 18 exar.com/CLC1001 Rev 1H CLC1001 Typical Performance Characteristics TA = 25C, VS = 5V, Rf = 200, RL = 500, G = +10; unless otherwise noted. Enable Response at VS = 5V Disable Response at VS = 5V 5.5 1.5 5.5 Enable 4.5 1.5 Disable 4.5 Output 0.5 1.5 3.5 Output 2.5 0.5 1.5 0 0 0.5 0.5 -0.5 -0.5 -100 -0.5 -50 0 50 100 150 200 -0.5 0 100 200 Time (ns) 300 400 500 600 700 800 900 Time (ns) Off Isolation Off Isolation at VS = 5V -45 -45 -50 -50 -55 -55 -60 -60 Off Isolation (dB) Off Isolation (dB) Output Voltage (V) 3.5 2.5 Disable Voltage (V) 1 Output Voltage (V) Enable Voltage (V) 1 -65 -70 -75 -80 -85 -65 -70 -75 -80 -85 -90 -90 VOUT = 2Vpp -95 VOUT = 2Vpp -95 -100 -100 1 10 100 1 10 Frequency (MHz) 100 Frequency (MHz) 100 100 80 80 60 60 PSRR (dB) CMRR (dB) CMRR vs. Frequency PSRR vs. Frequency 40 20 0 0.001 40 20 0.01 0.1 1 10 100 0 0.001 1000 Frequency (MHz) (c) 2007-2014 Exar Corporation 0.01 0.1 1 10 100 Frequency (MHz) 12 / 18 exar.com/CLC1001 Rev 1H CLC1001 Application Information 2.75 Basic Information Input Referred Noise (nV/rtHz) 2.5 Figures 1 and 2 illustrate typical circuit configurations for non-inverting, inverting, and unity gain topologies for dual supply applications. They show the recommended bypass capacitor values and overall closed loop gain equations. +Vs 6.8F G = +11 2.25 2 G = +21 1.75 G = +41 1.5 1.25 1 0.75 Input 0.5 0.1F + 100 1000 Rf (Ohms) Output - Figure 3: Input Referred Voltage Noise vs. Rf and Rg RL 0.1F Rg 6.8F -Vs Rf G = 1 + (Rf/Rg) The noise caused by a resistor is modeled with either a voltage source in series with the resistance: Figure 1: Typical Non-Inverting Gain Circuit +Vs R1 Input Rg 4kTR Or a current source in parallel with it: 6.8F iR = 0.1F + Output RL 0.1F 6.8F -Vs Rf G = - (Rf/Rg) For optimum input offset voltage set R1 = Rf || Rg Figure 2: Typical Inverting Gain Circuit Achieving Low Noise in an Application Making full use of the low noise of the CLC1001 requires careful consideration of resistor values. The feedback and gain set resistors (Rf and Rg) and the non-inverting source impedance (Rsource) all contribute noise to the circuit and can easily dominate the overall noise if their values are too high. The datasheet is specified with an Rg of 22.1, at which point the noise from Rf and Rg is about equal to the noise from the CLC1001. Lower value resistors could be used at the expense of more distortion. Figure 3 shows total input voltage noise (amp+resistors) versus Rf and Rg. As the value of Rf increases, the total input referred noise also increases. 4kT R Op amp noise is modeled with three noise sources, en, in, in and ii. These three sources are analogous to the DC input voltage and current errors Vos, Ibn and Ibi. The noise models must be analyzed in-circuit to determine the effect on the op amp output noise. Since noise is statistical in nature rather than a continuous signal, the set of noise sources in circuit add in an RMS (root mean square) fashion rather than in a linear fashion. For uncorrelated noise sources, this means you add the squares of the noise voltages. A typical non-inverting application (see figure 1) results in the following noise at the output of the op amp: e2o = en2 1+ 2 Rf 2 + in Rs Rg 2 1+ Rf Rg 2 + ii2R2f op amp noise terms op amp noise terms en, in and ii + 2 eRs 1+ Rf Rg 2 + e2Rg Rf Rg 2 + e2Rf external resistor noise terms external resistor noise terms for RS, Rg and Rf (c) 2007-2014 Exar Corporation 13 / 18 exar.com/CLC1001 Rev 1H CLC1001 High source impedances are sometimes unavoidable, but they increase noise from the source impedance and also make the circuit more sensitive to the op amp current noise. Analyze all noise sources in the circuit, not just the op amp itself, to achieve low noise in your application. (Vload)RMS = Vpeak / 2 ( Iload)RMS = ( Vload)RMS / Rloadeff The dynamic power is focused primarily within the output stage driving the load. This value can be calculated as: PDynamic = (VS+ - Vload)RMS x ( Iload)RMS Power Dissipation Power dissipation should not be a factor when operating under the stated 500 load condition. However, applications with low impedance, DC coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. Guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond it's intended operating range. Assuming the load is referenced in the middle of the power rails or Vsupply/2. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 2 Maximum Power Dissipation (W) Maximum power levels are set by the absolute maximum junction rating of 150C. To calculate the junction temperature, the package thermal resistance value ThetaJA (JA) is used along with the total die power dissipation. TJunction = TAmbient + (JA x PD) Where TAmbient is the temperature of the working environment. In order to determine PD, the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. 1.5 SOIC-8 1 0.5 TSOT-6 0 -40 -20 0 20 40 60 80 100 120 Ambient Temperature (C) PD = Psupply - Pload Figure 4. Maximum Power Derating Supply power is calculated by the standard power equation. Psupply = Vsupply x IRMSsupply Vsupply = VS+ - VSPower delivered to a purely resistive load is: Pload = ((Vload)RMS2)/Rloadeff The effective load resistor (Rloadeff) will need to include the effect of the feedback network. For instance, Driving Capacitive Loads Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. Use a series resistance, RS, between the amplifier and the load to help improve stability and settling performance. Refer to Figure 5. Input Rloadeff in Figure 3 would be calculated as: + RL || (Rf + Rg) Rs Rf These measurements are basic and are relatively easy to perform with standard lab equipment. For design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. Here, PD can be found from Output CL RL Rg Figure 5. Addition of RS for Driving Capacitive Loads PD = PQuiescent + PDynamic - Pload Quiescent power can be derived from the specified IS values along with known supply voltage, Vsupply. Load power can be calculated as above with the desired signal amplitudes using: (c) 2007-2014 Exar Corporation Table 1 provides the recommended RS for various capacitive loads. The recommended RS values result in approximately <1dB peaking in the frequency response. The Frequency Response vs. CL plots, on page 6 and 7, illustrate the response of the CLC1001. 14 / 18 exar.com/CLC1001 Rev 1H CLC1001 CL (pF) RS () -3dB BW (MHz) 10 43 266 22 33 228 47 20 192 100 13 155 470 4.3 84 Place the 6.8F capacitor within 0.75 inches of the power pin Place the 0.1F capacitor within 0.1 inches of the power pin Remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance Minimize all trace lengths to reduce series inductances Refer to the evaluation board layouts below for more information. Table 1: Recommended RS vs. CL Evaluation Board Information For a given load capacitance, adjust RS to optimize the tradeoff between settling time and bandwidth. In general, reducing RS will increase bandwidth at the expense of additional overshoot and ringing. The following evaluation boards are available to aid in the testing and layout of these devices: Evaluation Board # Overdrive Recovery For an amplifier, an overdrive condition is defined as the point when either one of the inputs or the output exceed their specified voltage range. Overdrive recovery is the time needed for the amplifier to return to its normal or linear operating point. The recovery time varies based on whether the input or output is overdriven and by how much the ranges are exceeded. The CLC1001 will typically recover in less than 25ns from an overdrive condition. Figure 6 shows the CLC1001 in an overdriven condition. Products CEB002 CLC1001 in TSOT CEB003 CLC1001 in SOIC Evaluation Board Schematics Evaluation board schematics and layouts are shown in Figures 7-11 These evaluation boards are built for dualsupply operation. Follow these steps to use the board in a single-supply application: 1. Short -VS to ground. 2. Use C3 and C4, if the -VS pin of the amplifier is not directly connected to the ground plane. 6 OUTPUT 4 Voltage (V) 2 0 INPUT -2 -4 Vs = +/-5V_RL=2K_AV=+5 -6 0 100 200 300 400 500 600 700 800 900 1,000 Time (ns) Figure 6: Overdrive Recovery Layout Considerations General layout and supply bypassing play major roles in high frequency performance. Exar has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. Follow the steps below as a basis for high frequency layout: Include 6.8F and 0.1F ceramic capacitors for power supply decoupling (c) 2007-2014 Exar Corporation Figure 7. CEB002 & CEB003 Schematic 15 / 18 exar.com/CLC1001 Rev 1H CLC1001 Figure 11. CEB003 Bottom View Figure 8. CEB002 Top View Figure 9. CEB002 Bottom View Figure 10. CEB003 Top View (c) 2007-2014 Exar Corporation 16 / 18 exar.com/CLC1001 Rev 1H CLC1001 Mechanical Dimensions TSOT-6 Package SOIC-8 Package (c) 2007-2014 Exar Corporation 17 / 18 exar.com/CLC1001 Rev 1H CLC1001 Ordering Information Part Number Package Green Operating Temperature Range Packaging Quantity CLC1001IST6X TSOT-6 Yes -40C to +125C 2.5k Tape & Reel CLC1001IST6MTR TSOT-6 Yes -40C to +125C 250 Tape & Reel CLC1001IST6EVB Evaluation Board N/A N/A N/A CLC1001 Ordering Information CLC1001ISO8X SOIC-8 Yes -40C to +125C 2.5k Tape & Reel CLC1001ISO8MTR SOIC-8 Yes -40C to +125C 250 Tape & Reel CLC1001ISO8EVB Evaluation Board N/A N/A N/A Moisture sensitivity level for all parts is MSL-1. Revision History Revision 1H (ECN 1441-02) Date September 2014 Description Reformat into Exar data sheet template. Updated ordering information table to include MTR and EVB part numbers. Increased "I" temperature range from +85 to +125C. Removed "A" temp grade parts, since "I" is now equivalent. Updated thermal resistance numbers and package outline drawings. For Further Assistance: Email: CustomerSupport@exar.com or HPATechSupport@exar.com Exar Technical Documentation: http://www.exar.com/techdoc/ Exar Corporation Headquarters and Sales Offices 48760 Kato Road Tel.: +1 (510) 668-7000 Fremont, CA 94538 - USA Fax: +1 (510) 668-7001 NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. (c) 2007-2014 Exar Corporation 18 / 18 exar.com/CLC1001 Rev 1H Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Exar: CLC1001ISO8X CLC1001IST6X CLC1001IST6EVB CLC1001AST6EVB CLC1001ISO8MTR CLC1001ASO8EVB CLC1001IST6MTR CLC1001ISO8EVB