SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 SN54HC112 . . . J OR W PACKAGE SN74HC112 . . . D OR N PACKAGE (TOP VIEW) Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 40-A Max ICC Typical tpd = 13 ns 4-mA Output Drive at 5 V Low Input Current of 1 A Max 1CLK 1K 1J 1PRE 1Q 1Q 2Q GND description/ordering information The 'HC112 devices contain two independent J-K negative-edge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the negative-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the fall time of the CLK pulse. Following the hold-time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops perform as toggle flip-flops by tying J and K high. 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1CLR 2CLR 2CLK 2K 2J 2PRE 2Q 1K 1CLK NC VCC 1CLR SN54HC112 . . . FK PACKAGE (TOP VIEW) 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2Q GND NC 2Q 1J 1PRE NC 1Q 1Q 2CLR 2CLK NC 2K 2J 2PRE D D D D D D NC - No internal connection ORDERING INFORMATION PDIP - N -40C to 85C -55C -55 C to 125 125C C ORDERABLE PART NUMBER PACKAGE TA TOP-SIDE MARKING Tube of 25 SN74HC112N Tube of 40 SN74HC112D Reel of 2500 SN74HC112DR Reel of 250 SN74HC112DT CDIP - J Tube of 25 SNJ54HC112J SNJ54HC112J CFP - W Tube of 150 SNJ54HC112W SNJ54HC112W LCCC - FK Tube of 55 SNJ54HC112FK SOIC - D SN74HC112N HC112 SNJ54HC112FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- )!,'&$% &")+#$ $ 3454 #++ )#!#"($(!% #!( $(%$(, '+(%% $.(!0%( $(,- #++ $.(! )!,'&$% )!,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 FUNCTION TABLE OUTPUTS INPUTS PRE CLR CLK L H X H L X J K Q Q X X H L X X H H L L X X X L H H H L L Q0 Q0 H H H L H L H H L H L H H H H H Toggle H H H X X Q0 Q0 This configuration is nonstable; that is, it does not persist when either PRE or CLR returns to its inactive (high) level. logic diagram, each flip-flop (positive logic) PRE C J C Q TG TG K C CLK C C C TG TG C C C C Q CLR 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 absolute maximum ratings over operating free-air temperature range Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Package thermal impedance, JA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) SN54HC112 VCC VIH Supply voltage High-level input voltage VCC = 2 V VCC = 4.5 V VCC = 6 V VCC = 2 V VIL VI VO tt Low-level input voltage MIN NOM MAX 2 5 6 MIN NOM MAX 2 5 6 1.5 1.5 3.15 3.15 4.2 4.2 VCC = 4.5 V VCC = 6 V Input voltage 0 Output voltage 0 Input transition (rise and fall) time SN74HC112 VCC = 2 V VCC = 4.5 V VCC = 6 V 0.5 1.35 1.35 1.8 1.8 0 0 V V 0.5 VCC VCC UNIT VCC VCC 1000 1000 500 500 400 400 V V V ns TA Operating free-air temperature -55 125 -40 85 C If this device is used in the threshold region (from VILmax = 0.5 V to VIHmin = 1.5 V), there is a potential to go into the wrong state from induced grounding, causing double clocking. Operating with the inputs at tt = 1000 ns and VCC = 2 V does not damage the device; however, functionally, the CLK inputs are not ensured while in the shift, count, or toggle operating modes. NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = -20 A VOH IOL = 20 A VI = VCC or 0 VI = VCC or 0, TA = 25C TYP MAX MIN MAX SN74HC112 MIN 2V 1.9 1.998 1.9 1.9 4.4 4.499 4.4 4.4 6V 5.9 5.999 5.9 5.9 4.5 V 3.98 4.3 3.7 3.84 6V 5.48 5.8 5.2 MAX UNIT V 5.34 2V 0.002 0.1 0.1 0.1 4.5 V 0.001 0.1 0.1 0.1 6V 0.001 0.1 0.1 0.1 4.5 V 0.17 0.26 0.4 0.33 6V 0.15 0.26 0.4 0.33 6V 0.1 100 1000 1000 nA 4 80 40 A 3 10 10 10 pF IO = 0 6V Ci SN54HC112 4.5 V VI = VIH or VIL IOL = 4 mA IOL = 5.2 mA II ICC MIN VI = VIH or VIL IOH = -4 mA IOH = -5.2 mA VOL VCC 2 V to 6 V V timing requirements over recommended operating free-air temperature range (unless otherwise noted) VCC fclock Clock frequency PRE or CLR low tw Pulse duration CLK high or low Data (J, K) tsu Setup time before CLK PRE or CLR inactive th 4 Hold time, data after CLK POST OFFICE BOX 655303 TA = 25C MIN MAX SN54HC112 MIN MAX SN74HC112 MIN MAX 2V 5 3.4 4 4.5 V 25 17 20 6V 29 20 24 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 100 150 125 4.5 V 20 30 25 6V 17 25 21 2V 0 0 0 4.5 V 0 0 0 6V 0 0 0 * DALLAS, TEXAS 75265 UNIT MHz ns ns ns SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) fmax PRE or CLR Q or Q tpd CLK tt Q or Q Q or Q VCC MIN TA = 25C TYP MAX SN54HC112 MIN MAX SN74HC112 MIN 2V 5 10 3.4 4 4.5 V 25 50 17 20 6V 29 60 20 24 MAX UNIT MHz 2V 54 165 245 205 4.5 V 16 33 49 41 6V 13 28 42 35 2V 56 125 185 155 4.5 V 16 25 37 31 6V 13 21 31 26 2V 29 75 110 95 4.5 V 9 15 22 19 6V 8 13 19 16 ns ns operating characteristics, TA = 25C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TYP 35 UNIT pF 5 SCLS099F - DECEMBER 1982 - REVISED SEPTEMBER 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test VCC High-Level Pulse Test Point 50% 50% 0V tw CL = 50 pF (see Note A) VCC Low-Level Pulse 50% 50% 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATIONS Input VCC 50% 50% 0V tPLH Reference Input VCC 50% In-Phase Output 0V tsu Data Input 50% 10% 90% tr tPHL VCC 50% 10% 0 V 90% 90% tr th 90% 50% 10% tPHL Out-of-Phase Output 90% VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES tPLH 50% 10% tf tf VOH 50% 10% VOL tf 50% 10% 90% VOH VOL tr VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 6 ns, tf = 6 ns. C. For clock inputs, fmax is measured when the input duty cycle is 50%. D. The outputs are measured one at a time with one input transition per measurement. E. tPLH and tPHL are the same as tpd. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE LCCC FK 20 1 TBD Call TI Call TI 8408801EA ACTIVE CDIP J 16 1 TBD Call TI Call TI Call TI 8408801FA ACTIVE CFP W 16 1 TBD Call TI JM38510/65305BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type M38510/65305BEA ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type A42 N / A for Pkg Type SN54HC112J ACTIVE CDIP J 16 1 TBD SN74HC112D ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DE4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DRE4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DT ACTIVE SOIC D 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DTE4 ACTIVE SOIC D 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74HC112DTG4 ACTIVE SOIC D 16 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 25 Pb-Free (RoHS) SN74HC112N ACTIVE PDIP N 16 SN74HC112N3 OBSOLETE PDIP N 16 SN74HC112NE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type SNJ54HC112FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type SNJ54HC112J ACTIVE CDIP J 16 1 TBD A42 N / A for Pkg Type SNJ54HC112W ACTIVE CFP W 16 1 TBD A42 N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Addendum-Page 1 CU NIPDAU N / A for Pkg Type Call TI Samples (Requires Login) 84088012A TBD (3) Call TI PACKAGE OPTION ADDENDUM www.ti.com 25-Jan-2012 LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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OTHER QUALIFIED VERSIONS OF SN54HC112, SN74HC112 : * Catalog: SN74HC112 * Military: SN54HC112 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Military - QML certified for Military and Defense Applications Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74HC112DR Package Package Pins Type Drawing SOIC D 16 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.5 10.3 2.1 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 19-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74HC112DR SOIC D 16 2500 333.2 345.9 28.6 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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