APLUS MAKE YOUR PRODUCTION A-PLUS
APExx16 Series
DATA SHEET
APLUS INTEGRATED CIRCUITS INC.
Address:
3 F-10, No. 32, Sec. 1, Chenggung Rd., Taipei,
Taiwan 115, R.O.C.
(115)台北市南港區成功路㆒段 32 3樓之 10.
TEL: 886-2-2782-9266
FAX: 886-2-2782-9255
WEBSITE : http: //www.aplusinc.com.tw
Sales E-mail:
sales@aplusinc.com.tw
Technology E-mail:
service@aplusinc.com.tw
APExx16 Series
Rev 1.1 2003/9/2
1
1.0 General Description
The APExx16 series are very low cost voice and melody synthesizer with 4-bits CPU. They have various
features including 4-bits ALU, ROM, RAM, I/O ports, timers, clock generator, voice and melody
synthesizer, and PWM (Direct drive) or D/A current outputs, etc. The audio synthesizer contains one
voice-channel and two melody-channels. Furthermore, they consist of 27 instructions in these devices.
W ith CMOS technology and halt function can minimize power dissipation. Their architectures are similar
to RISC, with two stages of instruction pipeline. They allow all instructions to be executed in a single
cycle, except for program branches and data table read instructions (which need two instruction cycles).
2.0 Features
(1) Single power supply can operate from 2.4V to 5.5V at 4MHz or 8MHz.
(2) Program ROM: 16k x 10 bits ( APE8416 /APE10616 /APE12716 are 64k x 10 bits )
(3) 1 set of 16-bits DPR can access up t o 64k x 10 bits melody data memory space, and 1 set of 19-bits
VPR can access up to 512k x 10 bits voice data memory space.
Product Voice Duration (sec) Voice Pointer (VPR) ROM Size (10-bits)
APE1016 10 15-bits 32k
APE1516 15 16-bits 48k
APE2016 20 16-bits 64k
APE3116 31 17-bits 96k
APE4116 41 17-bits 128k
APE6316 63 18-bits 192k
APE8416 84 18-bits 256k
APE10616 106 19-bits 320k
APE12716 127 19-bits 384k
(4) Data Registers:
a). 128 x 4-bits data RAM (00-7Fh)
b). Unbanked special function registers (SFR) range: 00h-2Fh
(5) I/O Ports:
a). PRA: 4-bits I/O Port A (10h) can be programmed to input/output individually. (Regist er control)
b). PRB: 4-bits I/O Port B (13h) can be configured to input/output individually. (Mask option)
c). PRC: 4-bits I/O Port C (14h) can be programmed to input/ out put individually. (Register control)
d). PRD: 4-bits I/O Port D (15h) can be programmed t o input/output individually. (Register control)
(6) On-chip clock generator: Resistive Clock Driv e (RM) or Crystal oscillator (HM)
(7) T imer: 1-set Voice Interrupt (Timer0: a 9-bits auto-reload ti mer/counter).
(8) Stack: 2-level subroutine nesting.
(9) Bu i lt -i n 4 Lev el Vol u me C ontrol ca n be pr o gr amm ed .
APExx16 Series
Rev 1.1 2003/9/2
2
(10) Bui lt-in 8 Level DAC current output can be conf igured. (Mask option)
(11) Bui lt-in IR Carry Output: Port B[1] can be configured as I R pin by 38k / 56kHz. (Mask option)
(12) Ext ernal Reset: Port B[3] can be configured as reset pin. (Mask opton)
(13) HALT and Release from HALT function to reduce power consumption
(14) W atch Dog Timer (WDT)
(15) Instructi on: 1-cycle instruction except for table read and program branches which are 2-cycles
(16) Number of i nstruction: 27
(17) DAC: 1 channel voice and dual tone melody synthesizer (One 9-bits Cout or 8-bits PWM output).
FIGURE 1 : ROM Map of APExx16 Series
* APE8416 /APE10616 /APE12716 are 64k x 10 bits
14-bit x 2 STACK
Reset Ve ctor
00000h-03FFFh
16-bit Data Pointer
PC[13:0]
Reserved for Testing 000FFh-00400h
00401h
00000h
000FEh
Program ROM
00000h-0FFFFh
Data ROM for Melody
19-bit Voice Pointer
00000h-7FFFFh
Voice ROM for Voice
APExx16 Series
Rev 1.1 2003/9/2
3
3.0 Pin Description
Pad Name Pin Attr. Description
PWM2/Cout O PWM2 output, or Current Output of Audio.
PWM1 O PWM1 output.
Vdd1~3 Power Power supply during operation.
PRA0~3
PRC0~3
PRD0~3 I/O I/O port can be programmed to input/output individually.
Input type wit h weak pull-low or fix-input-floating capability.
Buffer Output type.
PRB0 / OSC2 I/O I/O port can be configured to input/output individually or HM OSC pad.
Input type wit h weak pull-low or fix-input-floating capability.
Buffer Output type.
PRB1 / IR I/O I/O port can be configured to input/output individually.
Input type wit h weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an IR Carrier Output with 38k / 56kHz
PRB2 I/O I/O port can be configured to input/output individually.
Input type wit h weak pull-low or fix-input-floating capability.
Buffer Output type.
PRB3 / Reset I/O
I/O port can be configured to input/output individually.
Input type wit h weak pull-low or fix-input-floating capability.
Buffer Output type.
Mask option selected as an external RESET pin with weak pull-low
capability.
OSC1 I RM/HM mode Os c illator input
GND1~4 Power Ground Potential
4.0 DC Characteristics
Symbol Parameter Vdd Min. Typ. Max. Unit Condition
Vdd Operating voltage 2.4 3 5.5 V depending on Freq.
3 1
Isb Standby
4.5 1
uA 4MHz, RM,
in HALT Mode
3 2
Iop
Supply
current Operating 4.5 7
mA 4MHz, RM,
IO Floating
3 3
Iih Input current
(I nter na l pull lo w) 4.5 10 uA Input ports with weak
pull-low
3 -3
Ioh Output-high current
4.5 -10
3 7
Iol Output-low current
4.5 19
mA 4MHz, RM
(IO ports)
3 0.8 ~ 4.8
Cout DAC output current
(8-level option) 4.5 0.9 ~ 6.5 mA 4MHz, RM
(Full s cal e)
dF/F Frequency stability -5 5 % Fosc(3v- 2.4v)
Fosc (3v)
dF/F Fosc lot variation -10 10 % Vdd=3V, Rosc=180k,
4MHz
APExx16 Series
Rev 1.1 2003/9/2
4
FIGURE 2 : Frequency vs. R osc (at 3V)
Resis t or (Rosc ohms) 110k 200k 300k 430k
Freq ue ncy (MHz) 14.84 8.25 5.54 3.92
5.0 Application Circuit
Rosc vs Freq.
5.54 3.92
8.25
14.84
0
5
10
15
20
0 100 200 300 400 500
R osc (k ohm)
Freq. (MHz)
APExx16 Series
Rev 1.1 2003/9/2
5
6.0 Bonding Diagram of APE1016 /APE1516 /APE2016
Pad # Pad Name X Y Pad # Pad Name X Y
1 Vdd3 56 647
14 GND2 1261 235
2 PWM2/Cout 58 466
15 OSC1 1261 350
3 Vdd2 58 182
16 PRB0/OSC2 1261 465
4 PWM1 145 58
17 PRC3 1261 580
5 GND3 293 58
18 PRC2 1261 695
6 PRA3 413 87
19 PRC1 1261 810
7 PRA2 533 87
20 PRC0 1261 925
8 PRA1 653 87
21 PRD3 1261 1040
9 PRA0 773 87
22 PRD2 1261 1155
10 PRB3/Reset 893 87
23 PRD1 1261 1270
11 PRB2 1013 87
24 PRD0 1261 1385
12 PRB1/IR 1133 87
25 GND1 1261 1500
13 Vdd1 1253 87
ROM
2
5 6 7 8 9 12
10 11 13
14
15
PRD3
GND2
Vdd2
OSC1
PRA2
PRA3 PRA1 PRB1
PRB2
PRB3
PRA0
GND3
PWM2/Cout
Vdd3 1
3
4
PWM1 Vdd1
17
PRC0
(0,0)
16
PRB0
PRC1
PRD2
PRC2
PRC3
GND1
PRD0
PRD1
Chip Size : 1432 um x 1650 um
Pad Size : 80 um x 80 um
* The IC substrate must be connected to GND.
19
18
21
20
23
22
24
25
X
Y
APExx16 Series
Rev 1.1 2003/9/2
6
6.1 Bonding Diagram of APE3116 /APE4116 /APE6316
Pad # Pad Name X Y Pad # Pad Name X Y
1 Vdd3 56 647
14 PRB1/IR 1248 405
2 PWM2/Cout 58 466
15 OSC1 1248 570
3 Vdd2 58 182
16 PRB0/OSC2 1248 733
4 PWM1 145 58
17 PRC3 1248 896
5 GND3 293 58
18 PRC2 1248 1056
6 PRA3 430 87
19 PRC1 1248 1218
7 PRA2 563 87
20 PRC0 1248 1379
8 PRA1 696 87
21 PRD3 1248 1540
9 PRA0 829 87
22 PRD2 1248 1700
10 PRB3/Reset 962 87
23 PRD1 1248 1861
11 PRB2 1095 87
24 PRD0 1248 2022
12 Vdd1 1228 87
25 GND1 1248 2310
13 GND2 1248 272
ROM
2
5 6 7 8 9 12
10 11
13
14
15
PRD3
PRB1
Vdd2
OSC1
PRA2
PRA3 PRA1 Vdd1
PRB2
PRB3
PRA0
GND3
PW M2/Cout
Vdd3 1
3
4
PWM1
GND2
17
PRC0
(0,0)
16
PRB0
PRC1
PRD2
PRC2
PRC3
GND1
PRD0
PRD1
Chip Size : 1408 um x 2556 um
Pad Size : 80 um x 80 um
* The IC substrate must be connected to GND.
19
18
21
20
23
22
24
25
X
Y
APExx16 Series
Rev 1.1 2003/9/2
7
6.2 Bonding Diagram of APE8416 /APE10616 /APE12716
Pad # Pad Name X Y Pad # Pad Name X Y
1 GND4 76 404
14 PRA3 2109 76
2 GND3 59 294
15 GND2 2128 212
3 PWM1 59 146
16 GND1 1927 2204
4 Vdd3 183 59
17 PRD0 1765 2204
5 PWM2/Cout 467 59
18 PRD1 1603 2204
6 Vdd2 815 76
19 PRD2 1441 2204
7 OSC1 976 76
20 PRD3 1279 2204
8 PRB0/OSC2 1140 76
21 PRC0 1117 2204
9 PRB1/IR 1304 76
22 PRC1 955 2204
10 PRB2 1465 76
23 PRC2 739 2204
11 PRA0 1626 76
24 PRC3 631 2204
12 PRA1 1787 76
25 PRB3/Reset 469 2204
13 PRA2 1948 76
26 Vdd1 307 2204
ROM
2
5 6 7 8 9 12
10 11 13 14
15
18
PRC0
OSC1
Vdd2
GND2
PRB1
PRB0 PRB2 PRA3 PRA2
PRA1 PRA0
GND3
PW M2/Cout
GND4
1
Chip Size : 2288 um x 2364 um
Pad Size : 80 um x 80 um
* The IC substrate must be connected to GND.
3
4
PWM1
Vdd3
17
PRD3
(0,0)
22 21 20 19 16
25 24 23
26
GND1
PRD2
PRC1 PRD1 PRD0
Vdd1 PRB3 PRC3 PRC2
X
Y