Description
The A6263 is a linear, programmable current regulator providing
up to 100 mA from each of 4 outputs to drive arrays of high
brightness LEDs. Outputs can be connected in parallel or left
unused, as required. The regulated LED current from each
output, accurate to 5%, is set by a single reference resistor.
Current matching in each string is better than 10% without the
use of ballast resistors. Driving LEDs with constant current
ensures safe operation with maximum possible light output.
The IC provides protection against the following common
faults:
• LED string shorted to GND
• Single or multiple LED short
• LED string open
• IC pin open/short
• Overtemperature
If one LED string is open or shorted to ground, the offending
string is disabled, while other LED strings continue to work.
A temperature monitor is included to reduce the LED drive
current if the chip temperature exceeds a thermal threshold.
If necessary, this thermal derating threshold can be adjusted
or disabled.
The device comes in an 8-pin SOIC ( package LJ ) with exposed
pad for enhanced thermal dissipation. It is lead (Pb) free, with
100% matte tin leadframe plating.
A6263-DS, Rev. 1
Features and Benefits
▪AEC-Q100qualified
▪TotalLEDdrivecurrentupto400mA
▪Currentsharedequallyupto100mAbyupto4strings
▪Wideinputvoltagerangeof6to50Vforstart/stop,cold
crank, and load dump requirements
▪Lowdropoutvoltage
• LED current levels set by single reference resistor
• LED string shorted to GND protection
• Overtemperature protection with optional thermal
derating function
▪Automotivetemperaturerange
Applications:
Typical Application Diagram
A6263
Protected LED Array Driver
▪Automotiveinteriorandexteriorlighting
A6263 LA1
VIN
Automotive
12 V power net
LA2
LA3
LA4
100 mA
1 to 3 LEDs
in series
100 mA
100 nF
100 mA
100 mA
IREF
THTH
Light Switch
+
–
GND
PAD
Package: 8-pin SOICN with exposed
thermal pad (suffix LJ)
Not to scale
Figure 1. Typical application circuit
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Absolute Maximum Ratings*
Characteristic Symbol Notes Rating Unit
Input Supply Voltage VIN –0.3 to 50 V
Pins LA1 through LA2 –0.3 to 50 V
Pins IREF and THTH –0.3 to 6.5 V
Ambient Operating Temperature
Range TAK temperature range –40 to 125 °C
Maximum Continuous Junction
Temperature TJ(max) 150 °C
Transient Junction Temperature TtJ
Overtemperature event not exceeding 10 s, lifetime duration
not exceeding 10 h, guaranteed by design characterization 175 °C
Storage Temperature Range Tstg –55 to 150 °C
*Stresses beyond those listed in this table may cause permanent damage to the device. The Absolute Maximum ratings are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Characteristics table is not implied.
Exposure to Absolute Maximum-rated conditions for extended periods may affect device reliability.
Selection Guide
Part Number Ambient Operating
Temperature, TA (°C) Packing* Package
A6263KLJTR-T –40 to 125 3000 pieces per 13-in. reel 8-pin SOICN with exposed thermal pad
*Contact Allegro™ for additional packing options.
Thermal Characteristics*may require derating at maximum conditions, see application section for optimization
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance
(Junction to Ambient) RθJA
On 4-layer PCB based on JEDEC standard 35 ºC/W
On 2-layer generic test PCB with 0.8 in.2 of copper area each side 62 ºC/W
Package Thermal Resistance
(Junction to Pad) RθJP 2 ºC/W
*Additional thermal information available on the Allegro website.
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Terminal List Table
Number Name Function
1 THTH
Thermal Threshold. Short this pin to ground to disable
thermal derating feature, or leave open to enable. (Thermal
shutdown function is always enabled.)
2 IREF Connect a reference resistor between this pin and GND to
set the LED current.
3 LA1 LED anode (+) connection 1*
4 LA2 LED anode (+) connection 2*
5 LA3 LED anode (+) connection 3*
6 LA4 LED anode (+) connection 4*
7 VIN
Input power to the IC. All LED current sources are enabled
while VIN is above UVLO level. Decouple with a 0.1 µF
capacitor to GND near the IC.
8 GND IC ground reference. Connect to ground plane(s) of the
PCB using the shortest path possible.
–PAD
Exposed pad of the package providing enhanced thermal
dissipation. This pad must be connected to the ground
plane(s) of the PCB with at least 8 vias located directly in
the solder land for the pad.
* If any LAx pin is unused, tie it to the VIN pin. Do not leave it open or shorted to GND.
LA1
VIN
Current
Regulators
GND
PAD
Thermal
Monitor
Current Reference
LA2
LA3
LA4
THTH
IREF
Control
IREF
Overtemperature
LED Open
LED String
Short to GND
Fault
Control
Functional Block Diagram
Pin-out Diagram
1
2
3
45
6
7
8
PAD
THTH
IREF
LA1
LA2
GND
VIN
LA4
LA3
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Input Supply
Operating Input Voltage Range2VIN 6 – 50 V
VIN Quiescent Current IINQ LAx pins connected to VIN – – 10 mA
Startup Time3tON VIN > 7 V to ILA1 < –5 mA, RREF = 125 Ω – 20 – µs
Current Regulation
Reference Voltage VIREF 0.7 mA < IREF < 8.8 mA 1.15 1.2 1.25 V
Reference Current Ratio GH6 V < VIN < 40 V – 12.5 – A /A
Current Accuracy4EILAx –10 mA > ILAx > –100 mA –5 ±4 5 %
Current Matching5EIMLAx
–20 mA > ILAx > –100 mA, VLAx match to
within 1 V – 5 10 %
Output Current ILAx IREF = 8 mA –105 –100 –95 mA
Maximum Output Current ILAxmax IREF = 9.2 mA – – –110 mA
Minimum Drop-out Voltage VDO
VIN – VLAx , ILAx = –100 mA – – 800 mV
VIN – VLAx , ILAx = –40 mA – – 660 mV
Protection
Short Detect Voltage VSCD Measured at LAx 1.2 – 1.8 V
Short Circuit Source Current ISCS Short present from LAx to GND –2 –0.8 –0.5 mA
Short Release Voltage VSCR Measured at LAx – – 1.9 V
Short Release Voltage Hysteresis VSChys VSCR – VSCD 200 – 500 mV
Thermal Monitor Activation Temperature TJM TJ with ISEN = 90% 95 115 130 °C
Thermal Monitor Slope dISEN/dTJISEN = 50% –3.5 –2.5 –1.5 %/°C
Thermal Monitor Low Current
Temperature TJL TJ at ISEN = 25% 120 135 150 °C
Overtemperature Shutdown TJF Temperature increasing – 170 – °C
Overtemperature Hysteresis TJhys Recovery = TJF – TJhys – 15 – °C
1For input and output current specifications, negative current is defined as coming out of (sourcing) the specified device pin.
2Function is correct but parameters are not guaranteed outside the general limits (7 to 40 V).
3Ensured by design and characterization, not production tested.
4EILAx = 100 × [( | ILAx | × RREF / 15 ) –1], with ILAx in mA and RREF in kΩ.
5EIMLA = 100 × max ( | ILAx– ILA(AV) | ) / ILA(AV) , where ILA(AV) is the average current of all active outputs.
ELECTRICAL CHARACTERISTICS1 Valid at TA = 25°C, VIN = 7 to 40 V;indicates specifications valid across the full operating
temperature range with TA = TJ = –40°C to 125°C and typical specifications at TA = 25°C; unless otherwise specified
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
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Functional Description
The A6263 is a linear current regulator that is designed to pro-
vide drive current and protection for parallel strings of series-
connected high brightness LEDs. It provides up to 4 matched pro-
grammable current outputs at up to 100 mA, with low minimum
dropoutvoltagesbelowthemainsupplyvoltage.For12Vpower
net applications, optimum performance is achieved when driving
4 strings of 1 to 3 LEDs, at current up to 100 mA per string.
Current regulation is maintained and the LEDs protected during a
short-to-ground at any point in the LED string. A short-to-ground
on any regulator output terminal disables that offending string
only. Similarly, in the case of an open output pin or an open-LED
fault, all other LED strings remain in regulation. Individual out-
putscanbedisabledbyconnectingtheoutputtoVIN.Multiple
outputs can be connected in parallel to drive higher current LED
strings.
Integrated thermal management reduces the regulated current
level at high internal junction temperatures to limit power dis-
sipation. This thermal threshold is programmable and can be
disabled if necessary.
Pin Functions
VIN Supply to the control circuit and current regulators. A small
value ceramic bypass capacitor, typically 100 nF, should be con-
nected from close to this pin to the GND pin.
GND Ground reference connection. Should be connected directly
to the ground plane of the circuit board.
IREF1.2VreferencetosetLEDcurrent.Connectresistor,RREF
,
to GND to set reference current and thereby LED current.
THTH Sets the thermal monitor threshold, TJM
, where the output
current starts to reduce with increasing temperature. Connecting
THTH directly to GND will disable the thermal monitor function.
LA[1:4] Current source connected to the anode of the first LED
ineachstring.ConnectdirectlytoVINtodisabletherespective
output. In this document “LAx” indicates any one of the outputs.
LED Current Level
The LED current is controlled by 4 matching linear current regu-
lators,betweentheVINpinandeachoftheLAxoutputs.The
basic equation that determines the nominal output current at each
LAx pin is:
ILAx =
RREF
15
(1)
where ILAxisinmAandRREFisinkΩ.
The output current may be reduced from the set level by the ther-
mal monitor circuit.
Conversely the reference resistors may be calculated from:
ILAx
=
RREF
15
(2)
where ILAxisinmAandRREFisinkΩ.
For example, where the required current is 90 mA for both chan-
nels the resistor value will be:
90
= =
RREF 0.167 kΩ
15
These equations completely define the output currents with
respect to the setting resistors. However, for further reference, a
more detailed description of the internal reference current calcu-
lations is included below.
It is important to note that because the A6263 is a linear regu-
lator, the maximum regulated current is limited by the power
dissipation and the thermal management in the application. All
current calculations assume adequate heatsinking for the dissi-
pated power. Thermal management is at least as important as the
electrical design in all applications. In high current high ambient
temperature applications the thermal management is the most
important aspect of the systems design. The application section
below provides further detail on thermal management and the
associated limitations.
Operation with Fewer LED Strings or Higher Currents
The A6263 may be configured to use fewer than all four LED
strings, either by connecting outputs together for higher currents,
orbyconnectingtheoutputdirectlytoVINtodisabletheregula-
tor for that output. It is also acceptable, though not recommended,
to leave an unused LAx pin floating.
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Safety Features
The A6263 includes several features to ensure safe operation and
to protect the LEDs and the IC:
•ThecurrentregulatorsbetweenVINandeachLAxoutputpro-
vide a natural current limit due to the regulation.
• Each LAx output includes a short-to-ground detector that will
disable the output to limit the dissipation.
• An open circuit on any output will disable the affected string
only.
• The thermal monitor reduces the regulated current as the tem-
perature rises above a programmable thermal threshold.
• Thermal shutdown completely disables the outputs under ex-
treme overtemperature conditions.
Temperature Monitor
A temperature monitor function reduces the LED current as the
silicon junction temperature of the IC increases (see figure 2). By
mounting the A6263 on the same thermal substrate as the LEDs,
this feature can also be used to limit the dissipation of the LEDs.
As the junction temperature of the A6263 increases, the regulated
current level is reduced, reducing the dissipated power in the
A6263 and in the LEDs. The current is reduced from the 100%
level at typically 2.5% per degree Celsius until the point at which
the current drops to 25% of the full value, defined at TJL
. Above
this temperature the current will continue to reduce at a lower
rate until the temperature reaches the overtemperature shutdown
threshold temperature, TJF.
The temperature at which the current reduction begins can be
adjustedbychangingthevoltageontheTHTHpin.WhenTHTH
is left open the temperature at which the current reduction begins
is defined as the thermal monitor activation temperature, TJM,
and is specified, in the Electrical Characteristics table, at the 90%
current level.
TJMwillincreaseasthevoltageattheTHTHpin,VTHTH , is
reduced and is defined as approximately:
0.0039
=
TJM (°C)
1.46 –VTHTH
(3)
AresistorconnectedbetweenTHTHandGNDwillreduceVTHTH
and increase TJM . A resistor connected between THTH and a refer-
encesupplygreaterthan1VwillincreaseVTHTH and reduce TJM .
Figure 3 shows how the nominal value of the thermal monitor
activation temperature varies with the voltage at THTH and with
eitherapull-downresistor,RTH, to GND or with a pull-up resis-
tor,RTH
,to3Vandto5V.
In extreme cases, if the chip temperature exceeds the overtem-
perature limit, TJF
, all regulators will be disabled. The tempera-
ture will continue to be monitored and the regulators re-activated
when the temperature drops below the threshold provided by the
specified hysteresis.
100
80
60
40
20
0
TJM
TJL
TJF
90
25
70 90 110
Junction Temperature, TJ (°C)
Relative Sense Current (%)
130 150 170
Figure 2. Temperature monitor current reduction
250
200
150
100
50
0
1.3
1.2
1.1
1.0
0.9
0.8
VTHTH
70 80 90 110100
Thermal Monitor Activation Temperature, TJM (°C)
RTH (kΩ)
VTHTH (V)
130120 150140
RTH pull-up
to 5 V
RTH pull-up
to 3 V
RTH pull-down
to GND
Figure 3. TJM versus a pull-up or pull-down resistor, RTH, and VTHTH
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Fault Cases
Case A: Any LED cathode short to GND
Outcome: IC continues to regulate current through all
LED strings. Current matching may suffer.
Case B: LAx pin or high-side of LED string
shorted to GND
Outcome: IC detects pin-to-GND short before
enabling current regulators. Offending LED
string disabled. All other strings remain active.
Case C: Single LED in a string shorted
Outcome: IC continues to regulate current through
all LED strings. Current matching may suffer.
Case D: Short between LED strings
Outcome: LED current regulators continue to
operate normally, but current matching between
LED strings will be affected.
Case E: LAx pin or high-side of LED string
open
Outcome: No current through the offending
LED string. All other strings remain active.
A6263
LA1
VIN
GND
LA2
LA3
LA4
A6263
LA1
VIN
GND
LA2
LA3
LA4
A6263
LA1
VIN
GND
LA2
LA3
LA4
A6263
LA1
VIN
GND
LA2
LA3
LA4
A6263
LA1
VIN
GND
LA2
LA3
LA4
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Application Information
Power Dissipation
The most critical design considerations when using a linear regu-
lator such as the A6263 are the power produced internally as heat
and the rate at which that heat can be dissipated.
There are three sources of power dissipation in the A6263:
• The quiescent power to run the control circuits
• The power in the reference circuit
• The power due to the regulator voltage drop
The elements relating to these dissipation sources are illustrated
in figure 4.
Quiescent Power The quiescent power is the product of the
quiescent current, IINQ
,andthesupplyvoltage,VIN , and is not
related to the regulated current. The quiescent power, PQ, is there-
fore defined as:
PQ = VIN × IINQ (4)
Reference Power The reference circuit draws the reference
current from the supply and passes it through the reference resis-
tor to ground. The reference current is 8% of the output current
on any one active output. The reference circuit power is the prod-
uct of the reference current and the difference between the supply
voltageandthereferencevoltage,typically1.2V.Thereference
power, PREF , is therefore defined as:
PREF =
RREF
(VIN – VREF) × VREF
(5)
Regulator Power In most application circuits the largest dis-
sipation will be produced by the output current regulators. The
power dissipated in each current regulator is simply the product
of the output current and the voltage drop across the regulator.
The total current regulator dissipation is the sum of the dissipa-
tion in each output regulator. The regulator power for each output
is defined as:
PREGx =(VIN – VLEDx ) × ILEDx
(6)
where x is 1, 2, 3, or 4.
Notethatthevoltagedropacrosstheregulator,VREG, is always
greaterthanthespecifiedminimumdrop-outvoltage,VDO
. The
output current is regulated by making this voltage large enough
to provide the voltage drop from the supply voltage to the total
forwardvoltageofallLEDsinseries,VLED .
The total power dissipated in the A6263 is the sum of the qui-
escent power, the reference power, and the power in each of the
four regulators:
P
DIS
=P
Q
+ P
REF
+ PREGA + PREGB + PREGC + PREGD
(7)
The power that is dissipated in each string of LEDs is:
PLEDx =VLEDx × ILEDx
(8)
wherexisA,B,C,orD,andVLEDx is the voltage across all
LEDs in the string.
From these equations it can be seen that, if the power in the
A6263 is not limited, then it will increase as the supply voltage
increases but the power in the LEDs will remain constant.
Figure 4. Internal power dissipation sources.
A6263
LAx
ILAx
IINQ
IREF
VIN
GND
IREF
RREF
VREF
VLED
VREG
VIN
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Dissipation Limits
There are two features limiting the power that can be dissipated
by the A6263: thermal shutdown and thermal foldback.
Thermal Shutdown If the thermal foldback feature is disabled
by connecting the THTH pin to GND, or if the thermal resistance
from the A6263 to the ambient environment is high, then the
silicon temperature will rise to the thermal shutdown threshold
and the current will be disabled. After the current is disabled the
powerdissipatedwilldropandthetemperaturewillfall.When
the temperature falls by the hysteresis of the thermal shutdown
circuit, then the current will be re-enabled and the temperature
will start to rise again. This cycle will repeat continuously until
the ambient temperature drops or the A6263 is switched off. The
period of this thermal shutdown cycle will depend on several
electrical, mechanical, and thermal parameters, and could be from
a few milliseconds to a few seconds.
Thermal Foldback If there is a good thermal connection to the
A6263, then the thermal foldback feature will have time to act.
This will limit the silicon temperature by reducing the regulated
current and therefore the dissipation. The thermal monitor will
reduce the LED current as the temperature of the A6263 increases
above the thermal monitor activation temperature, TJM .
Thermal Dissipation
The amount of heat that can pass from the silicon of the A6263
to the surrounding ambient environment depends on the thermal
resistance of the structures connected to the A6263. The thermal
resistance,RθJA
, is a measure of the temperature rise created by
power dissipation and is usually measured in degrees Celsius per
watt(°C/W).
Thetemperaturerise,ΔT,iscalculatedfromthepowerdissipated,
PD
,andthethermalresistance,RθJA
, as:
ΔT = PD × RθJA (9)
Athermalresistancefromsilicontoambient,RθJA
, of approxi-
mately35°C/WcanbeachievedbymountingtheA6263ona
standardFR4double-sidedprintedcircuitboard(PCB)witha
copper area of a few square inches on each side of the board
under the A6263. Additional improvements in the range of 20%
may be achieved by optimizing the PCB design.
Optimizing Thermal Layout
The features of the printed circuit board, including heat conduc-
tion and adjacent thermal sources such as other components,
have a very significant effect on the thermal performance of the
device. To optimize thermal performance, the following should
be taken into account:
• The device exposed thermal pad should be connected to as
much copper area as is available.
• Copper thickness should be as high as possible (for example,
2 oz. or greater for higher power applications).
• The greater the quantity of thermal vias, the better the dissipa-
tion. If the expense of vias is a concern, studies have shown
that concentrating the vias directly under the device in a tight
pattern, as shown in figure 5, has the greatest effect.
• Additional exposed copper area on the opposite side of the
board should be connected by means of the thermal vias. The
copper should cover as much area as possible.
• Other thermal sources should be placed as remote from the
device as possible
Ø0.3 mm via
Top-layer
exposed copper
Signal traces
LJ package
exposed
thermal pad
LJ package
footprint
0.7 mm
0.7 mm
Figure 5. Suggested PCB layout for thermal optimization
(maximum available bottom-layer copper recommended)
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Package LJ, 8-Pin SOICN with Exposed Thermal Pad
3.30
2
1
8
Reference land pattern layout (reference IPC7351
SOIC127P600X175-9AM); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
PCB Layout Reference View
C
1.27
5.602.41
1.75
0.65
2.41 NOM
3.30 NOM
C
SEATING
PLANE
1.27 BSC
GAUGE PLANE
SEATING PLANE
ATerminal #1 mark area
B
C
B
21
8
C
SEATING
PLANE
C0.10
8X
0.25 BSC
1.04 REF
1.70 MAX
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
4.90 ±0.10
3.90 ±0.10 6.00 ±0.20
0.51
0.31 0.15
0.00
0.25
0.17
1.27
0.40
8°
0°
Exposed thermal pad (bottom surface)
A
Branded Face
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For the latest version of this document, visit our website:
www.allegromicro.com
Copyright©2012-2015,AllegroMicroSystems,LLC
AllegroMicroSystems,LLCreservestherighttomake,fromtimetotime,suchdeparturesfromthedetailspecificationsasmayberequiredto
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
Theinformationincludedhereinisbelievedtobeaccurateandreliable.However,AllegroMicroSystems,LLCassumesnoresponsibilityforits
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Revision History
Revision Revision Date Description of Revision
1 June 25, 2015 Temperature Monitor text on page 6 updated to match EC table: derating slope is -2.5% per °C
