4-160
FAST AND LS TTL DATA
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
The MC54/74F353 is a dual 4-input multiplexer with 3-state outputs. It can
select two bits of data from four sources using common Select inputs. The out-
puts may be individually switched to a high impedance state with a HIGH on
the respective Output Enable (OE) inputs, allowing the outputs to interface di-
rectly with bus-oriented systems.
•Inverted Version of F253
•Multifunction Capability
•Separate Enables for Each Multiplexer
FUNCTIONAL DESCRIPTION
The MC54/74F353 contains two identical 4-input multiplexers with 3-state
outputs. They select two bits from four sources selected by common Select
inputs (S0, S1).The 4-input multiplexers have individual Output enable (OEa,
OEb) inputs which, when HIGH, force the outputs to a high impedance (high
Z) state. The logic equations for the outputs are shown below:
Za=OEa • (I0a • S1 • S0 +I1a • S1 • S0 + I2a • S1 • S0 + I3a • S1 • S0)
Zb=OEb• (I0b • S1 • S0 + I1b • S1 • S0 + I2b•S1•S0+I3b•S1•S0)
If the outputs of 3-state devices are tied together, all but one device must
be in the high impedance state to avoid high currents that would exceed the
maximum ratings. Designers should ensure that Output Enable signals to
3-state devices whose outputs are tied together are designed so that there is
no overlap.
CONNECTION DIAGRAM (TOP VIEW)
1516 14 13 12 11 10
21 3 4 5 6 7
VCC
9
8
OEbS0I3b I2b I1b I0b Zb
OEaS1I3a I2a I1a I0a ZaGND
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
MC54/74F353
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16 1
16
1
ORDERING INFORMATION
MC54FXXXJ Ceramic
MC74FXXXN Plastic
MC74FXXXD SOIC
16 1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
2 14
1
6
5
4
3
10
11
12
13
15
9
7Za
Zb
S1S0
OEa
I0a
I1a
I2a
I3a
I0b
I1b
I2b
I3b
OEb
VCC = PIN 16
GND = PIN 8
4-161
FAST AND LS TTL DATA
MC54/74F353
FUNCTION TABLE
Select
Inputs Data Inputs Output
Enable Output
S0S1I0I1I2I3OE Z
X X X X X X H (Z)
L L L X X X L H
L L H X X X L L
H L X L X X L H
H L X H X X L L
L H X X L X L H
L H X X H X L L
H H X X X L L H
H H X X X H L L
Address inputs S0 and S1 are common to both sections.
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High Impedance
LOGIC DIAGRAM
OEbI3b I2b I1b I0b S0S1I3a I2a I1a I0a OEa
Za
Zb
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
VCC Supply Voltage 54, 74 4.5 5.0 5.5 V
TAOperating Ambient Temperature Range
54 –55 25 125
°C
A
74 0 25 70
IOH Output Current High 54, 74 –3.0 mA
IOL Output Current Low 54, 74 24 mA
4-162
FAST AND LS TTL DATA
MC54/74F353
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
VIH Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage
VIL Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage
VIK Input Clamp Diode Voltage –1.2 V IIN = –18 mA VCC = MIN
VOH Output HIGH Voltage 54, 74 2.4 3.3 V IOH = –3.0 mA VCC = 4.5 V
74 2.7 3.3 V IOH = –3.0 mA VCC = 4.75 V
VOL Output LOW Voltage 0.35 0.5 V IOL = 24 mA VCC = MIN
IOZH Output OFF Current — HIGH 50 µA VOUT = 2.7 V VCC = MAX
IOZL Output OFF Current — LOW –50 µA VOUT = 0.5 V VCC = MAX
IIH Input HIGH Current 20 µA VIN = 2.7 V VCC = MAX
100 VIN = 7.0 V
IIL Input LOW Current –0.6 mA VIN = 0.5 V VCC = MAX
IOS Output Short Circuit Current (Note 2) –60 –150 mA VOUT = 0 V VCC = MAX
ICCH 9.3 14 In, Sn, OEn = GND
ICCL Power Supply Current 13.3 20 mA In, Sn = GND VCC = MAX
ICCZ 15 23 OEn = 4.5 V
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable device type.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
54/74F 54F 74F
TA = +25°C TA = - 55°C to + 125°C TA = 0°C to + 70°C
VCC = +5.0 V VCC = 5.0 V ± 10% VCC = 5.0 V ± 10%
CL = 50 pF CL = 50 pF CL = 50 pF
Symbol Parameter Min Max Min Max Min Max Unit
tPLH Propagation Delay 3.5 11 3.0 14 3.0 12.5 ns
tPHL Sn to Zn3.0 8.5 2.5 11 2.5 9.5
tPLH Propagation Delay 2.5 7.0 2.0 9.0 2.0 8.0 ns
tPHL In to Zn1.0 3.5 1.0 5.0 1.0 4.0
tPZH Output Enable Time 3.0 8.0 3.0 10.5 3.0 9.0
tPZL 3.5 8.0 3.0 10.5 3.0 9.0
tPHZ Output Disable Time 2.0 5.0 2.0 7.0 1.5 6.0 ns
tPLZ 2.0 6.0 1.5 8.0 1.5 7.0
