NJU26208 SRS CS Auto & CSII II 5.1 & TruSurround XT Decoder General Description The NJU26208 is a digital signal processor that provides the function of Circle Surround Automotive / Circle SurroundII5.1 / TruSurroundXT and Mono-to-Stereo. The NJU26208 processes the stereo matrix-encoded signal into spacious sound of 5.1channels by Circle SurroundII5.1. Also non matrix-encoded audio signal can be processed into effective spacious sound. The decoded 2-channel signal can be converted into spacious 2-channel virtual surround output by the TruSurroundXT technology. The applications of NJU26208 are suitable for multi-channel products such as DVD Receivers, AV Amplifiers, TV, Car Audio or ordinary audio products such as small speakers system. Package NJU26208V FEATURES - Software * SRS Circle Surround Automotive for Car Audio * 5.1-Channel signal outputs by Circle Surround II 5.1 * 2-Channel outputs by SRS TruSurround XT * Speaker sound elevation by Focus * Rich low frequency reproduction by TruBass * Generating 5.1-channel outputs from mono signal by Mono-To-Stereo function - Hardware * 24bit Fixed-point Digital Signal Processing * Maximum Clock Frequency : 12.288MHz(Standard), built-in PLL Circuit * Digital Audio Interface : 4 Input ports / 3 Output ports * Digital Audio Format : I2S, Left- justified, Right-justified, 16/18/20/24 bit, BCK : 32/64fs * Master / Slave Mode : In Master mode, MCK = 256fs, MCK2 = 512fs * Serial Host Interface : I2C-Bus (Standard-mode/100kbps, Fast-mode/400kbps) : 4-Wire Serial Bus (Clock, Enable, Input data, Output data) * Power Supply : VDD = VDDPLL = 1.8V : VDDIO = 3.3V * Input terminal : 5.0V Input tolerant * Package : SSOP44 (Pb-Free) * The detail hardware specification of the NJU26208 is described in the " NJU26200 Series Hardware Data Sheet". Ver.2008-12-01 -1- NJU26208 Block Diagram AD1/SDIN SCL/SCK SDA/SDOUT NJU26208 AD2/SSb 24bit Fixed-point DSP Core SERIAL HOST INTERFACE BCKO PROGRAM CONTROL LRO 24-BIT x 24-BIT MULTIPLIER ALU RESETb MCK CLK CLKOUT TIMING GENERATOR / PLL SERIAL AUDIO INTERFACE SDI* L/R SDO1 C/SW SDO2 BCKI ADDRESS GENERATION UNIT SL/SR SDO3 LRI DATA RAM FIRMWARE ROM PROC General I/O INTERFACE MUTEb SEL WDC Fig.1 NJU26208 Hardware Block Diagram -2- Ver.2008-12-01 NJU26208 Function Block Diagram NJU26208 Block Diagram (Stereo input mode) Pink Noise Generator LPF for (L+R) SDI1 TruBass (SW) TruBass (L/R) TruBass (SL/SR) Focus (L/R, SL/SR) Automotive Proc. (CSII only) 2ch Stereo / 4ch Stereo / Passive Matrix 5ch Delay (SL/SR) Dialog Clarity (Center) Input Trimmer Circle Surround II Decoder SW Trim TruSurround C/SW SL/SR L/R Output Trimmer (Master & Each Channels) Mono To Stereo SDI0 SDO1 SDO2 SDO3 WatchDog Output Smooth Control WDC Fig.2 Function Block Diagram (Stereo Input Mode) NJU26208 Block Diagram (Multi Input Mode) SDI1 Pink Noise Generator LPF for (L+R) Mix to SW Trim L/R/SW Delay L/R or SL/SR TruSurround SL/SR output source select TruBass (SW) TruBass (L/R) TruBass (SL/SR) SDI3 Focus (L/R, SL/SR) SL/SR Dialog Clarity (Center) SDI2 Input Trimmer C/SW C/SW SL/SR L/R Output Trimmer (Master & Each Channels) Mono To Stereo L/R SDI0 SDO1 SDO2 SDO3 WatchDog Output WDC Smooth Control Fig.3 Function Block Diagram (Multi Input Mode) Ver.2008-12-01 -3- NJU26208 Pin Configuration (SSOP44) SDI3 1 44 VDD SDI2 2 43 VSS SDI1 3 42 VSSIO SDI0 4 41 VDDIO LRI 5 40 TEST VDDIO 6 39 SDO1 BCKI 7 38 SDO2 VSS 8 37 SDO3 VDD 9 36 LRO TEST 10 35 BCKO MUTEb 11 34 MCK WDC 12 33 VDDIO PROC 13 32 SDA/SDOUT VSSIO 14 31 SCL/SCK VDDIO 15 30 AD2/SSb SEL 16 29 AD1/SDIN VDDPLL 17 28 TEST VSSPLL 18 27 TEST VSS 19 26 TEST VDD 20 25 RESETb CLKOUT 21 24 VDDIO CLK 22 23 VSSIO NJU26208 SSOP44 Fig. 4 Pin Configuration -4- Ver.2008-12-01 NJU26208 Pin Description Table 1 Pin Description Pin No. Symbol SSOP44 6, 15, 24, 33, 41 VDDIO 7 BCKI 14, 23, 42 VSSIO 8, 19, 43 VSS 9, 20, 44 VDD 10 TEST 11 MUTEb * 12 WDC * 13 PROC * 16 SEL 17 VDDPLL 18 VSSPLL 21 CLKOUT 22 CLK 25 RESETb 26 TEST 27, 28 TEST 29 AD1/SDIN 30 AD2/SSb 31 SCL/SCK 32 SDA/SDOUT 34 MCK 35 BCKO 36 LRO 37 SDO3 38 SDO2 39 SDO1 40 SDO0 1 SDI3 2 SDI2 3 SDI1 4 SDI0 5 LRI I : Input O : Output OD : Open Drain Output I/O : Bi-directional I/O I I I OD I I O I I I I I I I I/O O O O O O O O I I I I I Description I/O Power Supply +3.3V Bit Clock Input I/O GND Core GND Core Power Supply +1.8V for test (connected to VSSIO through 3.3k resistance.) Master Volume level, After Reset DSP ("1" : 0dB , "0" : Mute) Clock for Watch Dog Timer (Open Drain Output) After Reset DSP. ( "1" : Normal , "0" : Wait from Command ) 2 2 Select I C or Serial bus ( `1' : Serial , `0' : I C-Bus) PLL Analog Power Supply +1.8V PLL Analog GND OSC Output X'tal Clock Input (12.288MHz) Reset (RESETb='0' : DSP Reset) for Test (Connect to VDDIO) for Test (Connect to VSSIO) 2 I C Address / Serial Input 2 I C Address / Serial Enable 2 I C Clock / Serial Clock 2 I C I/O (Open Drain output) / Serial Output (CMOS output) 2 I C Bus mode : SDA pin requires a pull-up resistance. 4-wire Serial mode : SDOUT does not require a pull-up resistance. Master Clock Output (buffer output of a CLK pin) Bit Clock Output LR Clock Output Audio Data Output 3 ( Rear Lch / Rch ) Audio Data Output 2 ( Center / Subwoofer ) Audio Data Output 1 ( Front Lch / Rch ) for Test ( Not connected : OPEN ) Audio Data Input 3 ( SL / SR ) Audio Data Input 2 ( Center / Subwoofer) Audio Data Input 1 ( Front Lch / Rch ) Audio Data Input 0 ( Front Lch / Rch ) LR Clock Input Note : Pins symbol with * : Connect with VDDIO or VSSIO through 3.3k resistance Ver.2008-12-01 -5- NJU26208 Audio Interface The serial audio interface carries audio data to and from the NJU26208. Industry standard serial data formats of I2S, MSB-first left-justified or MSB-first right-justified are supported. The NJU26208 serial audio interface includes 4 data input lines: SDI0/SDI1/SDI2/SDI3 and 3 data output lines: SDO1/SDO2/SDO3. (Table 2. 3.) Table 2 Serial Audio Input Pin Description Pin No. SSOP44 4 3 2 1 Symbol SDI0 SDI1 SDI2 SDI3 Description Stereo Input Mode Multi channel Input Mode Stereo L/R (SDI0 / SDI1 Pin select) No use No use Stereo L/R (SDI0 / SDI1 Pin select) Audio Data Input 2 Center / Sub Woofer Audio Data Input 3 SL / SR (Surround channel) Table 3 Serial Audio Output Pin Description Pin No. Symbol Description SSOP44 39 SDO1 Audio Data Output 1 38 SDO2 Audio Data Output 2 37 SDO3 Audio Data Output 3 Front Lch / Rch Center / Sub Woofer Rear Lch / Rch Host Interface The NJU26208 can be controlled via Serial Host Interface (SHI) using either of two serial bus format : 4-Wire serial bus or I2C-Bus. Data transfers are in 8 bit packets (1 byte) when using either format. The SEL pin controls the serial bus mode. When the SEL is "Low" level during the NJU26208 initialization, I2C-Bus is available. When the SEL is "High" level during the NJU26208 initialization, 4-Wire serial bus is available.(Table 4) Serial Host Interface Pin Description. (Table 5) Table 4 Serial Host Interface Pin Description Pin No. SSOP44 16 Symbol Setting Host Interface SEL "Low" "High" I2C-Bus 4-Wire serial bus Table 5 Serial Host Interface Pin Description Pin No. Symbol 2 I C-Bus Format 2 (I C /Serial) SSOP44 29 30 31 4-Wire Serial bus Format 2 Serial Data Input I C-Bus address Bit1 2 I C-Bus address Bit2 SLAVE Select Serial Clock Serial Clock Serial Data Input/Output Serial Data Output 32 SDA / SDOUT (Open Drain output) (CMOS output) Note: When 4-Wire Serial bus is selected, The SDA/SDOUT pin is CMOS output. The SDOUT pin does not require a pull-up resistance. 2 When I C Bus is selected, this pin is a bi-directional Open Drain output. This pin, which is assigned for 2 I C-Bus, requires a pull-up resistance. The SDA/SDOUT pin isn't +5.0V Input tolerant. Please note the voltage level (Max voltage is VDDIO). -6- AD1 / SDIN AD2 / SSb SCL / SCK Ver.2008-12-01 NJU26208 I2C-Bus When the NJU26208 is configured for I2C bus communication in SEL="Low", the serial host interface transfers data on the SDA pin and clocks data on the SCL pin. SDA is an open drain pin requiring a pull-up resistance. Pins AD1 and AD2 are used to configure the seven-bit SLAVE address of the serial host interface. (Table 6) 2 Table 6 I C-Bus Interface Slave address bit7 0 0 0 0 bit6 0 0 0 0 bit5 1 1 1 1 Start bit bit4 1 1 1 1 bit3 1 1 1 1 AD2 AD1 bit2 0 0 1 1 bit1 0 1 0 1 R/W bit Slave Address ( 7bit ) R/W bit0 R/W ACK * SLAVE address is 0 when AD1/2 is "Low". SLAVE address is 1 when AD1/2 is "High". Note: The serial host interface supports "Standard-Mode (100kbps)" and "Fast-Mode (400kbps)" I2C bus data transfer. Moreover, after sending S ("START" condition), Sr (repeated "START" condition) is not received but it becomes the waiting for the P ("STOP" condition). Therefore, please be sure to send P ("STOP" condition). 4-Wire Serial Interface The serial host interface can be configured for 4-Wire Serial bus communication by setting SEL1="High" during the Reset Sequence initialization. SHI bus communication is full-duplex; a write byte is shifted into the SDIN pin at the same time that a read byte is shifted out of the SDOUT pin. Data transfers are MSB first and are enabled by setting SSb = "Low". Data is clocked into SDIN on rising transitions of SCK. Data is latched at SDOUT on falling transitions of SCK except for the first byte (MSB) that is latched on the falling transitions of SSb. The SDOUT pin is always CMOS output. This pin does not require a pull-up resistance. SSb SCK bit7 SDIN bit6 bit5 bit1 MSB SDOUT unstable bit7 bit0 LSB bit6 bit5 bit1 bit0 unstable Fig. 5 4-Wire Serial Interface Timing Note : When the data-clock is less than 8 clocks, the input data is shifted to LSB side and is sent to the DSP core at the transition of SSb="High". When the data-clock is more than 8 clocks, the last 8 bit data becomes valid. After sending LSB data, SDOUT transmits the MSB data which is received via SDIN until SSb becomes "High". Ver.2008-12-01 -7- NJU26208 Pin setting The NJU26208 operates default command setting after resetting the NJU26208. In addition, the NJU26208 restricts operation at power on by setting PROC pin and MUTEb pin. These pins are input pin. However, these pins operate as bi-directional pins. Connect with VDDIO or VSSIO through 3.3k resistance. Table 7 Pin setting Pin No. SSOP44 Symbol Setting 13 PROC "High" "Low" 11 MUTEb "High" "Low" Function The NJU26208 operates default setting after reset. The NJU26208 does not operate after reset. Sending start command is required for starting operation. Master volume is set 0dB after reset. Master volume is set mute after reset. WatchDog Clock The NJU26208 outputs clock pulse through WDC during normal operation. The WDC clock is useful to check the status of the NJU26208 operation. For example, a microcomputer monitors the WDC clock and checks the status of the NJU26208. When the WDC clock pulse is lost or not normal clock cycle, the NJU26208 does not operate correctly. Then reset the NJU26208 and set up the NJU26208 again. The WDC clock is able to be variable for 32ms to 640ms by command. Default setting of WDC clock is 192ms. The WDC pin is open drain output. The WDC pin setting (Table 8) Table 8 WDC pin setting Pin No. SSOP44 12 Symbol WDC Setting WDC pin is used. Connect with VDDIO through 3.3k resistance WDC pin is not used. Connect with VSSIO through 3.3k resistance. Do not open WDC pin. Note: The cycle of WDC output is rough. Because WDC output inserts in the process of sound processing. In slave mode, when there is no input of BCKI/LRI, the WDC pin can't output. It is required to set up a sampling rate correctly. -8- Ver.2008-12-01 NJU26208 Host command Table 9. NJU26208 command table No. Command 1 Set Task 2 CSII mode 3 CS Automotive 4 TruBass config 5 TruBass size select 6 TruBass gain control 7 Focus config 8 Focus gain control 9 Stereo mode select 10 PNG config 11 SW LPF cutoff select 12 TruSurround Config 13 TruSurround Downmix mode select 14 TruSurround gain control 15 Gain control 16 Mono Input Select 17 Sample Rate 18 Delay 19 System Status 20 Watch Dog config 21 Smooth control config. 22 Re initialize 23 Version Number 24 Function enable/disable 25 Reset 26 NOP Notes : In respect to detail command information, request New Japan Radio Co., Ltd. and permission of a licenser (SRS Labs.) is required. Ver.2008-12-01 -9- NJU26208 Package Dimensions SSOP44, Pb Free + 0.3 11. 0 0.1 0 1 0 44 1 0. 5 0 .2 7. 6 0 .3 5. 6 0 .2 23 22 0 .5 0.1 0. 2 0 .1 - 10 - 0 .1 + 0.10 0.15 0.05 + 0.10 0. 10 .05 1.1 5 0 .1 0.75 MAX M Ver.2008-12-01 NJU26208 License Information 1. The "Circle Surround Automotive","Circle SurroundII5.1", "TruSurroundXT", "FOCUS", "TruBass" technology rights incorporated in the NJU26208 are owned by SRS Labs, a U.S. Corporation and licensed to New Japan Radio Co., Ltd.. Purchaser of NJU26208 must sign a license for use of the chip and display of the SRS Labs trademarks. Any products incorporating the NJU26208 must be send to SRS Labs for review. "Circle Surround Automotive","Circle SurroundII5.1", "TruSurroundXT", "FOCUS", "TruBass" are protected under US and foreign patents issued and/or pending. "Circle Surround Automotive","Circle SurroundII5.1", "TruSurroundXT", "FOCUS", "TruBass", SRS and symbol are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase of the NJU26208, nor the corresponding sale of audio enhancement equipment conveys the right to sell commercialized recordings made with any SRS technology. SRS Labs requires all set marks to comply with all rules and regulations as outlined in the SRS Trademark Usage Manual separately provided. For further information, please contact:: SRS Labs, Inc. 2909 Daimler Street. Santa Ana, CA 92705 USA Tel: 949-442-1070 Fax: 949-852-1099 http://www.srslabs.com [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2008-12-01 - 11 - Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: NJR: NJU26208V-TE2