MDS300-11A 1 Revision 11118 Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
ICROCLOCK ICS300-11
QTClock™ 125 MHz Clock Synthesizer
• Packaged in 8 pin SOIC
• Output clock frequency of 125 MHz at 3.3V
• Input crystal or clock frequency of 20 MHz
• Internal multiplier of 6.25
• Quick turn frequency programming allows
production in two to four weeks
• Low jitter - 20 ps one sigma typical
• Duty cycle of 45/55
• Full CMOS level outputs with 25 mA drive
capability at TTL levels
• Tri-state output + PLL power down pin
• Advanced, low power CMOS process
The ICS300-11 QTClock™ generates a high
quality, 125 MHz clock output from a 20 MHz
crystal or clock input. It is designed to replace
crystal oscillators in most electronic systems. The
ICS300 contains a One Time Programmable
(OTP) ROM which, in the -11 version, is factory
programmed with the PLL divider values to
output 125 MHz. Using Phase-Locked-Loop
(PLL) techniques, the device runs from a standard
fundamental mode, inexpensive crystal or clock. It
is smaller and less expensive than a single
125 MHz oscillator.
Block Diagram
Description Features
125 MHz
Crystal
Oscillator
VDD GND
PLL
Clock
Synthesis
and Control
Circuitry
Output
Buffer
20 MHz crystal
or clock
X2
X1/ICLK
PDTS (output and PLL)
OTP
ROM
with PLL
Divider
Values
MDS300-11A 2 Revision 11118 Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
ICROCLOCK ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Pin Assignment
1 8
2
3
4
7
6
5
X1/ICLK
VDD
GND
DC
X2
PDTS
DC
125M
Number Name Type Description
1X1/ICLK I Crystal connection. Connect to 20 MHz crystal or clock.
2 VDD P Connect to +3.3V or +5V.
3GND P Connect to ground.
4 DC - Don't Connect anything to this pin.
5125M O 125 MHz clock output whose amplitude matches VDD.
6 DC - Don't Connect anything to this pin.
7PDTS I Powers down PLL, and puts output into high impedance state, when low.
8X2 O Crystal connection to 20 MHz crystal. Leave unconnected for clock input.
Pin Descriptions
Key: I = Input, O = output, P = power supply connection
External Components / Crystal Selection
The ICS300 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS300 to minimize lead inductance. No external power supply filtering is required
for this device. A 33Ω terminating resistor can be used next to the CLK pin. The total on-chip capacitance
is approximately 16 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with
a specified load capacitance greater than 16 pF, crystal capacitors can be connected from each of the pins
X1 and X2 to Ground. The value (in pF) of these crystal caps should be = (CL-16)*2, where CL is the
crystal load capacitance in pF. These external capacitors are only required for applications where the exact
frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either).
Device Configuration
The ICS300 QTClock has many programming options, so the two character alphanumeric programming
code (in this case, the -11) must be specified when ordering parts.
MDS300-11A 3 Revision 11118 Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
ICROCLOCK ICS300-11
QTClock™ 125 MHz Clock Synthesizer
Parameter Conditions Minimum Typical Maximum Units
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device)
Supply Voltage, VDD Referenced to GND 7 V
Inputs Referenced to GND -0.5 VDD+0.5 V
Clock Output Referenced to GND -0.5 VDD+0.5 V
Ambient Operating Temperature 0 70 C
Soldering Temperature Max of 10 seconds 260 C
Storage temperature -65 150 C
DC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
DC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
Operating Voltage, VDD 3.13 5.5 V
Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 V
Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 (VDD/2)-1 V
Input High Voltage, VIH PDTS 2 V
Input Low Voltage, VIL PDTS 0.8 V
Output High Voltage, VOH IOH=-4mA VDD-0.4 V
Output High Voltage, VOH IOH=-25mA 2.4 V
Output Low Voltage, VOL IOL=25mA 0.4 V
IDD Operating Supply Current, 20 MHz crystal No Load, 125MHz 18 mA
Short Circuit Current CLK output ±70 mA
On-Chip Pull-up Resistor, PDTS Pin 7 270 kΩ
Input Capacitance, PDTS Pin 7 4 pF
AC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
AC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted)
Input Frequency, crystal input 20 21.6 MHz
Output Frequency VDD = 3.13 to 5.5V 125 135 MHz
Output Clock Rise Time, 0.8 to 2.0V 20pF load 0.7 1.2 ns
Output Clock Fall Time, 2.0 to 0.8V 20pF load 0.6 1.2 ns
Output Clock Duty Cycle at VDD/2 45 49 to 51 55 %
Absolute Clock Period Jitter Deviation from mean ±65 ±130 ps
One Sigma Clock Period Jitter 20 40 ps
Power-up time, PDTS goes high until CLK out 8 20 ms
Electrical Specifications
MDS300-11A 4 Revision 11118 Printed 11/10/98
Integrated Circuit Systems •1271 Parkmoor Ave.•San Jose•CA•95126•(408)295-9800tel•(408)295-9818fax
PRELIMINARY
PRELIMINARY INFORMATION
INFORMATION
ICROCLOCK ICS300-11
QTClock™ 125 MHz Clock Synthesizer
While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of
any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal
commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock
does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments.
Inches
Inches
Millimeters
Millimeters
Symbol Min Max Min Max
A0.055 0.068 1.397 1.7272
b 0.013 0.019 0.330 0.483
D 0.185 0.200 4.699 5.080
E 0.150 0.160 3.810 4.064
H 0.225 0.245 5.715 6.223
e
.050 BSC
.050 BSC
1.27 BSC
1.27 BSC
h 0.015 0.381
Q 0.004 0.01 0.102 0.254
8 pin SOIC
Ordering Information
Part/Order Number Marking Package Temperature
ICS300M-11 ICS300M (top line) 8 pin SOIC 0 to 70 C
YYWW -11 (2nd line)
ICS300M-11T ICS300M (top line) 8 pin SOIC on tape and reel 0 to 70 C
YYWW -11 (2nd line)
QTClock is a trademark of ICS
YYWW represents a 4 digit date code. The -11 is assigned by the factory, and indicates the output
frequencies on CLK and REF, and other programming options.
cA
b
D
E H
e
h x 45°
Q
Pin 1
Package Outline and Package Dimensions
