PRELIMINARY INFORMATION ICS300-11 ICROCLOCK QTClockTM 125 MHz Clock Synthesizer Description Features The ICS300-11 QTClockTM generates a high quality, 125 MHz clock output from a 20 MHz crystal or clock input. It is designed to replace crystal oscillators in most electronic systems. The ICS300 contains a One Time Programmable (OTP) ROM which, in the -11 version, is factory programmed with the PLL divider values to output 125 MHz. Using Phase-Locked-Loop (PLL) techniques, the device runs from a standard fundamental mode, inexpensive crystal or clock. It is smaller and less expensive than a single 125 MHz oscillator. * Packaged in 8 pin SOIC * Output clock frequency of 125 MHz at 3.3V * Input crystal or clock frequency of 20 MHz * Internal multiplier of 6.25 * Quick turn frequency programming allows production in two to four weeks * Low jitter - 20 ps one sigma typical * Duty cycle of 45/55 * Full CMOS level outputs with 25 mA drive capability at TTL levels * Tri-state output + PLL power down pin * Advanced, low power CMOS process Block Diagram VDD GND 20 MHz crystal or clock X1/ICLK OTP ROM with PLL Divider Values PLL Clock Synthesis and Control Circuitry Output Buffer 125 MHz Crystal Oscillator X2 PDTS (output and PLL) 1 Revision 11118 Printed 11/10/98 Integrated Circuit Systems *1271 Parkmoor Ave.*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS300-11A PRELIMINARY INFORMATION ICS300-11 ICROCLOCK QTClockTM 125 MHz Clock Synthesizer Pin Assignment X1/ICLK 1 8 X2 VDD 2 7 PDTS GND 3 6 DC DC 4 5 125M Pin Descriptions Number 1 2 3 4 5 6 7 8 Name X1/ICLK VDD GND DC 125M DC PDTS X2 Type I P P O I O Description Crystal connection. Connect to 20 MHz crystal or clock. Connect to +3.3V or +5V. Connect to ground. Don't Connect anything to this pin. 125 MHz clock output whose amplitude matches VDD. Don't Connect anything to this pin. Powers down PLL, and puts output into high impedance state, when low. Crystal connection to 20 MHz crystal. Leave unconnected for clock input. Key: I = Input, O = output, P = power supply connection Device Configuration The ICS300 QTClock has many programming options, so the two character alphanumeric programming code (in this case, the -11) must be specified when ordering parts. External Components / Crystal Selection The ICS300 requires a 0.01F decoupling capacitor to be connected between VDD and GND. It must be connected close to the ICS300 to minimize lead inductance. No external power supply filtering is required for this device. A 33 terminating resistor can be used next to the CLK pin. The total on-chip capacitance is approximately 16 pF, so a parallel resonant, fundamental mode crystal should be used. For crystals with a specified load capacitance greater than 16 pF, crystal capacitors can be connected from each of the pins X1 and X2 to Ground. The value (in pF) of these crystal caps should be = (CL -16)*2, where CL is the crystal load capacitance in pF. These external capacitors are only required for applications where the exact frequency is critical. For a clock input, connect to X1 and leave X2 unconnected (no capacitors on either). 2 Revision 11118 Printed 11/10/98 Integrated Circuit Systems *1271 Parkmoor Ave.*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS300-11A PRELIMINARY INFORMATION ICS300-11 ICROCLOCK QTClockTM 125 MHz Clock Synthesizer Electrical Specifications Parameter Conditions Minimum Typical ABSOLUTE MAXIMUM RATINGS (stresses beyond these can permanently damage the device) Supply Voltage, VDD Referenced to GND Inputs Referenced to GND -0.5 Clock Output Referenced to GND -0.5 Ambient Operating Temperature 0 Soldering Temperature Max of 10 seconds Storage temperature -65 DC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted) Operating Voltage, VDD 3.13 Input High Voltage, VIH, ICLK only ICLK (Pin 1) (VDD/2)+1 VDD/2 Input Low Voltage, VIL, ICLK only ICLK (Pin 1) VDD/2 Input High Voltage, VIH PDTS 2 Input Low Voltage, VIL PDTS Output High Voltage, VOH IOH=-4mA VDD-0.4 Output High Voltage, VOH IOH=-25mA 2.4 Output Low Voltage, VOL IOL=25mA IDD Operating Supply Current, 20 MHz crystal No Load, 125MHz 18 Short Circuit Current CLK output 70 On-Chip Pull-up Resistor, PDTS Pin 7 270 Input Capacitance, PDTS Pin 7 4 AC CHARACTERISTICS (VDD = 3.3V, 25C unless otherwise noted) Input Frequency, crystal input 20 Output Frequency VDD = 3.13 to 5.5V 125 Output Clock Rise Time, 0.8 to 2.0V 20pF load 0.7 Output Clock Fall Time, 2.0 to 0.8V 20pF load 0.6 Output Clock Duty Cycle at VDD/2 45 49 to 51 Absolute Clock Period Jitter Deviation from mean 65 One Sigma Clock Period Jitter 20 Power-up time, PDTS goes high until CLK out 8 Maximum Units 7 VDD+0.5 VDD+0.5 70 260 150 V V V C C C 5.5 V V V V V V V V mA mA k pF (VDD/2)-1 0.8 0.4 21.6 135 1.2 1.2 55 130 40 20 MHz MHz ns ns % ps ps ms 3 Revision 11118 Printed 11/10/98 Integrated Circuit Systems *1271 Parkmoor Ave.*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS300-11A PRELIMINARY INFORMATION ICS300-11 ICROCLOCK QTClockTM 125 MHz Clock Synthesizer Package Outline and Package Dimensions 8 pin SOIC E H Pin 1 h x 45 D Q c e b A Symbol A b D E H e h Q Inches Min Max 0.055 0.068 0.013 0.019 0.185 0.200 0.150 0.160 0.225 0.245 .050 BSC 0.015 0.004 0.01 Millimeters Min Max 1.397 1.7272 0.330 0.483 4.699 5.080 3.810 4.064 5.715 6.223 1.27 BSC 0.381 0.102 0.254 Ordering Information Part/Order Number ICS300M-11 ICS300M-11T Marking ICS300M (top line) YYWW -11 (2nd line) ICS300M (top line) YYWW -11 (2nd line) Package 8 pin SOIC Temperature 0 to 70 C 8 pin SOIC on tape and reel 0 to 70 C YYWW represents a 4 digit date code. The -11 is assigned by the factory, and indicates the output frequencies on CLK and REF, and other programming options. While the information presented herein has been checked for both accuracy and reliability, ICS/MicroClock assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS/MicroClock. ICS/MicroClock reserves the right to change any circuitry or specifications without notice. ICS/MicroClock does not authorize or warrant any ICS/MicroClock product for use in life support devices or critical medical instruments. QTClock is a trademark of ICS 4 Revision 11118 Printed 11/10/98 Integrated Circuit Systems *1271 Parkmoor Ave.*San Jose*CA*95126*(408)295-9800tel*(408)295-9818fax MDS300-11A