W567BXXX Data Sheet
4-CHANNEL SPEECH+MELODY PROCESSOR
(BandDirectorTM Series)
Publication Release Date: June 18, 2004
- 1 - Revision A4
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. FEATURES ................................................................................................................................. 3
3. PIN DESCRIPTION..................................................................................................................... 4
4. BLOCK DIAGRAM ...................................................................................................................... 5
5. ELECTRICAL CHARACTERISTICS........................................................................................... 5
5.1 Absolute Maximum Ratings............................................................................................... 5
5.2 D.C. Characteristics........................................................................................................... 6
5.3 A.C. Characteristics ........................................................................................................... 6
6. APPLICATION CIRCUITS .......................................................................................................... 7
6.1 W567B010~B020 .............................................................................................................. 7
6.2 W567B030~B260 .............................................................................................................. 8
7. REVISION HISTORY .................................................................................................................. 9
W567BXXX
- 2 -
1. GENERAL DESCRIPTION
The W567Bxxx is a powerful microcontroller (uC) dedicated to speech and melody synthesis
applications. With the help of the embedded 8-bit microprocessor & dedicated H/W, the W567Bxxx
can synthesize 4-channel speech+melody simultaneously.
The two channels of synthesized speech can be in different kinds of format, for example ADPCM and
MDPCM. The W567Bxxx can provide 4-channel high-quality WinMelodyTM , which can emulate the
characteristics of musical instruments, such as piano and violin. The output of speech/melody
channels are mixed together through the on-chip digital mixer to produce colorful effects. With these
hardware resources, the W567Sxxx is very suitable for high-quality and sophisticated scenario
applications.
The W567Bxxx is also capable of transmitting infrared (IR) signals with on-chip carrier generator. As a
result, toys can be designed to interact with each other for more play values. A serial interface can be
supported as external memory for memory expansion or content-updateable applications.
The W567Bxxx family contains several items with different playback duration as shown below: (@5-bit
MDPCM algorithm, 6KHz sampling rate)
Item W567B010 W567B015 W567B020 W567B030 W567B040
*Duration 14 sec. 18 sec. 26 sec. 35 sec. 52 sec.
Item W567B060 W567B080 W567B100 W567B120 W567B150
Duration 60 sec. 104 sec. 116 sec. 129 sec. 163 sec.
Item W567B170 W567B210 W567B260
Duration 197 sec. 232 sec. 264 sec.
Note:
*: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and timber library have
been excluded from user’s ROM space for the duration estimation.
W567BXXX
Publication Release Date: June 18, 2004
- 3 - Revision A4
2. FEATURES
Wide range of operating voltage:
8 MHz @ 3.0 volt ~ 5.5 volt
4 MHz @ 2.4 volt ~ 5.5 volt
Power management:
4 ~ 8 MHz system clocks, with Ring type and Crystal type
Stop mode for stopping all IC operations
Provides up to 8 inputs, 8 outputs and 24 I/O pins
Current-type Digital-to-Analog Converter (DAC):
(8+2)-bit resolution with programmable output current
F/W speech synthesis with multiple format support: ADPCM/MDPCM/PCM
2 speech synthesis1 channels at programmable sample rate
4 melody channels that can emulate characteristics of musical instruments
4-input/8-bit-resolution Mixer can mix the speech and melody signals flexibly
Built-in IR carrier generation circuit for simplifying firmware IR application
Built-in 5 timers for speech/melody synthesis and general purpose applications
Built-in 8*7 multiplier
Built-in Watch-Dog Timer (WDT)
Built-in Low-Voltage-Reset (LVR)
Built-in Serial Interface Manager (SIM) in W567B030 ~ B260
Support PowerScript for developing codes in easy way
Full-fledged development system
Source-level ICE debugger
Event synchronization mechanism
Compatible with W566B/C & W588S system
User-friendly GUI environment
Available package form: (COB is essential)
1 More speech channels are available for 8-bit PCM format in the remaining melody channels.
W567BXXX
- 4 -
3. PIN DESCRIPTION
PIN NAME I/O FUNCTION
RESETB In IC reset input, low active.
OSCI In Main-clock oscillation input. Mask option to select main-clock type. When
Ring type is used. Connect to GND via the oscillation resistor.
OSCO Out Main-clock oscillation output. Mask option to select main-clock type.
IP0[7:0] /
IP0[7:4]
In General input port with pull-high selection. Each 2 input pins can be
programmed to generate interrupt request and used to release IC from
STOP mode.
BP0[7:0] I/O General input/output pins. When used as output pin, it can be open–drain
or CMOS type and it can sink 8mA for high-current applications. When
used as input pin, there may have a pull-high option and generate
interrupt request to release IC from STOP mode.
When BP0[7] is used as output pin, it can be the IR transmission carrier
for IR applications.
BP1[7:0]
I/O General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high
option and generate interrupt request to release IC from STOP mode.
When serial interface is enabled, BP1[6:4] are used as serial interface
pins.
BP2[7:0]
I/O General input/output pins. When used as output pin, it can be open–drain
or CMOS type. When used as input pin, there may have a pull-high
option and generate interrupt request to release IC from STOP mode.
OP0[7:0] Out General output pins. The pins of OP0 are Inverter-type output.
DAC Out Current type DAC speaker output.
TEST In Test input, internally pulled low. Do not connect during normal operation.
VDD Power
Positive power supply for µP and peripherals.
VSS Power
Negative power supply for µP and peripherals.
2VDDOSC Power Positive power supply for oscillation.
2VSSOSC Power Negative power supply for oscillation.
2 In order to get a stable oscillating frequency, W567B030~B260 provides these pins for power supply.
W567BXXX
Publication Release Date: June 18, 2004
- 5 - Revision A4
4. BLOCK DIAGRAM
Timing
Generator
8 bits uP
Data RAM
Program ROM Speaker
Driver
Interrupt
Controller
Timers
&
HQ generator I/O
WDT LVR Mixer
Address/Data Bus
BP1[7:0]
DAC
RESETB
IP0[7:0]
or
IP0[7:4]
OSCI
OSCO
Serial
Interface
BP1[6:4]
BP2[7:0]BP0[7:0]
OP0[7:0]
5. ELECTRICAL CHARACTERISTICS
5.1 Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to Ground Potential -0.3 to +7.0 V
D.C. Voltage on Any Pin to Ground Potential -0.3 to VDD +0.3 V
Operating Temperature 0 to +70 °C
Storage Temperature -55 to +150 °C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
W567BXXX
- 6 -
5.2 D.C. Characteristics
(VDD VSS = 4.5V, FM = 8 MHz, TA = 25°C, No Load unless otherwise specified)
SPEC.
PARAMETER SYM. TEST CONDITIONS
Min. Typ. Max.
UNIT
FSYS = 4 MHz 2.4 - 5.5 V
Operating Voltage VDD FSYS = 8 MHz 3.0 - 5.5 V
Operating Current IOP FSYS = FM, normal
operation - 15 20 mA
Standby Current ISB STOP mode - 1 2 µA
Input Low Voltage VIL All input pins VSS - 0.3 VDD V
Input High Voltage VIH All input pins 0.7 VDD - VDD V
Vout = 0.4V, all output
pins except BP0 - - 4 mA
Output Low Current IOL
Vout = 0.4V, BP0 only - - 8 mA
Output High Current IOH Vout = 2.4V, all output
pins -4 - - mA
DAC Full Scale Current IDAC VDD = 4.5V, RL = 100 -2.4
-4.0
-3.0
-5.0
-3.6
-6.0 mA
Operation Current of
Low Voltage Reset ILVR VDD = 4.5V 60 uA
All input pins except
RESETB 450 - - K
Pull High Resistance RIN
RESERB 100 - -
K
5.3 A.C. Characteristics
(VDD-VSS = 4.5V, FM = 8 MHz, TA = 25°C; No Load unless otherwise specified)
SPEC.
PARAMETER SYM. TEST CONDITIONS
Min. Typ. Max.
UNIT
Ring type, *Rosc = 300 K 3.6 4 4.4
Main-Clock FM
Ring type, *Rosc = 150 K 7.2 8 8.8
MHz
Cycle Time TCYC F
SYS = 8 MHz 125 - DC nS
Main-Clock Wake-up
Stable Time TWSM Ring type, R = 300 K - 3 5 mS
Main-Clock Frequency
Deviation, Ring type F
F
MIN
MINMAX
F
F-F - 3 7.5 %
RESETB Active Width TRES After FSYS stable 4 - - TCYC
*: Typical ROSC value for each part number should refer to design guide.
W567BXXX
Publication Release Date: June 18, 2004
- 7 - Revision A4
6. APPLICATION CIRCUITS
6.1 W567B010~B020
W567B010
|
W567B020
ROSC
OSC
VDD
VSS
4.7uF
BP00
|
BP07
BP10
|
BP17
IP04
|
IP07
Battery
+
DAC
VDD
Speaker
8050
Rs
/RESET
0.1uF
Reset
Switch
Notes:
1. The typical value of Rosc is 150 K for 8 MHz and 300 K for 4 MHz, and should be connected to GND (VSS).
2. Please refer to design guide to get typical Rosc value for each part number.
3. The Rs value is suggested in 270 ~ 1K to limit too large DAC output current flowing into transistor.
4. The capacitor, 4.7µF, shunts between VDD and GND is necessary as power stability. But the value of
capacitor is depend on the application.
5. The above application circuit is for reference only. No warranty for mass production.
W567BXXX
- 8 -
6.2 W567B030~B260
W567B030
|
W567B260
ROSC
OSC
VDD
VSS
/RESET
DAC
0.1uF
4.7uF
BP00
|
BP07
BP10
|
BP17
BP20
|
BP27
IP00
|
IP07
VDD
VDDOSC
0.1uF
Battery
10
+
VSSOSC
Reset
Switch
Speaker
8050
Rs
OP00
|
OP07
Notes:
1. The typical value of Rosc is 150 K for 8 MHz and 300 K for 4 MHz, and should be connected to GND (VSS).
2. Please refer to design guide to get typical Rosc value for each part number.
3. For W567B030~B260, VSSOSC should be connected to VSS; VDDOSC should be connected to VDD in PCB layout.
4. The Rs value is suggested in 270 ~ 1K to limit too large DAC output current flowing into transistor.
5. The 10 and 0.1uF between VDD, VDDOSC and GND are optional to filter power noise.
6. The capacitor, 4.7uF, shunts between VDD and GND is necessary as power stability. But the value of capacitor is
depend on the application.
7. The above application circuit is for reference only. No warranty for mass production.
W567BXXX
Publication Release Date: June 18, 2004
- 9 - Revision A4
7. REVISION HISTORY
REVISION DATE MODIFICATIONS
A1 Oct. 16, 2003 Preliminary release.
A2 Nov 19, 2003 Rename VDD1/VSS1 to VDDOSC/VSSOSC in the Pin Description
Update application circuit and notes.
A3 March 16, 2004
Change the name Low-Voltage-Detect (LVD) to Low-Voltage-
Reset (LVR).
Modify Pull High Resistance as 450K in the DC Characteristics.
A4 June 18, 2004 Add the operation current of Low-Voltage-Reset.
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http://www.winbond.com.tw/
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FAX: 1-408-5441798
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No. 378 Kwun Tong Rd.,
Kowloon, Hong Kong
FAX: 852-27552064
Unit 9-15, 22F, Millennium City,
TEL: 852-27513100
Please note that all data and specifications are subject to change without notice.
All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Winbond Electronics (Shanghai) Ltd.
200336 China
FAX: 86-21-62365998
27F, 2299 Yan An W. Rd. Shanghai,
TEL: 86-21-62365999
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