Low Cost, Dual, High Current Output Line Driver with Shutdown ADA4311-1 FEATURES PIN CONFIGURATION ADA4311-1 +VS 1 9 -IN B OUT A 3 8 +IN B -IN A 4 7 PD1 +IN A 5 6 PD0 NC = NO CONNECT Figure 1. Thermally Enhanced, 10-Lead MINI_SO_EP TYPICAL APPLICATION 1/2 ADA4311-1 VMID* APPLICATIONS 1/2 ADA4311-1 *VMID = VCC - GND 2 06940-002 Home networking line drivers Twisted pair line drivers Power line communications (PLC) Video line drivers ARB line drivers I/Q channel amplifiers 10 OUT B NC 2 06940-001 High speed -3 dB bandwidth: 310 MHz, G = +5, RLOAD = 50 Slew rate: 1050 V/s, RLOAD = 50 Wide output swing 20.6 V p-p differential, RLOAD of 100 from 12 V supply High output current Low distortion -98 dBc typical at 1 MHz, VOUT = 2 V p-p, G = +5, RLOAD = 100 -72 dBc typical at 10 MHz, VOUT = 2 V p-p, G = +5, RLOAD = 100 Power management and shutdown Control inputs CMOS level compatible Shutdown quiescent current: 1 mA/amplifier Selectable quiescent current: 1 mA to 11.8 mA/amplifier Figure 2. Typical PLC Driver Application GENERAL DESCRIPTION The ADA4311-1 is comprised of two high speed, current feedback operational amplifiers. The high output current, high bandwidth, and fast slew rate make it an excellent choice for broadband applications requiring high linearity performance while driving low impedance loads. The ADA4311-1 is available in a thermally enhanced, 10-lead MSOP with an exposed paddle for improved thermal conduction. The ADA4311-1 is rated to work in the extended industrial temperature range of -40C to +85C. The ADA4311-1 incorporates a power management function that provides shutdown capabilities and the ability to optimize the quiescent current of the amplifiers. The CMOS-compatible, power-down control pins (PD1 and PD0) enable the ADA4311-1 to operate in four different modes: full power, medium power, low power, and complete power-down. In power-down mode, the quiescent current drops to only 1.0 mA/amplifier, while the outputs go to a high impedance state. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved. ADA4311-1 TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 10 Applications....................................................................................... 1 Application Information................................................................ 11 Pin Configuration............................................................................. 1 Feedback Resistor Selection...................................................... 11 Typical Application........................................................................... 1 Power Control Modes of Operation ........................................ 11 General Description ......................................................................... 1 Exposed Thermal Pad Connections ........................................ 11 Revision History ............................................................................... 2 Powerline Application ............................................................... 11 Specifications..................................................................................... 3 Board Layout............................................................................... 12 Absolute Maximum Ratings............................................................ 5 Power Supply Bypassing ............................................................ 12 Thermal Resistance ...................................................................... 5 Outline Dimensions ....................................................................... 13 ESD Caution.................................................................................. 5 Ordering Guide .......................................................................... 13 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 REVISION HISTORY 8/07--Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADA4311-1 SPECIFICATIONS VS = 12 V, RF = 499 (@ TA = 25C, G = +5, RL = 100 to VS/2), unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Full Power Bandwidth Slew Rate NOISE/DISTORTION PERFORMANCE Differential Distortion (Worst Harmonic) Input Voltage Noise Input Current Noise DC PERFORMANCE Input Offset Voltage Input Bias Current Noninverting Input Inverting Input Open-Loop Transimpedance Common-Mode Rejection INPUT CHARACTERISTICS Input Resistance OUTPUT CHARACTERISTICS Single-Ended, +Swing Single-Ended, -Swing Single-Ended, +Swing Single-Ended, -Swing Differential Swing POWER SUPPLY Single Supply Supply Current Test Conditions/Comments Min VOUT = 0.1 V p-p, PD1 = 0, PD0 = 0, RLOAD = 50 VOUT = 0.1 V p-p, PD1 = 0, PD0 = 1, RLOAD = 50 VOUT = 0.1 V p-p, PD1 = 1, PD0 = 0, RLOAD = 50 VOUT = 10.2 V p-p, PD1 = 0, PD0 = 0, RLOAD = 50 VOUT = 2 V p-p, PD1 = 0, PD0 = 0 VOUT = 2 V p-p, PD1 = 0, PD0 = 1 VOUT = 2 V p-p, PD1 = 1, PD0 = 0 Typ Max Unit 310 220 140 12.9 1050 1050 1000 MHz MHz MHz MHz V/s V/s V/s -98 -95 -86 dBc dBc dBc -72 -63 -52 dBc dBc dBc -56 -49 -43 2.4 17 dBc dBc dBc nV/Hz pA/Hz fC = 1 MHz, VOUT = 2 V p-p PD1 = 0, PD0 = 0 PD1 = 0, PD0 = 1 PD1 = 1, PD0 = 0 fC = 10 MHz, VOUT = 2 V p-p PD1 = 0, PD0 = 0 PD1 = 0, PD0 = 1 PD1 = 1, PD0 = 0 fC = 20 MHz, VOUT = 2 V p-p PD1 = 0, PD0 = 0 PD1 = 0, PD0 = 1 PD1 = 1, PD0 = 0 f = 100 kHz f = 100 kHz RLOAD = 50 RLOAD = 100 -3 +1 +3 mV -9 -4 4 15 57 -2 +4.5 14 35 62 +3 +16 A A M M dB +IN, f < 100 kHz 500 RLOAD = 50 RLOAD = 50 RLOAD = 100 RLOAD = 100 RLOAD = 100 11 11 20.2 PD1 = 0, PD0 = 0 PD1 = 0, PD0 = 1 PD1 = 1, PD0 = 0 PD1 = 1, PD0 = 1 10.5 7 4.3 Rev. 0 | Page 3 of 16 11.1 0.9 11.1 0.8 20.6 12 11.8 7.9 5.2 0.9 k 1 0.9 13 9 6.3 1.3 VP VP VP VP V p-p V mA/amp mA/amp mA/amp mA/amp ADA4311-1 Parameter POWER-DOWN PINS PD1, PD0 Threshold High Level Input Voltage, VIH Low Level Input Voltage, VIL PD1, PD0 = 0 Pin Bias Current PD1, PD0 = 1 Pin Bias Current Enable/Disable Time Power Supply Rejection Ratio Test Conditions/Comments Min Referenced to GND -63 Rev. 0 | Page 4 of 16 Max 1.5 2 0 -1.5 40 PD1 or PD0 = 0 V PD1 or PD0 = 3 V Typ -0.2 63 130/116 -70 5 0.8 +1.5 80 Unit V V V A A ns dB ADA4311-1 ABSOLUTE MAXIMUM RATINGS Maximum Power Dissipation Table 2. Parameter Supply Voltage Power Dissipation Storage Temperature Range Operating Temperature Range Lead Temperature (Soldering 10 sec) Junction Temperature Rating 13.6 V (TJMAX - TA)/JA -65C to +125C -40C to +85C 300C 150C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The maximum safe power dissipation for the ADA4311-1 is limited by the associated rise in junction temperature (TJ) on the die. At approximately 150C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a junction temperature of 150C for an extended period can result in changes in silicon devices, potentially causing degradation or loss of functionality. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature for the 10-lead MINI_SO_EP (44C/W) on a JEDEC standard 4-layer board. JA values are approximations. 5.0 THERMAL RESISTANCE MAXIMUM POWER DISSIPATION (W) 4.5 Thermal resistance (JA) is specified for the worst-case conditions, that is, JA is specified for device soldered in circuit board for surface-mount packages. Table 3. JA 44 Unit C/W 3.5 MINI_SO_EP-10 3.0 2.5 2.0 1.5 1.0 0.5 0 -35 -15 5 25 45 AMBIENT TEMPERATURE (C) 65 85 06940-003 Package Type 10-Lead MINI_SO_EP 4.0 Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board ESD CAUTION Rev. 0 | Page 5 of 16 ADA4311-1 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADA4311-1 10 OUT B NC 2 9 -IN B OUT A 3 8 +IN B -IN A 4 7 PD1 +IN A 5 6 PD0 NC = NO CONNECT 06940-004 +VS 1 Figure 4. Pin Configuration Table 4. Pin Function Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 (Exposed Paddle) Mnemonic +VS NC OUT A -IN A +IN A PD0 PD1 +IN B -IN B OUT B GND Description Positive Power Supply Input. No Connection. Amplifier A Output. Amplifier A Inverting Input. Amplifier A Noninverting Input. Power Dissipation Control. Power Dissipation Control. Amplifier B Noninverting Input. Amplifier B Inverting Input. Amplifier B Output. Ground (Electrical Connection Required). Rev. 0 | Page 6 of 16 ADA4311-1 TYPICAL PERFORMANCE CHARACTERISTICS 9 -40 VOUT = 100mV p-p RL = 50 6 PD1, PD0 = 0, 0 0 -3 G = +10 -6 -9 G = +20 -12 -15 1 10 100 1000 FREQUENCY (MHz) PD1, PD0 = 0, 1 -80 PD1, PD0 = 0, 0 -90 -100 -110 -130 0.1 9 PD1, PD0 = 0, 0 -70 HARMONIC DISTORTION (dBc) 3 0 -3 PD1, PD0 = 0, 1 -6 -9 PD1, PD0 = 1, 0 -12 -15 -18 100 10 Figure 8. Differential Harmonic Distortion vs. Frequency -60 VOUT = 100mV p-p RL = 50 G = +5 6 1 FREQUENCY (MHz) Figure 5. Small Signal Frequency Response for Various Closed-Loop Gains GAIN (dB) PD1, PD0 = 1, 0 -70 -120 06940-005 -18 -60 06940-008 NORMALIZED GAIN (dB) HARMONIC DISTORTION (dBc) G = +5 3 HD2 HD3 VOUT = 2V p-p RL = 100 G = +5 -50 f = 5MHz RL = 100 G = +5 HD2 -80 -90 HD3 -100 -110 1 10 100 1000 FREQUENCY (MHz) -120 0.1 06940-006 Figure 6. Small Signal Frequency Response for Various Modes 0.15 -40 G = +5 RL = 50 10ns/DIV VOUT = 2V p-p f = 5MHz G = +5 -50 0.10 0.05 0 -0.05 -0.10 -60 -70 HD2 -80 -90 HD3 -100 -0.15 06940-010 OUTPUT (V) 10 Figure 9. Differential Harmonic Distortion vs. Output Voltage HARMONIC DISTORTION (dBc) 0.20 1 OUTPUT VOLTAGE (V p-p) -0.20 -110 10 100 1000 LOAD RESISTANCE () Figure 7. Small Signal Transient Response Figure 10. Differential Harmonic Distortion vs. Load Resistance Rev. 0 | Page 7 of 16 06940-022 -24 06940-021 -21 ADA4311-1 RL = 100 -45 100k -135 MAGNITUDE 10k -180 1k OUTPUT IMPEDANCE () -90 10k 100k 1M 10M 100M -270 1G FREQUENCY (Hz) 1M PD1, PD0 = 0, 0 RL = 100 10 100 1000 PD1, PD0 = 1, 1 OUTPUT IMPEDANCE () 100k -20 -30 -40 -50 10k 1k 100 0.1 1 10 100 1000 FREQUENCY (MHz) 1 0.01 0.1 1 10 100 1000 06940-015 -70 0.01 1G 06940-009 10 -60 06940-011 COMMON-MODE REJECTION (dB) 1 Figure 14. Closed-Loop Output Impedance vs. Frequency -10 FREQUENCY (MHz) Figure 12. Common-Mode Rejection vs. Frequency -10 0.1 FREQUENCY (MHz) Figure 11. Open-Loop Transimpedance and Phase vs. Frequency 0 1 0.01 0.01 06940-007 1k 10 0.1 -225 100 100 PD1, PD0 = 0, 0 100 PHASE (Degrees) PHASE 1M Figure 15. Output Impedance vs. Frequency (Disabled) 100 PD1, PD0 = 0, 0 RL = 100 VOLTAGE NOISE (nV/ Hz) -20 -30 +PSR -40 -50 10 -60 -70 0.01 0.1 1 10 100 FREQUENCY (MHz) 1000 06940-012 POWER SUPPLY REJECTION (dB) TRANSIMPEDANCE () 10M 1000 0 06940-013 100M 1 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 16. Voltage Noise vs. Frequency Figure 13. Power Supply Rejection vs. Frequency Rev. 0 | Page 8 of 16 100M ADA4311-1 -20 0 PD1, PD0 = 1, 1 -20 CROSSTALK (dB) FEEDTHROUGH (dB) -40 -60 -40 -60 -80 1 10 100 1000 FREQUENCY (MHz) -100 0.1 06940-014 -100 1 10 100 1000 FREQUENCY (Hz) 06940-017 -80 Figure 19. Crosstalk vs. Frequency Figure 17. Feedthrough vs. Frequency 8 12 7 VOUT 11 10 VOUT (p-p) 5 4 3 9 8 VPD1 , VPD0 2 0 0 1 2 3 TIME (1s/DIV) 4 5 6 6 30 100 1000 LOAD () Figure 18. Power-Down Turn On/Turn Off Figure 20. Single-Ended Output Swing vs. Load Rev. 0 | Page 9 of 16 06940-020 7 1 06940-016 VOLTAGE (V) 6 ADA4311-1 THEORY OF OPERATION The ADA4311-1 is a dual-current feedback amplifier with high output current capability. With a current feedback amplifier, the current into the inverting input is the feedback signal, and the open-loop behavior is that of a transimpedance, dVO/dIIN or TZ. The open-loop transimpedance is analogous to the open-loop voltage gain of a voltage feedback amplifier. Figure 21 shows a simplified model of a current feedback amplifier. Because RIN is proportional to 1/gm, the equivalent voltage gain is TZ x gm, where gm is the transconductance of the input stage. Basic analysis of the follower with gain circuit yields Because G x RIN << RF for low gains, a current feedback amplifier has relatively constant bandwidth vs. gain, the 3 dB point being set when |TZ| = RF. For a real amplifier, there are additional poles that contribute excess phase, and there is a value for RF below which the amplifier is unstable. Tolerance for peaking and desired flatness determines the optimum RF in each application. RF RG RIN VOUT TZ ( s ) =Gx VIN TZ ( s ) + G x RIN + RF IIN where: VOUT 06940-018 VIN R G = 1+ F RG R IN = TZ RN Figure 21. Simplified Block Diagram 1 50 gm Rev. 0 | Page 10 of 16 ADA4311-1 APPLICATION INFORMATION FEEDBACK RESISTOR SELECTION Table 6. Power Modes The feedback resistor has a direct impact on the closed-loop bandwidth and stability of the current feedback op amp. Reducing the resistance below the recommended value can make the amplifier response peak and even become unstable. Increasing the size of the feedback resistor beyond the recommended value reduces the closed-loop bandwidth. Table 5 provides a convenient reference for quickly determining the feedback and gain resistor values, and the corresponding bandwidth, for common gain configurations. The recommended feedback resistor value for the ADA4311-1 is 499 . Table 5. Recommended Values and Frequency Performance1 Gain +5 +5 +10 +20 1 RF () 499 1k 499 499 RG () 124 250 55.4 26.1 -3 dB SS BW (MHz) 310 220 175 84 PD1 Low Low High High PD0 Low High Low High Power Mode Full Power 3/4 Power 1/2 Power Power-Down Total Supply Current (mA) Output Impedance 23.6 15.8 10.4 1.8 Low Low Low High EXPOSED THERMAL PAD CONNECTIONS The exposed thermal pad on the 10-lead MSOP is both the reference for the PD pins and the only electrical connection for the negative supply voltage. Therefore, in the 10-lead MSOP, the ADA4311-1 can only be used on a single supply. The exposed thermal pad must be connected to ground. Failure to do so renders the part inoperable. A requirement for this package is that the thermal pad be connected to a solid plane with low thermal resistance, ensuring adequate heat transfer away from the die and into the board. Conditions: VS = 12 V, TA = 25C, RL = 50 , PD1, PD0 = 0, 0. POWER CONTROL MODES OF OPERATION POWERLINE APPLICATION The ADA4311-1 features four power modes: full power, 3/4 power, 1/2 power, and shutdown. The power modes are controlled by two logic pins, PD0 and PD1. The power-down control pins are compatible with standard 3 V and 5 V CMOS logic. Table 6 shows the various power modes and associated logic states. In the power-down mode, the output of the amplifier goes into a high impedance state. Applications (that is, powerline AV modems) requiring greater than 10 dBm peak power should consider using an external line driver, such as the ADA4311-1. Figure 22 shows an example interface between the TxDAC(R) output and the ADA4311-1 biased for single-supply operation. The peak-to-peak differential output voltage swing of the TxDAC should be limited to 2 V p-p, with the gain of the ADA4311-1 configured to realize the additional voltage gain required by the application. A lowpass filter should be considered to filter the DAC images inherent in the signal reconstruction process. In addition, dc blocking capacitors are required to level-shift the output signal of the TxDAC to the common-mode level of the ADA4311-1 (that is, VMID = VCC - GND/2). RSET TxDISABLE REFADJ 1/2 OPTIONAL LCLPF ADA4311-1 IOUTP+ VMID TxDAC IOUTP- 0dB TO -7.5dB 1/2 ADA4311-1 Figure 22. TxDAC Output Directly via Center-Tap Transformer Rev. 0 | Page 11 of 16 06940-019 REFIO 0.1F ADA4311-1 BOARD LAYOUT POWER SUPPLY BYPASSING As is the case with all high speed applications, careful attention to printed circuit board (PCB) layout details prevents associated board parasitics from becoming problematic. Proper RF design technique is mandatory. The PCB should have a ground plane covering all unused portions of the component side of the board to provide a low impedance return path. Removing the ground plane on all layers from the area near the input and output pins reduces stray capacitance, particularly in the area of the inverting inputs. Signal lines connecting the feedback and gain resistors should be as short as possible to minimize the inductance and stray capacitance associated with these traces. Termination resistors and loads should be located as close as possible to their respective inputs and outputs. Input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) though the board. Wherever there are complementary signals, a symmetrical layout should be provided to the extent possible to maximize balanced performance. When running differential signals over a long distance, the traces on the PCB should be close. Doing this reduces the radiated energy and makes the circuit less susceptible to RF interference. Adherence to stripline design techniques for long signal traces (greater than about 1 inch) is recommended. The ADA4311-1 operates on supplies from 6 V to 12 V. The ADA4311-1 circuit should be powered with a well-regulated power supply. Careful attention must be paid to decoupling the power supply. High quality capacitors with low equivalent series resistance (ESR), such as multilayer ceramic capacitors (MLCCs), should be used to minimize supply voltage ripple and power dissipation. In addition, 0.1 F MLCC decoupling capacitors should be located no more than -inch away from each of the power supply pins. A large, usually tantalum, 10 F capacitor is required to provide good decoupling for lower frequency signals and to supply current for fast, large signal changes at the ADA4311-1 outputs. Bypassing capacitors should be laid out in such a manner as to keep return currents away from the inputs of the amplifiers, which minimizes any voltage drops that can develop due to ground currents flowing through the ground plane. A large ground plane also provides a low impedance path for the return currents. For more information on high speed board layout, see A Practical Guide to High-Speed Printed-Circuit-Board Layout. Rev. 0 | Page 12 of 16 ADA4311-1 OUTLINE DIMENSIONS *2.27 2.17 2.07 3.10 3.00 2.90 TOP VIEW 1 *1.83 1.73 1.63 5 PIN 1 INDICATOR 0.50 BSC 0.94 0.86 0.78 0.15 0.10 0.05 COPLANARITY 0.10 5.05 4.90 4.75 EXPOSED PAD 0.50 BSC 1.10 MAX 0.30 0.23 0.15 SEATING PLANE BOTTOM VIEW 0.23 0.18 0.13 8 0 0.70 0.55 0.40 *COMPLIANT TO JEDEC STANDARDS MO-187-BA-T EXCEPT FOR EXPOSED PAD DIMENSIONS. 073007-B 6 10 3.10 3.00 2.90 Figure 23. 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] (RH-10-1) Dimensions shown in millimeters ORDERING GUIDE Model ADA4311-1ARHZ 1 ADA4311-1ARHZ-RL1 ADA4311-1ARHZ-R71 1 Temperature Range -40C to +85C -40C to +85C -40C to +85C Package Description 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] 10-Lead Mini Small Outline Package with Exposed Pad [MINI_SO_EP] Z = RoHS Compliant Part. Rev. 0 | Page 13 of 16 Package Option RH-10-1 RH-10-1 RH-10-1 Branding 1A 1A 1A ADA4311-1 NOTES Rev. 0 | Page 14 of 16 ADA4311-1 NOTES Rev. 0 | Page 15 of 16 ADA4311-1 NOTES (c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06940-0-8/07(0) Rev. 0 | Page 16 of 16