LTC3601EMSE#PBF - Linear Technology Corporation

LTC3601

3601fb

TYPICAL APPLICATION

FEATURES

APPLICATIONS

DESCRIPTION

1.5A, 15V Monolithic

Synchronous Step-Down

Regulator

n Distributed Power Systems

n Lithium-Ion Battery-Powered Instruments

n Point-of-Load Power Supply

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents, including 5481178, 5847554,

6580258, 6304066, 6476589, 6774611.

Efﬁ ciency and Power Loss vs Load Current

n 4V to 15V Operating Input Voltage Range

n 1.5A Output Current

n Up to 96% Efﬁ ciency

n Very Low Duty Cycle Operation: 5% at 2.25MHz

n Adjustable Switching Frequency: 800kHz to 4MHz

n External Frequency Synchronization

n Current Mode Operation for Excellent Line and Load

Transient Response

n User Selectable Burst Mode

(No Load IQ = 300µA) or

Forced Continuous Operation

n 0.6V Reference Allows Low Output Voltages

n Short-Circuit Protected

n Output Voltage Tracking Capability

n Programmable Soft-Start

n Power Good Status Output

n Available in Small, Thermally Enhanced 16-Pin QFN

(3mm × 3mm) and MSOP Packages

The LTC

3601 is a high efﬁ ciency, monolithic synchronous

buck regulator using a phase-lockable controlled on-time,

current mode architecture capable of supplying up to 1.5A

of output current. The operating supply voltage range is

from 4V to 15V, making it suitable for a wide range of

power supply applications.

The operating frequency is programmable from 800kHz to

4MHz with an external resistor enabling the use of small

surface mount inductors. For switching noise sensitive

applications, the LTC3601 can be externally synchronized

over the same frequency range. An internal phase-locked

loop aligns the on-time of the top power MOSFET to the

internal or external clock. This unique constant frequency/

controlled on-time architecture is ideal for high step-down

ratio applications that demand high switching frequencies

and fast transient response.

The LTC3601 offers two operational modes: Burst Mode

operation and forced continuous mode to allow the user

to optimize output voltage ripple, noise, and light load

efﬁ ciency for a given application. Maximum light load

efﬁ ciency is achieved with the selection of Burst Mode

operation while forced continuous mode provides minimum

output ripple and constant frequency operation.

VIN

RUN

PGOOD

TRACK

LTC3601

PGNDSGND

BOOST

INTVCC

ITH

MODE/SYNC

VON

2.2µF

10pF

0.1µF

22µF

VOUT

3.3V

1.5A

180k

40k

3601 TA01a

2.2µH

22µF

VIN

4V TO 15V

LOAD CURRENT (A)

EFFICIENCY (%)

POWER LOSS (mW)

100

0.001 0.1 1 10

3601 TA01b

1000

100

0.01

VIN = 5V

VIN = 12V

LTC3601

3601fb

ABSOLUTE MAXIMUM RATINGS

(Note 1)

16 15 14 13

5 6 7 8

TOP VIEW

UD PACKAGE

16-LEAD (3mm s 3mm) PLASTIC QFN

1MODE/SYNC

PGOOD

ITH

SGND

VIN

RUN

TRACK

BOOST

INTVCC

VON

TJMAX = 125°C, θJA = 45°C/W

EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB

PGND

BOOST

INTVCC

VON

PGOOD

MODE/SYNC

VIN

RUN

TRACK

ITH

TOP VIEW

MSE PACKAGE

16-LEAD PLASTIC MSOP

TJMAX = 125°C, θJA = 38°C/W

EXPOSED PAD (PIN 17) IS SGND, MUST BE SOLDERED TO PCB

PIN CONFIGURATION

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LTC3601EUD#PBF LTC3601EUD#TRPBF LFJC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C

LTC3601IUD#PBF LTC3601IUD#TRPBF LFJC 16-Lead (3mm × 3mm) Plastic QFN –40°C to 125°C

LTC3601EMSE#PBF LTC3601EMSE#TRPBF 3601 16-Lead Plastic MSOP –40°C to 125°C

LTC3601IMSE#PBF LTC3601IMSE#TRPBF 3601 16-Lead Plastic MSOP –40°C to 125°C

Consult LTC Marketing for parts speciﬁ ed with wider operating temperature ranges. *The temperature grade is identiﬁ ed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁ nish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁ cations, go to: http://www.linear.com/tapeandreel/

VIN ............................................................. –0.3V to 16V

VIN Transient Voltage .................................................18V

BOOST .................................................... –0.3V to 18.6V

BOOST-SW ................................................ –0.3V to 3.6V

INTVCC ...................................................... –0.3V to 3.6V

ITH, RT ....................................... –0.3V to INTVCC + 0.3V

MODE/SYNC, FB ........................ –0.3V to INTVCC + 0.3V

TRACK ....................................... –0.3V to INTVCC + 0.3V

PGOOD, VON .............................................. –0.3V to 16V

SW, RUN .......................................... –0.3V to VIN + 0.3V

SW Source Current (DC) .............................................2A

Peak SW Source Current ..........................................3.5A

Operating Junction Temperature Range

(Notes 2, 3) ........................................... –40°C to 125°C

Storage Temperature Range ................... –65°C to 125°C

Lead Temperature (Soldering, 10 sec)

MSOP ............................................................... 300°C

LTC3601

3601fb

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VVIN Input Supply Range l415V

IQInput DC Supply Current

Forced Continuous Operation

Sleep Current

Shutdown

MODE = 0V

MODE = INTVCC, VFB > 0.6V

RUN = 0V

700

300

1000

500

µA

VFB Feedback Reference Voltage l0.594 0.600 0.606 V

∆VLINEREG Reference Voltage Line Regulation VVIN = 4V to 15V 0.01 %/V

∆VLOADREG Output Voltage Load Regulation ITH = 0.6V to 1.6V 0.1 %

IFB Feedback Pin Input Current VFB = 0.6V ±30 nA

gm(EA) Error Ampliﬁ er Transconductance ITH = 1.2V 2.0 mS

tON(MIN) Minimum On-Time VON = 1V, VIN = 4V 20 ns

tOFF(MIN) Minimum Off-Time VIN = 6V 40 60 ns

ILIM Valley Switch Current Limit 1.7 2.2 2.8 A

fOSC Oscillator Frequency VRT = INTVCC

RRT = 160k

RRT = 80k

1.4

1.7

3.4

2.6

2.3

4.6

MHz

RDS(ON) Top Switch On-Resistance 130 m

Bottom Switch On-Resistance 100 m

VVIN-OV VIN Overvoltage Lockout Threshold VIN Rising

VIN Falling

16.8

15.8

17.5

16.5

VINTVCC INTVCC Voltage 4V < VIN < 15V 3.15 3.3 3.45 V

∆INTVCC INTVCC Load Regulation (Note 4) IINTVCC = 0mA to 20mA 0.6 %

VUVLO INTVCC Undervoltage Lockout

Threshold

INTVCC Rising, VIN = INTVCC

INTVCC Falling, VIN = INTVCC

2.75

2.45

2.9 V

VRUN RUN Threshold RUN Rising

RUN Falling

1.21

0.97

1.25

1.0

1.29

1.03

IRUN(LKG) RUN Leakage Current VVIN = 15V 0 ±3 µA

VFB_GB PGOOD Good-to-Bad Threshold FB Rising

FB Falling

–8

–10

VFB_BG PGOOD Bad-to-Good Threshold FB Rising

FB Falling

–3

–5

tPGOOD Power Good Filter Time 20 40 µs

RPGOOD PGOOD Pull-Down Resistance 10mA Load 15 

ISW(LKG) Switch Leakage Current VRUN = 0V 0.01 1 µA

tSS Internal Soft-Start Time VFB from 10% to 90% Full Scale 400 700 µs

VFB_TRACK TRACK Pin TRACK = 0.3V 0.28 0.3 0.315 V

ITRACK TRACK Pull-Up Current 1.4 µA

VMODE/

SYNC

MODE Threshold Voltage MODE VIH

MODE VIL

1.0

0.4

SYNC Threshold Voltage SYNC VIH l0.95 V

IMODE MODE Input Current MODE = 0V

MODE = INTVCC

–1.5

1.5

µA

The l denotes the speciﬁ cations which apply over the full operating

junction temperature range, otherwise speciﬁ cations are at TA = 25°C (Note 2). VVIN = 12V, unless otherwise speciﬁ ed.

LTC3601

3601fb

TYPICAL PERFORMANCE CHARACTERISTICS

Efﬁ ciency vs Load Current

Burst Mode Operation

Efﬁ ciency vs Load Current

Forced Continuous Mode

Efﬁ ciency vs Frequency

Forced Continuous Mode

Reference Voltage vs

Temperature

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3601 is tested under pulsed load conditions such that

TJ ≈ TA. The LTC3601E is guaranteed to meet speciﬁ cations from

0°C to 85°C junction temperature. Speciﬁ cations over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3601I is guaranteed over the full –40°C to 125°C operating junction

temperature range. Note that the maximum ambient temperature

consistent with these speciﬁ cations is determined by speciﬁ c operating

Efﬁ ciency vs Input Voltage

Burst Mode Operation

conditions in conjunction with board layout, the rated package thermal

impedance and other environmental factors.

Note 3: TJ is calculated from the ambient temperature, TA, and power

dissipation, PD, according to the following formula:

TJ = TA + (PD • θJA)

where θJA = 45°C/W for the QFN package and θJA = 38°C/W for the MSOP

package.

Note 4: Maximum allowed current draw when used as a regulated output

is 5mA. This supply is only intended to provide additional DC load current

as needed and not intended to regulate large transient or ac behavior as

these waveforms may impact LTC3601 operation.

Efﬁ ciency vs Load Current

TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted.

LOAD CURRENT (A)

EFFICIENCY (%)

100

0.001 0.1 1 10

3601 G01

0.01

VIN = 4V

VIN = 8V

VIN = 12V

VOUT = 1.8V

LOAD CURRENT (A)

EFFICIENCY (%)

100

0.001 0.1 1 10

3601 G02

0.01

VIN = 4V

VIN = 8V

VIN = 12V

VOUT = 1.8V

LOAD CURRENT (A)

EFFICIENCY (%)

100

0.001 0.1 1 10

3601 G03

0.01

VOUT = 3.3V

VOUT = 5V

BURST

FORCED

CONTINUOUS

INPUT VOLTAGE (V)

EFFICIENCY (%)

10 14

3601 G04

60 68 12

100

ILOAD = 500mA

ILOAD = 100mA

VOUT = 1.8V

FIGURE 7 CIRCUIT

ILOAD = 1.5A

ILOAD = 10mA

FREQUENCY (MHz)

0.5

EFFICIENCY (%)

1.0 1.5 2.0 2.5

3601 G05

3.0

L = 2.2µH

VOUT =1.8V

ILOAD = 500mA

L = 1µH

TEMPERATURE (°C)

–50 –25

0.595

VREF (V)

0.599

0.605

050 75

3601 G06

0.597

0.603

0.601

25 100 125

LTC3601

3601fb

TYPICAL PERFORMANCE CHARACTERISTICS

Quiescent Current vs

Supply Voltage

Oscillator Frequency vs

Temperature

RDS(ON) vs Temperature Switch Leakage vs Temperature

TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted.

TEMPERATURE (°C)

–50 –25

RDS(ON) (m)

200

050 75

3601 G07

160

120

25 100 125

TOP SWITCH

RDS(ON)

BOTTOM SWITCH

RDS(ON)

TEMPERATURE (°C)

–50

SWITCH LEAKAGE (nA)

4000

5000

6000

25 75

3601 G08

3000

2000

–25 0 50 100 125

1000

TOP SWITCH

BOTTOM SWITCH

VDS = 12V

SUPPLY VOLTAGE (V)

220

QUIESCENT CURRENT (µA)

260

300

340

380

6 8 10 12

3601 G09

14 16

TEMPERATURE (°C)

–50

FREQUENCY VARIATION (%)

1.5

3601 G10

–1.0

–25 0 50

–1.5

–2.0

2.0

1.0

0.5

–0.5

75 100 125

Bottom Switch Current Limit

vs Temperature Load Regulation

TEMPERATURE (°C)

–50

2.0

2.5

3.5

25 75

3601 G11

1.5

1.0

–25 0 50 100 125

0.5

3.0

ILIM (A)

ILOAD (mA)

1.2

1.0

0.8

0.6

0.4

0.2

–0.2 750 1250

3601 G21

250 500 1000 1500

∆VOUT/VOUT (%)

Burst Mode OPERATION

FORCED CONTINUOUS

Oscillator Internal Set Frequency

vs Temperature

TRACK Pull-Up Current

vs Temperature

TEMPERATURE (°C)

–50

FREQUENCY (MHz)

2.25

2.50

2.75

25 75

3601 G22

2.00

1.75

–25 0 50 100 125

1.50

1.25

RT = INTVCC

TEMPERATURE (°C)

–50

1.4

1.6

2.0

25 75

3601 G23

1.2

1.0

–25 0 50 100 125

0.8

0.6

1.8

ITRACK (µA)

LTC3601

3601fb

VOUT

100mV/DIV

AC COUPLED

ILOAD

1A/DIV

10µs/DIV 3601 G18

VIN = 12V

VOUT = 1.8V

ILOAD = 150mA TO 1.5A

1A/DIV

VOUT

100mV/DIV

AC COUPLED

ILOAD

1A/DIV

10µs/DIV 3601 G17

VIN = 12V

VOUT = 1.8V

ILOAD = 150mA TO 1.5A

1A/DIV

TYPICAL PERFORMANCE CHARACTERISTICS

Start-Up from Shutdown

Burst Mode Operation

Start-Up from Shutdown

Forced Continuous Mode

Load Step

Burst Mode Operation

Load Step

Forced Continuous Mode

Short-Circuit Waveforms

Forced Continuous Mode

TA = 25°C, VIN = 12V, fO = 1MHz, L = 2.2μH unless otherwise noted.

RUN

2V/DIV

PGOOD

5V/DIV

1A/DIV

200µs/DIV 3601 G15

VIN = 12V

VOUT = 1.8V

ILOAD = 20mA

VOUT

2V/DIV

RUN

2V/DIV

1A/DIV

200µs/DIV 3601 G16

VIN = 12V

VOUT = 1.8V

ILOAD = 1.5A

VOUT

1V/DIV

VOUT

1V/DIV

PGOOD

2V/DIV

100µs/DIV 3601 G19

VIN = 12V

VOUT = 1.8V

2A/DIV

Start-Up Into Pre-Biased Output

(1V Pre-Bias) Burst Mode

Operation

VOUT

1V/DIV

RUN

10V/DIV

PGOOD

5V/DIV

1ms/DIV 3601 G20

VIN = 12V

VOUT = 1.8V

ILOAD = 5mA

1A/DIV

Output Voltage vs Time

Burst Mode Operation

5V/DIV

1A/DIV

2µs/DIV 3601 G12

VIN = 12V

VOUT = 1.8V

ILOAD = 100mA

VOUT

20mV/DIV

AC COUPLED

Output Voltage vs Time

Forced Continuous Mode

5V/DIV

1A/DIV

2µs/DIV 3601 G13

VIN = 12V

VOUT = 1.8V

ILOAD = 100mA

VOUT

20mV/DIV

AC COUPLED

Output Tracking

2ms/DIV 3601 G14

VIN = 12V

VOUT = 1.8V

RLOAD = 36

VOUT

VFB

TRACK

LTC3601

3601fb

PIN FUNCTIONS

(QFN/MSE)

MODE/SYNC (Pin 1/Pin 15): Mode Selection and External

Synchronization Input Pin. This pin places the LTC3601

into forced continuous operation when tied to ground.

High efﬁ ciency Burst Mode operation is enabled by either

ﬂ oating this pin or by tying this pin to INTVCC. When driven

with an external clock, an internal phase-locked loop will

synchronize the phase and frequency of the internal oscil-

lator to that of the incoming clock signal. During external

clock synchronization, the LTC3601 will default to forced

continuous operation.

PGOOD (Pin 2/Pin 16): Open-Drain Power Good Output

Pin. PGOOD is pulled to ground when the voltage at the

FB pin is not within 8% (typical) of the internal 0.6V refer-

ence. PGOOD becomes high impedance once the voltage

at the FB pin returns to within ±5% (typical) of the internal

reference.

SW (Pins 3, 4/Pins 1, 2): Switch Node Output Pin. Con-

nect this pin to the SW side of the external inductor. The

normal operation voltage swing of this pin ranges from

ground to PVIN.

BOOST (Pin 6/Pin 5): Boosted Floating Driver Supply

Pin. The (+) terminal of the external bootstrap capacitor

connects to this pin while the (–) terminal connects to

the SW pin. The normal operation voltage swing of this

pin ranges from a diode voltage drop below INTVCC up

to PVIN + INTVCC.

INTVCC (Pin 7/Pin 6): Internal 3.3V Regulator Output Pin.

This pin should be decoupled to PGND with a low ESR

ceramic capacitor of 1µF or more.

VON (Pin 8/Pin 7): On-Time Voltage Input Pin. This pin

sets the voltage trip point for the on-time comparator.

Connect this pin to the regulated output to make the on-

time proportional to the output voltage when VOUT ≤ 6V. If

VOUT > 6V, switching frequency may become higher than

the set frequency. The pin impedance is normally 180k.

SGND (Pin 9/Exposed Pad Pin 17): Signal Ground Pin.

This pin should have a low noise connection to reference

ground. The feedback resistor network, external compen-

sation network and RT resistor should be connected to

this ground. In the MSE package, the exposed pad must

be soldered to the PCB to provide a good thermal contact

to the PCB.

RT (Pin 10/Pin 8): Oscillator Frequency Program Pin. Con-

nect an external resistor, between 80k to 400k, from this

pin to SGND to program the LTC3601 switching frequency

from 800kHz to 4MHz. When RT is tied to INTVCC, the

switching frequency will default to 2MHz.

FB (Pin 11/Pin 9): Output Voltage Feedback Pin. Input to

the error ampliﬁ er that compares the feedback voltage to

the internal 0.6V reference voltage. Connect this pin to

the appropriate resistor divider network to program the

desired output voltage.

ITH (Pin 12/Pin 10): Error Ampliﬁ er Output and Switching

Regulator Compensation Pin. Connect this pin to appro-

priate external components to compensate the regulator

loop frequency response. Connect this pin to INTVCC to

use the default internal compensation.

TRACK (Pin 13/Pin 11): Output Voltage Tracking and Soft-

Start Input Pin. Forcing a voltage below 0.6V on this pin

overrides the internal reference input to the error ampliﬁ er.

The LTC3601 will servo the FB pin to the TRACK voltage

under this condition. Above 0.6V, the tracking function

stops and the internal reference resumes control of the

error ampliﬁ er. An internal 1.4µA pull-up current from

INTVCC allows a soft-start function to be implemented

by connecting an external capacitor between this pin and

ground. See Applications Information section for more

details.

RUN (Pin 14/Pin 12): Regulator Enable Pin. Enables chip

operation by applying a voltage above 1.25V. A voltage

below 1V on this pin places the part into shutdown. Do

not ﬂ oat this pin.

VIN (Pins 15, 16/Pins 13, 14): Main Power Supply Input

Pins. These pins should be closely decoupled to PGND

with a low ESR capacitor of 10µF or more.

PGND (Exposed Pad Pin 17/Pins 3, 4): Power Ground Pin.

The (–) terminal of the input bypass capacitor, CIN, and the

(–) terminal of the output capacitor, COUT

, should be tied

to this pin with a low impedance connection. In the QFN

package the exposed pad must be soldered to the PCB to

provide low impedance electrical contact to ground and

good thermal contact to the PCB.

LTC3601

3601fb

FUNCTIONAL BLOCK DIAGRAM

–++

–+–+

VIN

15k

RUN

SWITCH

LOGIC

AND

ANTI-

SHOOT

THROUGH

0.48V 1.25V

RUN

INTERNAL

SOFT-START

TRACK

CSS

3605 BD

SGND

RUN

PGND

PGOOD

INTVCC

VIN

CIN

BOOST

SENSE+

SENSE–

–

0.648V

–

0.3V

FOLDBACK

DISABLED

AT START-UP

0.552V

180k

VON

INTVCC

COUT

INTVCC

ITH

CC1

CVCC

CBOOST

–

1.4µA

ITHB

ICMP IREV

3.3V

REG

ION

CONTROLLER

OSC

PLL-SYNC

OSC

0.6V

REF

ION

MODE/SYNC

RRT

tON = VVON

IION

AV = 1

LTC3601

3601fb

OPERATION

The LTC3601 is a current mode, monolithic, step-down

regulator capable of providing up to 1.5A of output current.

Its unique controlled on-time architecture allows extremely

low step-down ratios while maintaining a constant switch-

ing frequency. Part operation is enabled by raising the

voltage on the RUN pin above 1.25V nominally.

Main Control Loop

In normal operation the internal top power MOSFET is

turned on for a ﬁ xed interval determined by an internal

one-shot timer (“ON” signal in the Block Diagram). When

the top power MOSFET turns off, the bottom power MOS-

FET turns on until the current comparator, ICMP

, trips,

thus restarting the one-shot timer and initiating the next

cycle. The inductor current is monitored by sensing the

voltage drop across the SW and PGND nodes of the bot-

tom power MOSFET. The voltage at the ITH pin sets the

ICMP comparator threshold corresponding to the induc-

tor valley current. The error ampliﬁ er EA adjusts this ITH

voltage by comparing an internal 0.6V reference to the

feedback signal, VFB, derived from the output voltage. If, for

example, the load current increases, the feedback voltage

will decrease relative to the internal 0.6V reference. The

ITH voltage then rises until the average inductor current

matches that of the load current.

The operating frequency is determined by the value of the

RT resistor, which programs the current for the internal

oscillator. An internal phase-locked loop servos the switch-

ing regulator on-time to track the internal oscillator edge

and force a constant switching frequency. A clock signal

can be applied to the SYNC/MODE pin to synchronize the

switching frequency to an external source. The regulator

defaults to forced continuous operation once the clock

signal is applied.

At low load currents the inductor current can drop to

zero or become negative. If the LTC3601 is conﬁ gured for

Burst Mode operation, this inductor current condition is

detected by the current reversal comparator, IREV

, which

in turn shuts off the bottom power MOSFET and places

the part into a low quiescent current sleep state resulting

in discontinuous operation and increased efﬁ ciency at low

load currents. Both power MOSFETs will remain off with

the part in sleep and the output capacitor supplying the

load current until the ITH voltage rises sufﬁ ciently to initi-

ate another cycle. Discontinuous operation is disabled by

tying the MODE/SYNC pin to ground placing the LTC3601

into forced continuous mode. During forced continuous

mode, continuous synchronous operation occurs regard-

less of the output load current.

“Power Good” Status Output

The PGOOD open-drain output will be pulled low if the

regulator output exits a ±8% window around the regulation

point. This condition is released once regulation within

a 5% window is achieved. To prevent unwanted PGOOD

glitches during transients or dynamic VOUT changes, the

LTC3601 PGOOD falling edge includes a ﬁ lter time of ap-

proximately 40µs.

VIN Overvoltage Protection

In order to protect the internal power MOSFET devices

against transient voltage spikes, the LTC3601 constantly

monitors the VIN pin for an overvoltage condition. When

VIN rises above 17.5V, the regulator suspends operation

by shutting off both power MOSFETs. Once VIN drops

below 16.5V, the regulator immediately resumes normal

operation. The regulator does not execute its soft-start

function when exiting an overvoltage condition.

Short-Circuit Protection

Foldback current limiting is provided in the event the

output is inadvertently shorted to ground. During this

condition the internal current limit (ILIM) will be lowered

to approximately one-third its normal value. This feature

reduces the heat dissipation in the LTC3601 during short-

circuit conditions and protects both the IC and the input

supply from any potential damage.

LTC3601

3601fb

APPLICATIONS INFORMATION

A general LTC3601 application circuit is shown on the ﬁ rst

page of this data sheet. External component selection is

largely driven by the load requirement and begins with the

selection of the inductor L. Once the inductor is chosen,

the input capacitor, CIN, the output capacitor, COUT

, the

internal regulator capacitor, CINTVCC, and the boost capaci-

tor, CBOOST, can be selected. Next, the feedback resistors

are selected to set the desired output voltage. Finally, the

remaining optional external components can be selected

for functions such as external loop compensation, track/

soft-start, externally programmed oscillator frequency

and PGOOD.

Operating Frequency

Selection of the operating frequency is a trade-off between

efﬁ ciency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efﬁ ciency by

reducing internal gate charge losses but requires larger

inductance values and/or capacitance to maintain low

output ripple voltage.

The operating frequency, fO, of the LTC3601 is determined

by an external resistor that is connected between the RT

pin and ground. The value of the resistor sets the ramp

current that is used to charge and discharge an internal

timing capacitor within the oscillator and can be calculated

by using the following equation:

RRT =3.2 E11

where RRT is in  and fO is in Hz.

Connecting the RT pin to INTVCC will default the converter

to fO = 2MHz; however, this switching frequency will be

more sensitive to process and temperature variations than

when using a resistor on RT (see Typical Performance

Characteristics).

Inductor Selection

For a given input and output voltage, the inductor value and

operating frequency determine the inductor ripple current.

More speciﬁ cally, the inductor ripple current decreases

with higher inductor value or higher operating frequency

according to the following equation:

IL=VOUT

f•L









1– VOUT

VIN











where ∆IL = inductor ripple current, f = operating frequency

and L = inductor value. A trade-off between component

size, efﬁ ciency and operating frequency can be seen from

this equation. Accepting larger values of ∆IL allows the

use of lower value inductors but results in greater core

loss in the inductor, greater ESR loss in the output capaci-

tor, and larger output ripple. Generally, highest efﬁ ciency

operation is obtained at low operating frequency with

small ripple current.

A reasonable starting point for setting the ripple current is

about 40% of IOUT(MAX). Note that the largest ripple current

occurs at the highest VIN. To guarantee the ripple current

does not exceed a speciﬁ ed maximum the inductance

should be chosen according to:

L=VOUT

f•IL(MAX)













1– VOUT

VIN(MAX)













Once the value for L is known the type of inductor must

be selected. Actual core loss is independent of core size

for a ﬁ xed inductor value but is very dependent on the

inductance selected. As the inductance increases, core loss

decreases. Unfortunately, increased inductance requires

more turns of wire leading to increased copper loss.

Ferrite designs exhibit very low core loss and are pre-

ferred at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core materials saturate “hard,” meaning the induc-

tance collapses abruptly when the peak design current is

RT (kΩ)

FREQUENCY (kHz)

1000

2000

3000

4000

6000

100 200 300 400

3601 F01

500 600

5000

Figure 1. Switching Frequency vs RT

LTC3601

3601fb

APPLICATIONS INFORMATION

exceeded. This collapse will result in an abrupt increase

in inductor ripple current, so it is important to ensure the

core will not saturate.

Different core materials and shapes will change the

size/current and price/current relationship of an induc-

tor. Toroid or shielded pot cores in ferrite or permalloy

materials are small and don’t radiate much energy but

generally cost more than powdered iron core inductors

with similar characteristics. The choice of which style

inductor to use mainly depends on the price versus size

requirements and any radiated ﬁ eld/EMI requirements.

New designs for surface mount inductors are available

from Toko, Vishay, NEC/Tokin, Cooper, Coilcraft, TDK and

Würth Electronik. Table 1 gives a sampling of available

surface mount inductors.

Table 1. Inductor Selection Table

INDUCTANCE

(μH)

DCR

(mΩ)

MAX

CURRENT

(A)

DIMENSIONS

(mm)

HEIGHT

(mm)

Würth Electronik WE-PD2 Typ MS Series

0.56

0.82

1.2

1.7

2.2

9.5

6.5

5.4

4.8

3.6

5.2 × 5.8 2

Vishay IHLP-2020BZ-01 Series

0.47

0.68

2.2

8.8

12.4

50.1

11.5

4.2

5.2 × 5.5 2

Toko DE3518C Series

0.56

1.2

1.7

3.3

2.4

2.1

3.5 × 3.7 1.8

Sumida CDRH2D18/HP Series

0.56

0.82

1.1

3.7

2.9

2.5

3.2 × 3.2 2

Cooper SD18 Series

0.47

0.82

1.2

1.5

2.2

20.1

24.7

29.4

34.5

39.8

3.58

3.24

2.97

2.73

2.55

5.5 × 5.5 1.8

Coilcraft LPS4018 Series

0.56

2.2

4.8

2.8

2.7

4 × 4 1.7

TDK VLS252012 Series

0.47

1.5

2.2

126

155

3.3

2.4

1.8

2.5 × 2 1.2

CIN and COUT Selection

The input capacitance, CIN, is needed to ﬁ lter the trapezoi-

dal wave current at the drain of the top power MOSFET.

To prevent large voltage transients from occurring a low

ESR input capacitor sized for the maximum RMS current

is recommended. The maximum RMS current is given by:

IRMS =IOUT(MAX)

VOUT V

IN –V

OUT

(

)

VIN

where IOUT(MAX) equals the maximum average output

current. This formula has a maximum at VIN = 2VOUT

where IRMS = IOUT/2. This simple worst-case condition

is commonly used for design because even signiﬁ cant

deviations do not offer much relief. Note that ripple cur-

rent ratings from capacitor manufacturers are often based

on only 2000 hours of life which makes it advisable to

further de-rate the capacitor or choose a capacitor rated

at a higher temperature than required.

Several capacitors may be paralleled to meet the require-

ments of the design. For low input voltage applications

sufﬁ cient bulk input capacitance is needed to minimize

transient effects during output load changes. Even though

the LTC3601 design includes an overvoltage protection

circuit, care must always be taken to ensure input voltage

transients do not pose an overvoltage hazard to the part.

The selection of COUT is primarily determined by the effec-

tive series resistance (ESR) that is required to minimize

voltage ripple and load step transients. The output ripple,

∆VOUT, is determined by:

VOUT <ILESR +1

8•f•C

OUT











The output ripple is highest at maximum input voltage

since ∆IL increases with input voltage. Multiple capacitors

placed in parallel may be needed to meet the ESR and

RMS current handling requirements. Dry tantalum, special

polymer, aluminum electrolytic, and ceramic capacitors are

all available in surface mount packages. Special polymer

capacitors offer low ESR but have lower capacitance

density than other types. Tantalum capacitors have the

highest capacitance density, but it is important to only

LTC3601

3601fb

APPLICATIONS INFORMATION

use types that have been surge tested for use in switching

power supplies. Aluminum electrolytic capacitors have

signiﬁ cantly higher ESR but can be used in cost-sensitive

applications provided that consideration is given to ripple

current ratings and long-term reliability. Ceramic capacitors

have excellent low ESR characteristics and small footprints.

Their relatively low value of bulk capacitance may require

multiple capacitors in parallel.

Using Ceramic Input and Output Capacitors

Higher value, lower cost ceramic capacitors are now

available in small case sizes. Their high voltage rating

and low ESR make them ideal for switching regulator

applications. However, due to the self-resonant and high-Q

characteristics of some types of ceramic capacitors, care

must be taken when these capacitors are used at the input

and output. When a ceramic capacitor is used at the input,

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

VIN input. At best, this ringing can couple to the output and

be mistaken as loop instability. At worst, a sudden inrush

of current through the long wires can potentially cause a

voltage spike at VIN large enough to damage the part. For

a more detailed discussion, refer to Application Note 88.

When choosing the input and output ceramic capacitors

choose the X5R or X7R dielectric formulations. These

dielectrics provide the best temperature and voltage

characteristics for a given value and size.

INTVCC Regulator Bypass Capacitor

An internal low dropout (LDO) regulator produces a

3.3V supply voltage used to power much of the internal

LTC3601 circuitry including the power MOSFET gate

drivers. The INTVCC pin connects to the output of this

regulator and must have a minimum of 1µF of decoupling

capacitance to ground. The decoupling capacitor should

have low impedance electrical connections to the INTVCC

and PGND pins to provide the transient currents required

by the LTC3601. The user may connect a maximum load

current of 5mA to this pin but must take into account the

increased power dissipation and die temperature that

results. Furthermore, this supply is intended only to supply

additional DC load currents as desired and not intended

to regulate large transient or AC behavior this may impact

LTC3601 operation.

Boost Capacitor

The boost capacitor, CBOOST

, is used to create a voltage rail

above the applied input voltage VIN. Speciﬁ cally, the boost

capacitor is charged to a voltage equal to approximately

INTVCC each time the bottom power MOSFET is turned

on. The charge on this capacitor is then used to supply

the required transient current during the remainder of the

switching cycle. When the top MOSFET is turned on, the

BOOST pin voltage will be equal to approximately VIN +

3.3V. For most applications a 0.1µF ceramic capacitor will

provide adequate performance.

Output Voltage Programming

The LTC3601 will adjust the output voltage such that VFB

equals the reference voltage of 0.6V according to:

VOUT =0.6V 1+R1











The desired output voltage is set by appropriate selection of

resistors R1 and R2 as shown in Figure 2. Choosing large

values for R1 and R2 will result in improved efﬁ ciency but

may lead to undesirable noise coupling or phase margin

reduction due to stray capacitances at the FB node. Care

should be taken to route the FB line away from any noise

source, such as the SW line.

To improve the frequency response of the main control

loop a feedforward capacitor, CF

, may be used as shown

in Figure 2.

3601 F02

VOUT

SGND

LTC3601

Figure 2. Optional Feedforward Capacitor

LTC3601

3601fb

APPLICATIONS INFORMATION

Minimum Off-Time/On-Time Considerations

The minimum off-time is the smallest amount of time that

the LTC3601 can turn on the bottom power MOSFET, trip

the current comparator and turn the power MOSFET back

off. This time is typically 40ns. For the controlled on-time

current mode control architecture, the minimum off-time

limit imposes a maximum duty cycle of:

DC(MAX) =1– f•tOFF(MIN)

(

)

where f is the switching frequency and tOFF(MIN) is the

minimum off-time. If the maximum duty cycle is surpassed,

due to a dropping input voltage for example, the output

will drop out of regulation. The minimum input voltage to

avoid this dropout condition is:

VIN(MIN) =VOUT

1−f•tOFF(MIN)

(

)

Conversely, the minimum on-time is the smallest dura-

tion of time in which the top power MOSFET can be in

its “on” state. This time is typically 20ns. In continuous

mode operation, the minimum on-time limit imposes a

minimum duty cycle of:

DC(MIN) =f•tON(MIN)

(

)

where tON(MIN) is the minimum on-time. As the equation

shows, reducing the operating frequency will alleviate the

minimum duty cycle constraint.

In the rare cases where the minimum duty cycle is

surpassed, the output voltage will still remain in regula-

tion, but the switching frequency will decrease from its

programmed value. This is an acceptable result in many

applications, so this constraint may not be of critical

importance in most cases, and high switching frequen-

cies may be used in the design without any fear of severe

consequences. As the sections on Inductor and Capacitor

Selection show, high switching frequencies allow the use

of smaller board components, thus reducing the footprint

of the application circuit.

Internal/External Loop Compensation

The LTC3601 provides the option to use a ﬁ xed internal

loop compensation network to reduce both the required

external component count and design time. The internal

loop compensation network can be selected by connect-

ing the ITH pin to the INTVCC pin. To ensure stability, it

is recommended that the output capacitance be at least

47µF when using internal compensation. Alternatively,

the user may choose speciﬁ c external loop compensation

components to optimize the main control loop transient

response as desired. External loop compensation is chosen

by simply connecting the desired network to the ITH pin.

Suggested compensation component values are shown in

Figure 3. For a 2MHz application, an R-C network of 220pF

and 13k provides a good starting point. The bandwidth

of the loop increases with decreasing C. If R is increased

by the same factor that C is decreased, the zero frequency

will be kept the same, thereby keeping the phase the same

in the most critical frequency range of the feedback loop.

A 10pF bypass capacitor on the ITH pin is recommended

for the purposes of ﬁ ltering out high frequency coupling

from stray board capacitance. In addition, a feedforward

capacitor CF can be added to improve the high frequency

response, as previously shown in Figure 2. Capacitor CF

provides phase lead by creating a high frequency zero

with R1 which improves the phase margin.

Figure 3. Compensation Components

ITH

RCOMP

13k

CCOMP

220pF

CBYP

3601 F03

SGND

LTC3601

3601fb

Checking Transient Response

The regulator loop response can be checked by observing

the response of the system to a load step. When conﬁ g-

ured for external compensation, the availability of the

ITH pin not only allows optimization of the control loop

behavior but also provides a DC coupled and AC ﬁ ltered

closed-loop response test point. The DC step, rise time,

and settling behavior at this test point reﬂ ect the system’s

closed-loop response. Assuming a predominantly second

order system, the phase margin and/or damping factor can

be estimated by observing the percentage of overshoot

seen at this pin. The ITH external components shown in

Figure 3 will provide an adequate starting point for most

applications. The series R-C ﬁ lter sets the pole-zero loop

compensation. The values can be modiﬁ ed slightly, from

approximately 0.5 to 2 times their suggested values, to

optimize transient response once the ﬁ nal PC layout is

done and the particular output capacitor type and value

have been determined. The output capacitors need to be

selected because their various types and values determine

the loop feedback factor gain and phase. An output cur-

rent pulse of 20% to 100% of full load current with a rise

time of 1µs to 10µs will produce output voltage and ITH

pin waveforms that will give a sense of the overall loop

stability without breaking the feedback loop

When observing the response of VOUT to a load step, the

initial output voltage step may not be within the bandwidth

of the feedback loop. As a result, the standard second

order overshoot/DC ratio cannot be used to estimate

phase margin. The output voltage settling behavior is

related to the stability of the closed-loop system and will

demonstrate the actual overall supply performance. For

a detailed explanation of optimizing the compensation

components, including a review of control loop theory,

refer to Linear Technology Application Note 76. As shown

in Figure 2 a feedforward capacitor, CF

, may be added

across feedback resistor R1 to improve the high frequency

response of the system. Capacitor CF provides phase lead

by creating a high frequency zero with R1.

APPLICATIONS INFORMATION

In some applications severe transients can be caused by

switching in loads with large (>10µF) input capacitors. The

discharged input capacitors are effectively put in parallel

with COUT

, causing a rapid drop in VOUT. No regulator can

deliver enough current to prevent this output droop if the

switch connecting the load has low resistance and is driven

quickly. The solution is to limit the turn-on speed of the

load switch driver. A Hot Swap™ controller is designed

speciﬁ cally for this purpose and usually incorporates cur-

rent limit, short-circuit protection and soft-start functions.

MODE/SYNC Operation

The MODE/SYNC pin is a multipurpose pin allowing both

mode selection and operating frequency synchronization.

Connecting this pin to INTVCC enables Burst Mode operation

for superior efﬁ ciency at low load currents at the expense

of slightly higher output voltage ripple. When the MODE/

SYNC pin is pulled to ground, forced continuous mode

operation is selected creating the lowest ﬁ xed output ripple

at the expense of light load efﬁ ciency.

The LTC3601 will detect the presence of the external clock

signal on the MODE/SYNC pin and synchronize the internal

oscillator to the phase and frequency of the incoming clock.

The presence of an external clock will place the LTC3601

into forced continuous mode operation.

Output Voltage Tracking and Soft-Start

The LTC3601 allows the user to control the output voltage

ramp rate by means of the TRACK pin. From 0V to 0.6V

the TRACK pin will override the internal reference input

to the error ampliﬁ er forcing regulation of the feedback

voltage to that seen at the TRACK pin. When the voltage

at the TRACK pin rises above 0.6V, tracking is disabled

and the feedback voltage will be regulated to the internal

reference voltage.

The voltage at the TRACK pin may be driven from an ex-

ternal source, or alternatively, the user may leverage the

internal 1.4µA pull-up current on TRACK to implement

LTC3601

3601fb

APPLICATIONS INFORMATION

a soft-start function by connecting a capacitor from the

TRACK pin to ground. The relationship between output

rise time and TRACK capacitance is given by:

SS = 430,000 × CTRACK

A default internal soft-start timer forces a minimum soft-

start time of 400µs by overriding the TRACK pin input

during this time period. Hence, capacitance values less

than approximately 1000pF will not signiﬁ cantly affect

soft-start behavior.

When using the TRACK pin, the regulator defaults to

Burst Mode operation until the output exceeds 80% of

its ﬁ nal value (VFB > 0.48V). Once the output reaches this

voltage, the operating mode of the regulator switches to

the mode selected by the MODE/SYNC pin as described

above. During normal operation, if the output drops below

10% of its ﬁ nal value (as it may when tracking down, for

instance), the regulator will automatically switch to Burst

Mode operation to prevent inductor saturation and improve

TRACK pin accuracy.

Output Power Good

The PGOOD output of the LTC3601 is driven by a 15Ω

(typical) open-drain pull-down device. This device will be

turned off once the output voltage is within 5% (typical) of

the target regulation point allowing the voltage at PGOOD

to rise via an external pull-up resistor (100k typical). If

the output voltage exits a 8% (typical) regulation window

around the target regulation point the open-drain output

will pull down with 15Ω output resistance to ground, thus

dropping the PGOOD pin voltage. A ﬁ lter time of 40µs

(typical) acts to prevent unwanted PGOOD output changes

during VOUT transient events. As a result, the output volt-

age must be within the target regulation window of 5%

for 40µs before the PGOOD pin is pulled high. Conversely,

the output voltage must exit the 8% regulation window for

40µs before the PGOOD pin pulls to ground (see Figure 4).

Efﬁ ciency Considerations

The percent efﬁ ciency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efﬁ ciency and which change would

produce the most improvement. Percent efﬁ ciency can

be expressed as:

% Efﬁ ciency = 100% – (L1 + L2 + L3 +…)

where L1, L2, etc. are the individual loss terms as a per-

centage of input power.

Although all dissipative elements in the circuit produce

losses, three main sources account for the majority of the

losses in the LTC3601: 1) I2R loss, 2) switching losses

and quiescent current loss, 3) transition losses and other

system losses.

1. I2R loss is calculated from the DC resistances of the

internal switches, RSW

, and external inductor, RL. In

continuous mode, the average output current will

ﬂ ow through inductor L but is “chopped” between the

internal top and bottom power MOSFETs. Thus, the

series resistance looking into the SW pin is a function

of both the top and bottom MOSFET’s RDS(ON) and the

duty cycle (DC) as follows:

SW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)

PGOOD

VOLTAGE

VOUT

–8% –5% 5% 8%

3601 F04

NOMINAL OUTPUT

Figure 4. PGOOD Pin Behavior

LTC3601

3601fb

The RDS(ON) for both the top and bottom MOSFETs can be

obtained from the Typical Performance Characteristics

curves. Thus to obtain I2R loss:

“I

2R LOSS” = IOUT2 · (RSW + RL)

2. The internal LDO supplies the power to the INTVCC rail.

The total power loss here is the sum of the switching

losses and quiescent current losses from the control

circuitry.

Each time a power MOSFET gate is switched from low

to high to low again, a packet of charge dQ moves

from VIN to ground. The resulting dQ/dt is a current

out of INTVCC that is typically much larger than the DC

control bias current. In continuous mode, IGATECHG

= f(QT + QB), where QT and QB are the gate charges

of the internal top and bottom power MOSFETs and f

is the switching frequency. For estimation purposes,

(QT + QB) on the LTC3601 is approximately 1nC.

To calculate the total power loss from the LDO load,

simply add the gate charge current and quiescent cur-

rent and multiply by VIN:

LDO = (IGATECHG + IQ) • VIN

3. Other “hidden” losses such as transition loss, cop-

per trace resistances, and internal load currents can

account for additional efﬁ ciency degradations in the

overall power system. Transition loss arises from the

brief amount of time the top power MOSFET spends in

the saturated region during switch node transitions. The

LTC3601 internal power devices switch quickly enough

that these losses are not signiﬁ cant compared to other

sources.

Other losses, including diode conduction losses during

dead time and inductor core losses, generally account

for less than 2% total additional loss.

APPLICATIONS INFORMATION

Thermal Considerations

The LTC3601 requires the exposed package backplane

metal (PGND pin on the QFN, SGND pin on the MSOP

package) to be well soldered to the PC board to provide

good thermal contact. This gives the QFN and MSOP

packages exceptional thermal properties, compared to

other packages of similar size, making it difﬁ cult in normal

operation to exceed the maximum junction temperature

of the part. In many applications, the LTC3601 does not

dissipate much heat due to its high efﬁ ciency and low

thermal resistance package backplane. However, in applica-

tions in which the LTC3601 is running at a high ambient

temperature, high input voltage, high switching frequency,

and maximum output current, the heat dissipated may

exceed the maximum junction temperature of the part. If

the junction temperature reaches approximately 150°C,

both power switches will be turned off until temperature

decreases approximately 10°C.

Thermal analysis should always be performed by the user

to ensure the LTC3601 does not exceed the maximum

junction temperature.

The temperature rise is given by:

RISE = PDθJA

where PD is the power dissipated by the regulator and θJA

is the thermal resistance from the junction of the die to

the ambient temperature.

Consider the example in which an LTC3601EUD is operat-

ing with IOUT = 1.5A, VIN = 12V, f = 4MHz, VOUT = 1.8V,

and an ambient temperature of 70°C. From the Typical

Performance Characteristics section the RDS(ON) of the top

switch is found to be nominally 130mΩ while that of the

bottom switch is nominally 100mΩ yielding an equivalent

power MOSFET resistance RSW of:

RDS(ON)TOP • 1.8/12 + RDS(ON)BOT • 10.2/12 = 105mΩ.

LTC3601

3601fb

From the previous section, IGATECHG is ~4mA when f =

4MHz, and the spec table lists the typical IQ to be 1mA.

Therefore, the total power dissipation due to resistive

losses and LDO losses is:

PD = IOUT2 • RSW + VIN • (IGATECHG + IQ)

PD = (1.5)2 • (0.105) + 12V • 5mA = 296mW

The QFN 3mm × 3mm package junction-to-ambient thermal

resistance, θJA, is around 45°C/W. Therefore, the junction

temperature of the regulator operating in a 70°C ambient

temperature is approximately:

J = 0.296 • 45 + 70 = 83.3°C

which is well below the speciﬁ ed maximum junction

temperature of 125°C.

Board Layout Considerations

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the LTC3601.

1. Do the capacitors CIN connect to VIN and PGND as close

to the pins as possible? These capacitors provide the AC

current to the internal power MOSFETs and drivers. The

(–) plate of CIN should be closely connected to PGND

and the (–) plate of COUT.

2. The output capacitor, COUT

, and inductor L1 should

be closely connected to minimize loss. The (–) plate

of COUT should be closely connected to PGND and the

(–) plate of CIN.

3. The resistive divider, R1 and R2, must be connected

between the (+) plate of COUT and a ground line termi-

nated near SGND. The feedback signal, VFB, should be

routed away from noisy components and traces such as

the SW line, and its trace length should be minimized.

In addition, RT and the loop compensation components

should be terminated to SGND.

4. Keep sensitive components away from the SW pin. The

RRT resistor, the feedback resistors, the compensation

components, and the INTVCC bypass capacitor should

all be routed away from the SW trace and the inductor.

5. A ground plane is preferred, but if not available the

signal and power grounds should be segregated with

both connecting to a common, low noise reference

point. The point at which the ground terminals of the

VIN and VOUT bypass capacitors are connected makes a

good, low noise reference point. The connection to the

PGND pin should be made with a minimal resistance

trace from the reference point.

6. Flood all unused areas on all layers with copper in order

to reduce the temperature rise of power components.

These copper areas should be connected to the exposed

backside connection of the IC.

APPLICATIONS INFORMATION

LTC3601

3601fb

APPLICATIONS INFORMATION

16 15 14 13

5 6 7 8

VIA TO

VOUT

VIA TO

PGND

CFWD

VIAS TO

INTVCC

VIAS TO

PGND

CIN

COUT

CBOOST

VIAS

TO PGND

CINTVCC

PGND VIAS TO

GROUND

PLANE

VIAS TO

GROUND

PLANE

VIA TO R2

VIN

VOUT

3601 F05

Figure 5. QFN Layout Example

LTC3601

3601fb

CBOOST

COUT

VOUT PGND VIN

CIN

3601 F06

CFWD

VIA TO INTVCC

VIA TO VOUT

CINTVCC

PIN 1

VIA TO

INTVCC

VIA TO

VOUT

Figure 6. MSE Layout Example

APPLICATIONS INFORMATION

LTC3601

3601fb

Design Example

As a design example, consider using the LTC3601 in an

application with the following speciﬁ cations:

VIN = 12V, VOUT = 1.8V, IOUT(MAX) = 1.5A, IOUT(MIN) =

10mA, f = 1MHz

Because efﬁ ciency is important at both high and low load

currents, Burst Mode operation is selected.

First, the correct RRT resistor value for 1MHz switching

frequency must be chosen. Based on the equation dis-

cussed earlier, RRT should be 324k.

Next, determine the inductor value for approximately 40%

ripple current using:

L=1.8V

1MH z • 6 0 0 m A









1– 1.8V

12V









=2.55μH

A standard value 2.2µH inductor will work well for this

application.

Next, COUT is selected based on the required output

transient performance and the required ESR to satisfy

the output voltage ripple. For this design, a 22µF ceramic

capacitor will be used.

CIN should be sized for a maximum current rating of:

IRMS =1.5A 1.8V 12V – 1.8V

()

12V













=0.54A

Decoupling the VIN pins with a 22µF ceramic capacitor

should be adequate for most applications. A 0.1µF boost

capacitor should also work for most applications.

To save board space the ITH pin is connected to the INTVCC

pin to select an internal compensation network.

The PGOOD pin is connected to VIN through a 100k resistor.

Figure 7. 1.8V, 1.5A Regulator at 1MHz

APPLICATIONS INFORMATION

VIN

MODE/SYNC

RUN

INTVCC

PGOOD

ITH

LTC3601

PGNDSGND

BOOST

VON

TRACK

2.2μF

CFWD

10pF

0.1μF

COUT

47μF

VOUT

1.8V

1.5A

80k

40k

100k

324k CIN: TDK C3225X5R1C226M

COUT: TDK C3225X5R0J476M

L1: VISHAY IHLP2020BZER2R2M01

3601 F05

2.2μH

CIN

22μF

VIN

4V TO 15V

LTC3601

3601fb

TYPICAL APPLICATIONS

12V Input to 1.8V Output at 4MHz Synchronized

Frequency with 6V UVLO and 4.3ms Soft-Start

Efﬁ ciency vs Load Current

VIN

RUN

INTVCC

PGOOD

ITH

LTC3601

PGND EXTERNAL

CLOCK

SGND

BOOST

VON

TRACK

MODE/SYNC

2.2μF

270pF

10pF

0.1μF

10nF

COUT

22μF

VOUT

1.8V

1.5A

80k

40k

154k

40k

100k

80k

10k

3601 TA02a

0.68μH

CIN

22μF

VIN

12V

CIN: TDK C3225X5R1C226M

COUT: TDK C3216X5R0J226M

L1: VISHAY IHLP2020BZERR68M01

LOAD CURRENT (A)

0.01

EFFICIENCY (%)

0.1 1 10

3601 TA02b

LTC3601

3601fb

8.4V Input to 3.3V Output at 2MHz Operating

Frequency Using Forced Continuous Mode

Efﬁ ciency vs Load Current

VIN

RUN

PGOOD

TRACK

LTC3601

PGNDSGND

INTVCC

ITH

MODE/SYNC

BOOST

VON

0.1μF

COUT

47μF

VOUT

3.3V

1.5A

90.9k

CFF

10pF

20k

3601 TA03a

2.2μH

2.2μF

47μF

VIN

8.4V

CIN: TDK C3225X5R1C476M

COUT: TDK C3216X5R0J476M

L1: VISHAY IHLP2020BZER2R2M01

LOAD CURRENT (A)

0.01

EFFICIENCY (%)

0.1 1 10

3601 TA03b

100

TYPICAL APPLICATIONS

LTC3601

3601fb

UD Package

16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691)

3.00 p 0.10

(4 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.45 p 0.05

(4 SIDES)

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

PIN 1

TOP MARK

(NOTE 6)

0.40 p 0.10

BOTTOM VIEW—EXPOSED PAD

1.45 p 0.10

(4-SIDES)

0.75 p 0.05 R = 0.115

TYP

0.25 p 0.05

PIN 1 NOTCH R = 0.20 TYP

OR 0.25 s 45o CHAMFER

15 16

0.50 BSC

0.200 REF

2.10 p 0.05

3.50 p 0.05

0.70 p0.05

0.00 – 0.05

(UD16) QFN 0904

0.25 p0.05

0.50 BSC

PACKAGE

OUTLINE

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3601

3601fb

MSE Package

16-Lead Plastic MSOP, Exposed Die Pad

(Reference LTC DWG # 05-08-1667 Rev E)

MSOP (MSE16) 0911 REV E

0.53 t 0.152

(.021 t .006)

SEATING

PLANE

0.18

(.007)

1.10

(.043)

MAX

0.17 –0.27

(.007 – .011)

TYP

0.86

(.034)

REF

0.50

(.0197)

BSC

16151413121110

12345678

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL

NOT EXCEED 0.254mm (.010") PER SIDE.

0.254

(.010) 0s – 6s TYP

DETAIL “A”

GAUGE PLANE

5.23

(.206)

MIN

3.20 – 3.45

(.126 – .136)

0.889 t 0.127

(.035 t .005)

RECOMMENDED SOLDER PAD LAYOUT

0.305 t 0.038

(.0120 t .0015)

TYP

0.50

(.0197)

BSC

BOTTOM VIEW OF

EXPOSED PAD OPTION

2.845 t 0.102

(.112 t .004)

2.845 t 0.102

(.112 t .004)

4.039 t 0.102

(.159 t .004)

(NOTE 3)

1.651 t 0.102

(.065 t .004)

1.651 t 0.102

(.065 t .004)

0.1016 t 0.0508

(.004 t .002)

3.00 t 0.102

(.118 t .004)

(NOTE 4)

0.280 t 0.076

(.011 t .003)

REF

4.90 t 0.152

(.193 t .006)

DETAIL “B”

CORNER TAIL IS PART OF

THE LEADFRAME FEATURE.

FOR REFERENCE ONLY

NO MEASUREMENT PURPOSE

0.12 REF

0.35

REF

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC3601

3601fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER

A 4/10 Changed Temperature Range for E-Grade to –40°C to 125°C in Order Information Sections

Updated Note 2

Updated Pin Functions

Updated Functional Block Diagram

Updated Equation in Applications Information Section

Updated Related Parts

11, 15

B 11/11 Changed Units from mV to V on the VF_TRACK speciﬁ cation

Updated Axis labels on graphs G17 and G18

LTC3601

3601fb

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

LT 1111 REV B • PRINTED IN USA

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LTC3602 10V, 2.5A (IOUT), 3MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 4.5V to 10V, VOUT(MIN) = 0.6V, IQ = 75µA,

ISD < 1µA, 4mm × 4mm QFN-20, TSSOP-16E

LTC3603 15V, 2.5A (IOUT), 3MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75µA,

ISD < 1µA, 4mm × 4mm QFN-20

LTC3604 15V, 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300µA,

ISD < 14mA, 3mm × 3mm QFN-16 and MSOP-16E Packages

LTC3605 15V, 5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 2mA,

ISD < 15µA, 4mm × 4mm QFN-24

LTC3610 24V, 12A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 4V to 24V, VOUT(MIN) = 0.6V, IQ = 900µA,

ISD < 15µA, 9mm × 9mm QFN-64

LTC3611 32V, 10A (IOUT), 1MHz, Synchronous Step-Down DC/DC Converter 95% Efﬁ ciency, VIN: 4V to 32V, VOUT(MIN) = 0.6V, IQ = 900µA,

ISD < 15µA, 9mm × 9mm QFN-64

TYPICAL APPLICATION

1.2V Output at 2MHz Operating Frequency

VIN

RUN

PGOOD

TRACK

LTC3601

PGNDSGND

INTVCC

ITH

MODE/SYNC

BOOST

VON

0.1μF

COUT

47μF

VOUT

1.2V

1.5A

20k

CFF

10pF

20k

3601 TA04

1μH

2.2μF

22μF

VIN

12V

CIN: TDK C3225X5R1C226M

COUT: TDK C3225X5R0J476M

L1: VISHAY IHLP2020BZER1R0M01

Efﬁ ciency vs Load Current

LOAD CURRENT (A)

0.01

EFFICIENCY (%)

0.1 1 10

3601 TA04b

100

VIN = 8V

VIN = 15V