TSM971/72/73/82/84
Page 1
© 2014 Silicon Laboratories, Inc. All rights reserved.
FEATURES
Alternate source for:
MAX971/MAX972/MAX973/MAX982/MAX984
Ultra-Low Quiescent Current Over Temperature
TSM971 Single+Reference: 4A (max)
TSM972: Dual Comparator Only: 4A (max)
TSM973/TSM982 Dual+Reference: 6A (max)
TSM984 Quad+Reference: 8.5A (max)
Single or Dual Power Supplies:
Single: +2.5V to +11V
Dual: ±1.25V to ±5.5V
Input Voltage Range Includes Negative Supply
12s Propagation Delay at 10mV Overdrive
Open-drain Output Stages for Wired-OR
Applications
Internal 1.182V±1% Reference: TSM971/TSM973
Internal 1.182V±2% Reference: TSM982/TSM984
Adjustable Hysteresis: TSM971/TSM973/TSM982
Separate Output GND Pin: TSM971/TSM984
APPLICATIONS
Threshold Detectors
Window Comparator
Level Translators
Oscillator Circuits
Battery-Powered Systems
DESCRIPTION
The TSM971/972/973/982/984 family of
single/dual/quad, low-voltage, micropower analog
comparators is electrically and form-factor identical to
the MAX971/972/973/982/984 family of analog
comparators. Ideal for 3V or 5V single-supply
applications, this comparator family can operate from
single +2.5V to +11V supplies or from ±1.25V to
±5.5V dual supplies. The single TSM971 and the dual
TSM972 draw less than 4A (max) supply current
over temperature. The TSM973/TSM982 duals and
the quad TSM984 draw less than 3A per comp arator
over temperature.
All comparators in this family exhibit an input voltage
range from the negative supply rail to within 1.3V of
the positive supply. Wired-OR applications are
enabled as the comparators’ output stages are open-
drain. A 1.182V reference is internal to the
TSM971/TSM973 (±1%) and the TSM982/TSM984
(±2%). Without complicated feedback configurations
and only requiring two additional resistors, adding
external hysteresis is available on the TSM971,
TSM973, and the TSM982.
Ultra-Low-Power, Open-Drain Single/Dual-Supply Comparators
TYPICAL APPLICATION CIRCUIT
A 5V, Low-Parts-Count Window Detector PART INTERNAL
REFERENCE COMPARATORS
PER PACKAGE INTERNAL
HYSTERESIS
TSM971 Yes, ±1% 1 Yes
TSM972 No 2 No
TSM973 Yes, ±1% 2 Yes
TSM982 Yes, ±2% 2 Yes
TSM984 Yes, ±2% 4 No
PART TEMPERATURE
RANGE PACKAGE
TSM971C 0ºC to 70ºC
8-Pin MSOP/SOIC
TSM971E -40ºC to 85ºC
TSM972C 0ºC to 70ºC 8-Pin MSOP/SOIC
TSM972E -40ºC to 85ºC
TSM973C 0ºC to 70ºC 8-Pin MSOP/SOIC
TSM973E -40ºC to 85ºC
TSM982C 0ºC to 70ºC 8-Pin MSOP/SOIC
TSM982E -40ºC to 85ºC
TSM984C 0ºC to 70ºC 16-Pin SOIC
TSM984E -40ºC to 85ºC
TSM971/72/73/82/84
Page 2 TSM971/72/73/82/84 Rev. 1.0
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (V+ to V-, V+ to GND, GND to V-)......-0.3V, +12V
Voltage Inputs
(IN+, IN-)..............................................(V+ + 0.3V) to (V- - 0.3V)
HYST…………………………………….(REF + 5V) to (V- - 0.3V)
Output Voltage
REF..................................................... (V+ + 0.3V) to (V- - 0.3V)
OUT (TSM971, TSM984).................(V+ + 0.3V) to (GND - 0.3V)
OUT (TSM972/73, TSM982/84).... ......(V+ + 0.3V) to (V- - 0.3V)
Input Current (IN+, IN-, HYST)..............................................20mA
Output Current
Continuous Power Dissipation (T
A
= +70°C)
8-Pin MSOP (derate 4.1mW/°C above +70°C) .................330mW
8-Pin SOIC (derate 5.88mW/°C above +70°C)..................471mW
16-Pin SOIC (8.7mW/°C above +70°C) ............................696mW
Operating Temperature Range
TSM97xC..................................................................0°C to +70°C
TSM98xE...............................................................-40°C to +85°C
Storage Temperature Range .................................-65°C to +150°C
Lead Temperature (soldering, 10s ) ......................................+300°C
REF…………………………………………………………….20mA
OUT…………………………………………………………….50mA
Output Short-Circuit Duration (V+ 5.5V) ...................Continuous
Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections
of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and
lifetime.
PACKAGE/ORDERING INFORMATION
ORDER NUMBER PART
MARKING CARRIER QUANTITY ORDER NUMBER PART
MARKING CARRIER QUANTITY
TSM971CUA+
TAAZ
Tube 50 TSM971CSA+ TS971 Tube 97
TSM971CSA+T Tape
& Reel 2500
TSM971CUA+T Tape
& Reel 2500 TSM971ESA+ TS971E Tube 97
TSM971ESA+T Tape
& Reel 2500
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 3
PACKAGE/ORDERING INFORMATION
ORDER NUMBER PART
MARKING CARRIER QUANTITY ORDER NUMBER PART
MARKING CARRIER QUANTITY
TSM972CUA+
TABJ
Tube 50 TSM972CSA+ TS972 Tube 97
TSM972CSA+T Tape
& Reel 2500
TSM972CUA+T Tape
& Reel 2500 TSM972ESA+ TS972E Tube 97
TSM972ESA+T Tape
& Reel 2500
ORDER NUMBER PART
MARKING CARRIER QUANTITY ORDER NUMBER PART
MARKING CARRIER QUANTITY
TSM973CUA+
TABE
Tube 50 TSM973CSA+ TS973 Tube 97
TSM973CSA+T Tape
& Reel 2500
TSM973CUA+T Tape
& Reel 2500 TSM973ESA+ TS973E Tube 97
TSM973ESA+T Tape
& Reel 2500
TSM971/72/73/82/84
Page 4 TSM971/72/73/82/84 Rev. 1.0
PACKAGE/ORDERING INFORMATION
ORDER NUMBER PART
MARKING CARRIER QUANTITY ORDER NUMBER PART
MARKING CARRIER QUANTITY
TSM982CUA+
TABK
Tube 50 TSM982CSA+ TS982 Tube 97
TSM982CSA+T Tape
& Reel 2500
TSM982CUA+T Tape
& Reel 2500 TSM982ESA+ TS982E Tube 97
TSM982ESA+T Tape
& Reel 2500
ORDER NUMBER PART
MARKING CARRIER QUANTITY ORDER
NUMBER PART
MARKING CARRIER QUANTITY
TSM984CSE+ TS984 Tube 48 TSM984ESE+
TS984E Tube 48
TSM984CSE+T Tape
& Reel 2500 TSM984ESE+T Tape
& Reel 2500
Lead-free Program: Silicon Labs supplies only lead-free packagi ng.
Consult Silicon Labs for products specified with wider operating temperature ranges.
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 5
ELECTRICAL CHARACTERISTICS – 5V OPERATION
V+ = 5V, V- = GND = 0V; TA = -40ºC to +85ºC, unless otherwise noted. Typical values are at TA = +25ºC. See Note 1.
PARAMETER CONDITIONS MIN TYP TSM UNITS
POWER REQUIREMENTS
Supply Voltage Range See Note 2 2.5 11 V
Output Voltage Range 0 11 V
Supply Current IN+ = IN- + 100mV
TSM971;
HYST = REF T
A
= +25°C 2.5 3.2
A
T
A
= -40°C to +85°C 4
TSM972 T
A
= +25°C 2.5 3.2
T
A
= -40°C to +85°C 4
TSM973
TSM982;
HYST = REF
T
A
= +25°C 3.1 4.5
TA = -40°C to +85°C 6
TSM984 T
A
= +25°C 5.5 6.5
T
A
= -40°C to +85°C 8.5
COMPARATOR
Input Offset Voltage VCM = 2.5V ±10 mV
Input Leakage Current (IN-, IN+) IN+ = IN- = 2.5V C/E temp ranges ±0.01 ±5 nA
Input Leakage Current (at HYST Pin) TSM971, TSM973, TSM982 ±0.02 nA
Input Common-Mode Voltage Range V- V+ – 1.3V V
Common-Mode Rejection Ratio V- to (V+ – 1.3V) 0.1 1.0 mV/V
Power-Supply Rejection Ratio V+ = 2.5V to 11V 0.1 1.0 mV/V
Voltage Noise 100Hz to 100kHz 20 VRMS
Hysteresis Input Voltage Range TSM971, TSM973, TSM982 REF- 0.05V REF V
Response Time
(High-to-Low Transition) TA = +25°C; 100pF load;
1M Pullup to V+ Overdrive = 10 mV 12 s
Overdrive = 100 mV 4
Response Time
(Low-to-High Transition) TA = +25°C; 100pF load; 1M Pullup to V+. See Note 3 300 s
Output Low Voltage TSM9x2, TSM973 IOUT = 1.8mA V- + 0.4 V
TSM971, TSM984 IOUT = 1.8mA GND + 0.4
Output Leakage Current VOUT = 11V 100 nA
REFERENCE
Reference Voltage TSM971, TSM973 T
A
= 0°C to +70°C, 1% 1.170 1.182 1.194 V
T
A
= -40°C to +85°C, 2% 1.158 1.206 V
TSM982, TSM984 T
A
= 0°C to +70°C, 2% 1.158 1.182 1.206 V
T
A
= -40°C to +85°C, 3% 1.147 1.217 V
Source Current T
A
= +25°C 15 25 A
T
A
= -40°C to +85°C 6
Sink Current T
A
= +25°C 8 15 A
T
A
= -40°C to +85°C 4
Voltage Noise 100Hz to 100kHz 100 VRMS
TSM971/72/73/82/84
Page 6 TSM971/72/73/82/84 Rev. 1.0
ELECTRICAL CHARACTERISTICS – 3V OPERATION
V+ = 3V, V- = GND = 0V; TA = -40ºC to +85ºC, unless otherwise noted. Typical values are at TA = +25ºC. See Note 1.
PARAMETER CONDITIONS MIN TYP TSM UNITS
POWER REQUIREMENTS
Supply Current IN+ = IN- + 100mV
TSM971;
HYST = REF T
A
= +25°C 2.4 3.0
A
T
A
= -40°C to +85°C 3.8
TSM972 T
A
= +25°C 2.4 3.0
T
A
= -40°C to +85°C 3.8
TSM973
TSM982;
HYST = REF
T
A
= +25°C 3.4 4.3
TA = -40°C to +85°C
5.8
TSM984 T
A
= +25°C 5.2 6.2
T
A
= -40°C to +85°C 8.0
COMPARATOR
Input Offset Voltage VCM = 1.5V ±10 mV
Input Leakage Current (IN-, IN+) IN+ = IN- = 1.5V C/E temp ranges ±0.01 ±5 nA
Input Leakage Current (at HYST Pin) TSM971, TSM973, TSM982 ±0.02 nA
Input Common-Mode Voltage Range V- V+ – 1.3V V
Common-Mode Rejection Ratio V- to (V+ – 1.3V) 0.2 1.0 mV/V
Power-Supply Rejection Ratio V+ = 2.5V to 11V 0.1 1.0 mV/V
Voltage Noise 100Hz to 100kHz 20 VRMS
Hysteresis Input Voltage Range TSM971, TSM973, TSM982 REF- 0.05V REF V
Response Time
(High-to-Low Transition) TA = +25°C; 100pF load;
1M Pullup to V+ Overdrive = 10 mV 12 s
Overdrive = 100 mV 4
Response Time
(Low-to-High Transition) TA = +25°C; 100pF load; 1M Pullup to V+. See Note 3 300 s
Output Low Voltage TSM9x2, TSM973 IOUT = 0.8mA V- + 0.4 V
TSM971, TSM984 IOUT = 0.8mA GND + 0.4
Output Leakage Current VOUT = 11V 100 nA
REFERENCE
Reference Voltage TSM971, TSM973 T
A
= 0°C to +70°C, 1% 1.170 1.182 1.194 V
T
A
= -40°C to +85°C, 2% 1.158 1.206 V
TSM982, TSM984 T
A
= 0°C to +70°C, 2% 1.158 1.182 1.206 V
T
A
= -40°C to +85°C, 3% 1.147 1.217 V
Source Current T
A
= +25°C 15 25 A
T
A
= -40°C to +85°C 6
Sink Current T
A
= +25°C 8 15 A
T
A
= -40°C to +85°C 4
Voltage Noise 100Hz to 100kHz 100 VRMS
Note 1: All specifications are 100% tested at TA = +25°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by
device characterization, not production tested.
Note 2: The TSM934 comparator operates below 2.5V. Refer to the “Low-Voltage Operation: V+ = 1.5V (TSM984 Only)section.
Note 3: Low-to-high response time is due to a 1M pullup resistor and a 100pF capacitive load, based after three time constants. A smaller
RC combination results in a faster response time.
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 7
TYPICAL PERFORMANCE CHARACTERISTICS
V
+
= 5V; V
-
= GND; T
A
= +25°C, unless otherwise noted.
LOAD CURRENT - mA
V
OL
- V
4 8
1
0
Output Voltage Low
vs Load Current
0 12
1.5
2
0.5
16
TEMPERATURE - ºC
REFERENCE VOLTAGE - V
Reference Voltage vs Temperature
V+ = 3V
V+ = 5V
TEMPERATURE - ºC
SUPPLY CURRENT - µA
2.5
1.5
TSM971 Supply Current vs
Temperature
3
3.5
2
TEMPERATURE - ºC
SUPPLY CURRENT - µA
TSM972 Supply Current vs
Temperature
IN+ = IN- + 100mV
20
2.5
-15 10 -40 35 60 85
1.16
1.14
1.19
1.17
1.18
1.15
1.21
1.20
1.22
-15 10 -40 35 60 85
4
V+ = 5V, V- = -5V
V+ = 5V, V- = 0V
V+ = 3V, V- = 0V
-15 10 -40 35 60 85
IN+ = IN- + 100mV
V+ = 10V, V- = 0V
V+ = 5V, V- = 0V
V+ = 3V, V- = 0V
24 28
4.5
2.5
1.5
3
3.5
2
4
4.5
LOAD CURRENT - µA
REFERENCE VOLTAGE - V
5 10
1.165
1.155
1.180
Reference Output Voltage vs
Output Load Current
0 15
1.170
1.175
1.160
20
SINK
25 30
1.190
1.185
SOURCE
V+ = 3V or 5V
TEMPERATURE - ºC
SUPPLY CURRENT - µA
TSM973/982 Supply Current vs
Temperature
-15 10 -40 35 60 85
3
2
3.5
4
2.5
4.5
5
V+ = 5V, V- = 0V
V+ = 3V, V- = 0V
TSM971/72/73/82/84
Page 8 TSM971/72/73/82/84 Rev. 1.0
TYPICAL PERFORMANCE CHARACTERISTICS
V
+
= 5V; V
-
= GND; T
A
= +25°C, unless otherwise noted.
SINGLE-SUPPLY VOLTAGE - V
SUPPLY CURRENT - µA
2
1
TSM984 Supply Current vs
Low Supply Voltages
1.5 2.5
10
0.1
V
REF
- V
HYST
- mV
IN+ - IN- - mV
-40
-80
TSM971/973/982
Hysteresis Control
-20
0
-60
10 20
0 30 40
TEMPERATURE - ºC
SUPPLY CURRENT - µA
-15 10
TSM984 Supply Current vs
Temperature
-40 35 60 85
OUTPUT HIGH
LOAD CAPACITANCE - nF
RESPONSE TIME - µs
Response Time vs
Load Capacitance
20 40 0 60 80
V- = 0V
5
3
6
7
4
8
9
10 IN+ = IN- + 100mV
V+ = 5V, V- = -5V
V+ = 5V, V- = 0V
V+ = 3V, V- = 0V
50
60
20
80
40
OUTPUT LOW
NO CHANGE
100
6
8
10
12
14
16
18
V
OHL
IN+ INPUT VOLTAGE - mV
OUTPUT VOLTAGE - V
-0.3 -0.2
1
0
TSM971/972/984
Transfer Function
-0.4 0
3
4
2
0.1
0.2 0.3
5
-0.1 0.4
Response Time For Various
Input Overdrives (High-to-Low)
OUTPUT VOLTAGE - V
INPUT VOLTAGE - mV
10mV
20mV
50mV
100mV
0
0
1
2
100
5
3
4
0 2
-2 4 6 8 10 12 14 16 18
RESPONSE TIME - µs
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 9
SINGLE-SUPPLY VOLTAGE - V
RESPONSE TIME - µs
1.5 2
10
Response Time at
Low Supply Voltages (Low-to-High)
2.5
100
1
SINGLE-SUPPLY VOLTAGE - V
CURRENT - mA
10
TSM984 Sink Current at
Low Supply Voltages
1
±20mV OVERDRIVE
±100mV OVERDRIVE
1.5 2 2.5
SINK CURRENT AT
V
OU
T
= 0.4V
TYPICAL PERFORMANCE CHARACTERISTICS
V
+
= 5V; V
-
= GND; T
A
= +25°C, unless otherwise noted.
SINK CURRENT - mA
22
16
Short-Circuit Sink Current vs
Supply Voltage
18
4 6
2
GND CONNECTED TO V-
OUT CONNECTED TO V+
8 10
20
24
R
PULLUP
= 10k
TSM971/72/73/82/84
Page 10 TSM971/72/73/82/84 Rev. 1.0
PIN FUNCTIONS
PIN NAME FUNCTION
TSM971 TSM972 TSM973 TSM982
1 GND Ground. Connect to V- for single-supply operation.
2 2 2 2 V-
Negative Supply. Connect to ground for singl e-supply
operation (TSM971).
3 — — — IN+ Comparator Noninverting Input
4 — — — IN- Comparator Inverting Input
5 — 5 5 HYST
Hysteresis Input. Connect to REF if not used. Input
voltage range is from VREF to (VREF - 50mV).
6 6 6 REF Reference Output. 1.182V with respect to V-.
7 7 7 7 V+ Positive Supply Voltage
8 OUT Comparator Output. Sinks current to GND.
1 1 1 OUTA Comparator A Output. Sinks current to V-.
3 3 3 INA+ Comparator A Noninverting Input
4 INA- Comparator A Inverting Input
5 4 INB- Comparator B Inverting Input
6 — 4 INB+ Comparator B Noninverting Input
8 8 8 OUTB Comparator B Output. Sinks current to V-.
PIN NAME FUNCTION
TSM984
1 OUTB Comparator B Output. Sinks current to GND.
2 OUTA Comparator A Output. Sinks current to GND.
3 V+ Positive Supply Voltage
4 INA- Comparator A Inverting Input
5 INA+ Comparator A Noninverting Input
6 INB- Comparator B Inverting Input
7 INB+ Comparator B Noninverting Input
8 REF 1.182V Reference Output with respe ct to V-.
9 V-
Negative Supply Voltage. Connect to ground for
single-supply operation.
10 INC- Comparator C Inverting Input
11 INC+ Comp arator C Noninverting Input
12 IND- Comparator D Inverting Input
13 IND+ Comp arator D Noninverting Input
14 GND Ground. Connect to V- for single-supply operation.
15 OUTD Comparator D Output. Sinks current to GND.
16 OUTC Comparator C Output. Sinks current to GND.
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 11
BLOCK DIAGRAMS
TSM971/72/73/82/84
Page 12 TSM971/72/73/82/84 Rev. 1.0
THEORY OF OPERATION
The TSM971/972/973/982/984 family of
single/dual/quad, low-voltage, micropower analog
comparators provide excellent flexibility and
performance while sourcing continuously up to
40mA of current. The TSM971, TSM973, TSM982,
and the TSM984 provide an on-board 1.182V
reference voltage. To minimize current consumption
while providing flexibility, the TSM971, TSM973, and
the TSM982 have an on-board HYST pin in order to
add additional hysteresis.
Power-Supply and Input Signal Ranges
The TSM971/972/973/982/984 can operate from a
single supply voltage range of +2.5V to +11V,
provide a wide common mode input voltage range of
V- to V+-1.3V, and accept input signals ranging from
V- to V+ - 1V. The inputs can accept an input as
much as 300mV above the below the power supply
rails without damage to the part. While the TSM971
and the TSM984 are able to operate from a single
supply voltage range, a GND pin is available that
allows for a dual supply operation with a range of
±1.25V to ±5.5V. If a single supply operation is
desired, the GND pin needs to be tied to V-. In a
dual supply mode, the TSM971 and the TSM984 are
compatible with TTL/CMOS with a ±5V voltage and
the TSM972, TSM973, and TSM982 are compatible
with TTL with a single +5V supply.
Low-Voltage Operation: V+ = 1.5V (TSM984 Only)
Due to a decrease in propagation delay and a
reduction in output drive, the TSM971/972/973/982
cannot be used with a supply voltage much lower
than 2.5V. However, the TSM984 can operate down
to a supply voltage of 2V; furthermore, as the supply
voltage reduces, the TSM984 supply current drops
and the performance is degraded. When the supply
voltage drops to 2.2V, the reference voltage will no
longer function; however, the comparators will
function down to a 1.5V supply voltage.
Furthermore, the input voltage range is extended to
just below 1V the positive supply rail. For
applications with a sub-2.5V power supply, it is
recommended to evaluate the circuit over the entire
power supply range and temperature.
Comparator Output
The TSM971 and the TSM984 have a GND pin that
allows the output to swing from V+ to GND while the
V- pin can be set to a voltage below GND as long as
the voltage difference between V+ and V- is within
11V. The TSM971 and the TSM984 sink current to
GND. By having open-drain outputs, the
TSM971/972/973/982/984 can be used in wire-
OREd and level-shifting applications. On the other
hand, the TSM972, TSM973, and the TSM982 do
not have a GND pin so the outputs sink current to V-
. With a 100mV input overdrive, the propagation
delay of the TSM971/972/973/982/984 is 4s.
Voltage Reference
The TSM971/972/973 have an on-board 1.182V
reference voltage with an accuracy of ±1% while the
TSM982/984 have an on-board 1.182V reference
voltage with an accuracy of ±2% across a
temperature range of 0°C to +70°C. The REF pin is
able to source and sink 25A and 15A of current,
respectively. The REF pin is referenced to V- and it
should not be bypassed.
Noise Considerations
Noise can play a role in the overall performance of
the TSM971/972/973/982/984. Despite having a
large gain, if the input voltage is near or equal to the
input offset voltage, the output will randomly switch
HIGH and LOW. As a result, the
TSM971/972/973/982/984 produces a peak-to-peak
noise of about 0.3mV while the reference voltage
produces a peak-to-peak noise of about 1mV.
Furthermore, it is important to design a layout that
minimizes capacitive coupling from a given output to
the reference pin as crosstalk can add noise and as
a result, degrade performance.
APPLICATIONS INFORMATION
Hysteresis
As a result of circuit noise or unintended parasitic
feedback, many analog comparators often break into
oscillation within their linear region of operation
especially when the applied differential input voltage
approaches 0V (zero volt). Externally-introduced
hysteresis is a well-established technique to
stabilizing analog comparator behavior and requires
external components. As shown in Figure 1, adding
comparator hysteresis creates two trip points: VTHR
(for the rising input voltage) and VTHF (for the falling
input voltage). The hysteresis band (VHB) is defined
as the voltage difference between the two trip points.
When a comparator’s input voltages are equal,
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 13
hysteresis effectively forces one comparator input to
move quickly past the other input, moving the input
out of the region where oscillation occurs. Figure 1
illustrates the case in which an IN- input is a fixed
voltage and an IN+ is varied. If the input signals
were reversed, the figure would be the same with an
inverted output.
Hysteresis (TSM971/973 and TSM982)
Hysteresis can be generated with two external
resistors using positive feedback as shown in
Figure 2. Resistor R1 is connected between REF
and HYST and R2 is connected between HYST and
V-. This will increase the trip point for the rising input
voltage, V
THR
, and decrease the trip point for the
falling input voltage, V
THF
, by the same amount. If no
hysteresis is required, connect HYST to REF. The
hysteresis band, V
HB
, is voltage across the REF and
HYST pin multiplied by a factor of 2. The HYST pin
can accept a voltage between REF and REF-50mV,
where a voltage of REF-50mV generates the
maximum voltage across R1 and thus, the maximum
hysteresis and hysteresis band of 50mV and
100mV, respectively. To design the circuit for a
desired hysteresis band, consider the equations
below to acquire the values for resistors R1 and R2:
R1 = V
HB
2 x I
REF
R2 = 1.182 - V
HB
2
I
REF
where I
REF
is the primary source of current out of the
reference pin and should be maintained within the
maximum current the reference can source. This is
typically in the range of 0.1A and 4A. It is also
important to ensure that the current from reference is
much larger than the HYST pin input current. Given
R2 = 2.4M, the current sourced by the reference is
0.5A. This allows the hysteresis band and R1 to be
approximated as follows:
R1(k) = V
HB
(mv)
For the TSM973 and TSM982, the hysteresis is the
same for both comparators.
Hysteresis (TSM972 and TSM984)
Relative to adding hysteresis with the HYST pin as
was done for the TSM971, TSM973, and the
TSM982, the circuit in Figure 3 uses positive
feedback along with two external resistors to set the
desired hysteresis. The circuit consumes more
current and it slows down the hysteresis effect due
to the high impedance on the feedback. Due to the
pull-up resistor on the output and its inability to
Figure 1. Threshold Hysteresis Band
Figure 2. Programming the HYST Pin
Figure 3. External Hysteresis
TSM971/72/73/82/84
Page 14 TSM971/72/73/82/84 Rev. 1.0
source current, upper threshold variations will
depend on the value of the pull-up resistor.
Board Layout and Bypassing
While power-supply bypass capacitors are not
typically required, it is good engineering practice to
use 0.1F bypass capacitors close to the device’s
power supply pins when the power supply
impedance is high, the power supply leads are long,
or there is excessive noise on the power supply
traces. To reduce stray capacitance, it is also good
engineering practice to make signal trace lengths as
short as possible. Also recommended are a ground
plane and surface mount resistors and capacitors.
TYPICAL APPLICATION CIRCUITS
Window Detector
The schematic shown in Figure 4 is for a 4.5V
undervoltage threshold detector and a 5.5V
overvoltage threshold detector using the TSM973.
Resistor components R1, R2, and R3 can be
selected based on the threshold voltage desired
while resistors R4 and R5 can be selected based on
the hysteresis desired. Adding hysteresis to the
circuit will minimize chattering on the output when
the input voltage is close to the trip point. OUTA and
OUTB generate the active-low undervoltage
indication and active-low overvoltage indication,
respectively. If both OUTA and OUTB signals are
Wired-ORed, the resulting output is an active-high,
power-good signal. To design the circuit, the
following procedure needs t o be performed:
1. As described in the section “Hysteresis
(TSM971/973 and TSM982)”, determine the
desired hysteresis and select resistors R4
and R5 accordingly. This circuit has ±5mV of
hysteresis at the input where the input
voltage V
IN
will appear larger due to the
input resistor divider.
2. Selecting R1. As the leakage current at the
INB- pin is less than 1nA, the current
through R1 should be at least 100nA to
minimize offset voltage errors caused by the
input leakage current. Values within 100k
and 1M are recommended. In this
example, a 294k, 1% standard value
resistor is s e lected for R1.
3. Calculating R2 + R3. As the input voltage
V
IN
rises, the overvoltage threshold should
be 5.5V. Choose R2 + R3 as follows:
R2 + R3 = R1 x V
OTH
V
REF
+V
HYS
- 1
= 294k x 5.5V
1.182V +5mV- 1
= 1.068M
4. Calculating R2. As the input voltage V
IN
falls,
the undervoltage threshold should be 4.5V.
Choose R2 as follows:
R2 = (R1 + R2+ R3) x V
REF
-V
HYS
V
UTH
- 294k
= (294k + 1.068M) x 1.182V-5mV
4.5 - 294k
= 62.2k
In this example, a 61.9k, 1% standard
value resistor is selected for R2.
5. Calculating R3.
R3 = (R2 + R3) - R2
= 1.068M – 61.9k
= 1.006M
In this example, a 1M, 1% standard value
resistor is s e lected for R3.
6. Using the equations below, verify all resistor
values selected:
V
OTH
= (V
REF
+ V
HYS
) x R1 + R2 + R3
R1
Fi
g
ure 4. Window Detector
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 15
= 5.474V
V
OTH
= (V
REF
- V
HYS
) x R1 + R2 + R3
(R1+R2)
= 4.484V
Where the hysteresis voltage is given by:
V
HYS
= V
REF
x R5
R4
Battery S witchover Circuit
Diodes are typically used in applications where
power to a device switches from a line-powered DC
to a backup battery. However, the voltage drop and
power loss across the diodes is undesired. Figure 5
shows a different approach that replaces the diode
with a P-channel MOSFET and uses the TSM973 to
control the MOSFET. When the voltage from the
line-powered DC drops below 4V, OUTA switches
low, and then turns on Q1. When the battery drops
below 3.6V, Comparator B generates a “low-battery”
signal.
Level Shifter
Figure 6 provides a simple way to shift from bipolar
±5V inputs to TTL signals by using the TSM984. To
protect the comparator inputs, 10k resistors are
placed in series and do not have an effect on the
performance of the circuit.
Fi
g
ure 5. Batter
y
Switchover Circuit
Figure 6. Level Shifter: ±5V Input to Single-Ended 3.3V
Output
TSM971/72/73/82/84
Page 16 TSM971/72/73/82/84 Rev. 1.0
PACKAGE OUTLINE DRAWING
8-Pin SOIC Package Outline Drawing
(N.B., Drawings are not to scale)
1.27 TYP
0.33 - 0.51
4.80 - 5.00 3.73 - 3.89
0 -
3.81 – 3.99
12
2
Notes:
Does not include mold flash, protrusions or gate burns.
Mold flash, protrusions or gate burrs shall not exceed
0.15 mm per side.
Does not include inter-lead flash or protrusions. Inter-lead
flash or protrusions shall not exceed 0.25 mm per side.
Lead span/stand off height/coplanarity are considered as
special characteristic (s).
Controlling dimensions are in mm.
This part is compliant with JEDEC specification MS-012
Lead span/stand off height/coplanarity are considered as
Special characteristic.
1
2
LEADFARME
THICKNESS
0.19 – 0.25
5.80 – 6.20
0.10 – 0.25
1.75 Max
0.10 Max
7' REF
ALL SIDE
7' REF ALL SIDE 0.76 Max
0.66 Min
0.406 – 0.863
0.546 REF
0.48 Max
0.28 Min
45' Angle
0.25
5.
6.
1.32 – 1.52
GAUGE PLANE
3.
4.
TSM971/72/73/82/84
TSM971/72/73/82/84 Rev. 1.0 Page 17
PACKAGE OUTLINE DRAWING
8-Pin MSOP Package Outline Drawing
(N.B., Drawings are not to scale)
TSM971/72/73/82/84
Page 18 Silicon Laboratories, Inc. TSM971/72/73/82/84 Rev. 1.0
400 West Cesar Chavez, Austin, TX 78701
+1 (512) 416-8500 www.silabs.com
PACKAGE OUTLINE DRAWING
16-Pin SOIC Package Outline Drawing
(N.B., Drawings are not to scale)
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