REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. - jak 06-12-06 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Thomas J. Ricciuti APPROVED BY Joseph A. DuPay DRAWING APPROVAL DATE 93-06-29 REVISION LEVEL AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil A MICROCIRCUIT, DIGITAL, FAST CMOS, 1-OF-8 DECODER WITH ENABLE, TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 1 OF 5962-92233 14 5962-E635-06 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes M and Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - Federal stock class designator \ RHA designator (see 1.2.1) 92233 01 M E A Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01, 02 54FCT138T 03, 04 54FCT138AT 05, 06 54FCT138CT Circuit function 1-of-8 decoder with enable, TTL compatible inputs and limited output voltage swing 1-of-8 decoder with enable, TTL compatible inputs and limited output voltage swing 1-of-8 decoder with enable, TTL compatible inputs and limited output voltage swing 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class M Q or V Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, nonJAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter E F 2 Descriptive designator GDIP1-T16 or CDIP2-T16 GDFP2-F16 or CDFP3-F16 CQCC1-N20 Terminals 16 16 20 Package style Dual-in-line Flat pack Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) ........................................................................... DC input voltage range (VIN) ......................................................................... DC output voltage range (VOUT) .................................................................... DC input clamp current (IIK) (VIN = -0.5 V).................................................... DC output clamp current (IOK) (VOUT = -0.5 V and +7.0 V) ............................ DC output source current (per output) (IOH) .................................................. DC output sink current (per output) (IOL) ....................................................... DC VCC current (ICC) ..................................................................................... DC GND current (IGND) ................................................................................. Storage temperature range (TSTG) ................................................................ Case temperature range under bias (TBIAS) .................................................. Maximum power dissipation (PD) .................................................................. Lead temperature (soldering, 10 seconds).................................................... Thermal resistance, junction-to-case (JC) .................................................... Junction temperature (TJ) ............................................................................. -0.5 V dc to +7.0 V dc -0.5 V dc to VCC + 0.5 V dc 4/ -0.5 V dc to VCC + 0.5 V dc 4/ -20 mA 20 mA -30 mA +70 mA 252 mA +572 mA -65C to +150C -65C to +135C 500 mW +300C See MIL-STD-1835 +175C 1.4 Recommended operating conditions 2/ 3/ Supply voltage range (VCC) ........................................................................... Input voltage range (VIN) ............................................................................... Output voltage range (VOUT).......................................................................... Maximum low level input voltage (VIL)........................................................... Minimum high level input voltage (VIH) .......................................................... Case operating temperature range (TC) ........................................................ Maximum input rise or fall rate (tr, tf): (from VIN = 0.3 V to 2.7 V, 2.7 V to 0.3 V) .................................................. Maximum high level output current (IOH): Devices 01, 03, and 05 ............................................................................... Devices 02, 04, and 06 ............................................................................... Maximum low level output current (IOL) ......................................................... +4.5 V dc to +5.5 V dc 0.0 V to VCC 0.0 V to VCC 0.8 V 2.0 V -55C to +125C 5 ns/V -12 mA -6 mA 32 mA 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified shall apply over the full specified VCC range and case temperature range of -55C to +125C. 4/ For VCC 6.5 V, the upper limit on the range is limited to 7.0 V. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level C devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. Test conditions for these specified characteristics and limits are as specified in table I. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 4 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 39 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 5 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ High level output voltage 3006 Symbol VOH1 4/ VOH2 Low level output voltage 3007 VOL1 4/ VOL2 Negative input clamp voltage 3022 High level input current 3010 Low level input current 3009 VIC- Conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified For all inputs affecting output under test, VIN = VIH or VIL VIL = 0.8 V VIH = 2.0 V For all other inputs, VIN = VCC or GND IOH = -300 A For all inputs affecting IOH = output under test, -12 mA VIN = VIH or VIL IOH = VIL = 0.8 V -6 mA VIH = 2.0 V IOH = For all other inputs, VIN = VCC or GND -12 mA IIL VCC Group A subgroups 01, 03, 05 02, 04, 06 4.5 V 1, 2, 3 01, 03, 05 4.5 V 02, 04, 06 For all inputs affecting output under test, VIN = VIH or VIL VIL = 0.8 V VIH = 2.0 V For all other inputs, VIN = VCC or GND IOL = 300 A For all inputs affecting output under test, VIN = VIH or VIL VIL = 0.8 V VIH = 2.0 V For all other inputs, VIN = VCC or GND IOL = 32 mA For input under test, IIN = -15 mA For input under test, IIN = -18 mA IIH Device type For input under test, VIN = VCC For all other inputs, VIN = VCC or GND All 4.5 V All 4.5 V 01, 03, 05 02, 04, 06 01, 03, 05 4.5 V 01, 03, 05 02, 04, 06 Unit Min 3.0 Max VCC - 0.5 2.7 VCC - 0.5 2.4 VCC - 0.5 2.4 VCC - 0.5 2.0 VCC - 0.5 0.20 V V 0.55 1, 2, 3 V -1.3 -1.2 5.5 V 1 2, 3 1.0 5.5 V 1, 2 3 1 1.0 5.0 -0.1 2, 3 -1.0 1, 2 3 -1.0 -5.0 02, 04, 06 For input under test, VIN = GND For all other inputs, VIN = VCC or GND 1, 2, 3 Limits 3/ A 0.1 A See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Input capacitance 3012 Output capacitance 3012 Short circuit output current 3005 Dynamic power supply current Symbol CIN 5/ COUT 5/ IOS 6/ ICCD 4/ 7/ Quiescent power supply current delta (TTL input levels) 3005 Quiescent power supply current output high 3005 ICC 8/ Quiescent power supply current output low 3005 ICCL Total power supply current ICCT 9/ Functional tests ICCH 10/ Propagation delay time, Am to On 3003 tPLH1, tPHL1 11/ Propagation delay time, E1 or E2 to On 3003 tPLH2, tPHL2 11/ Propagation delay time, E3 to On 3003 tPLH3, tPHL3 11/ Conditions 2/ -55C TC +125C 4.5 V VCC 5.5 V unless otherwise specified Device type VCC Group A subgroups See 4.3.1b TC = +25C See 4.3.1b All GND 4 Max 10 pF All GND 4 12 pF For all inputs, VIN = VCC or GND VOUT = GND Outputs open All 5.5 V 1, 2, 3 -225 mA 01, 03, 05 02, 04, 06 All 5.5 V 4, 5, 6 0.25 mA/ MHz* Bit 5.5 V 1, 2, 3 2.0 mA All 5.5 V 1, 2, 3 1.5 mA All 5.5 V 1, 2, 3 1.5 mA 01, 03, 05 5.5 V 4, 5, 6 4.0 mA Min For input under test, VIN = VCC - 2.1 V For all other inputs, VIN = VCC or GND E1 = E2 = GND, E3 = VCC For all other inputs, VIN = VCC or GND E1 = E2 = GND, E3 = VCC For all other inputs, VIN = VCC or GND Outputs open E1, E2, or E3 toggling One bit toggling fi = 10 MHz 50% duty cycle For nonswitching inputs VIN = VCC or GND Limits 3/ For switching inputs VIN = VCC or GND For switching inputs VIN = 3.4 V or GND VIL = 0.8 V VIH = 2.0 V Verify output VO See 4.3.1c CL = 50 pF minimum RL = 500 See figure 4 -60 Unit 0.30 02, 04, 06 4.5 01, 03, 05 5.0 02, 04, 06 5.5 All 4.5 V 7, 8 L H All 5.5 V 7, 8 L H 01, 02 4.5 V 9, 10, 11 1.5 12.0 1.5 1.5 7.8 6.0 9, 10, 11 1.5 12.5 ns 9, 10, 11 1.5 1.5 1.5 8.0 6.1 12.5 ns 1.5 1.5 8.0 6.1 03, 04 05, 06 01, 02 03, 04 05, 06 01, 02 4.5 V 4.5 V 03, 04 05, 06 ns See footnotes on next sheet. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 7 TABLE I. Electrical performance characteristics - Continued. 1/ For tests not listed in the referenced MIL-STD-883 (e.g. ICC), utilize the general test procedure under the conditions listed herein. 2/ Each input/output, as applicable shall be tested at the specified temperature for the specified limits to the tests in table I herein. Output terminals not designated shall be high level logic, low level logic, or open, except for all ICC and ICC tests, the output terminal(s) shall be open. When performing these tests, the current meter shall be placed in the circuit such that all current flows through the meter 3/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. All devices shall meet or exceed the limits specified in table I at 4.5 V VCC 5.5 V. 4/ This parameter is guaranteed, if not tested, to the limits specified in table I. 5/ This test is required only for group A testing, see 4.4.1 herein. 6/ Not more than one output should be shorted at a time. The duration of the short circuit test should not exceed on second. 7/ ICCD may be verified by the following equation: ICCD = ICCT - ICC - DHNTICC fCP/2 +fiNi Where, ICCT, (ICC or ICCH in table I), and ICC shall be the measured values of these parameters, for the device under test, when tested as described in table I, herein. The values for DH, NT, fCP, fi, Ni shall be as listed in the test conditions column for ICCT in table I, herein. 8/ This test may be performed either one input at a time (preferred method) or with all input pins simultaneously at VIN = VCC - 2.1 V (alternate method). Classes Q and V shall use the preferred method. When the test is performed using the alternate test method , the maximum limit is equal to the number of inputs at a high TTL input level times 2.0 mA and the preferred method and limits are guaranteed. 9/ ICCT is calculated as follows: ICCT = ICC = DHNTICC + ICCD(fCP/2+fiNi) Where: ICC = Quiescent supply current (any ICCL or ICCH) DH = Duty cycle for TTL inputs at 3.4 V NT = Number of TTL inputs at 3.4 V ICC = Quiescent supply current delta, TTL inputs at 3.4 V ICCD = Dynamic power supply current caused by an input transition pair (HLH or LHL) fCP = Clock frequency for registered devices (fCP = 0 for nonregistered devices) fi = Input frequency Ni = Number of inputs at fi 10/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2, herein. Functional tests shall be performed in sequence as approved by the qualifying activity on qualified devices. H 1.5 V, L < 1.5 V. 11/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. Minimum propagation delay time limits for VCC = 4.5 V and 5.5 V are guaranteed if not tested to the limits specified in table I, herein. For AC tests, all paths must be tested. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 8 Device types Case outlines 01, 02, 03, 04, 05, 06 E and F Terminal number 2 Terminal symbol 1 A0 NC 2 A1 A0 3 A2 A1 4 E1 A2 5 E2 E1 6 E3 NC 7 O7 E2 8 GND E3 9 O6 O7 10 O5 GND 11 O4 NC 12 O3 O6 13 O2 O5 14 O1 O4 15 O0 O3 16 VCC NC 17 --- O2 18 --- O1 19 --- O0 20 --- VCC NC = No connection Terminal description Terminal symbol Description A0, A1, A2 Address inputs Enable inputs (active low) E1, E2 E3 On (n = 0 to 7) Enable input (active high) Outputs (active low) FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 9 Inputs E1 H X X X X X X H X X X X H H H H H H H H X H H H H H H H H H H H H H H H X E3 Outputs O0 H X E2 L A0 X A1 A2 X O1 H O2 H O3 H O4 H O5 H O6 H O7 H L L H L L L L L L H H L L H L H H H H H H H L H H H H H L L H L H L H L L H H H L H H H L H H H H H H H L H H H L L H L L H H L L H H L H H H H H H L H H H H H H H L H H H H H H H L L L H L H H H L L H H H H H L = Low voltage level H = High voltage level X = Irrelevant FIGURE 2. Truth table. FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 10 NOTES: 1. CL = 50 pF or equivalent (includes test jig and probe capacitance). 2. RL = 500 or equivalent. RT = 50 or equivalent. 3. 4. 5. Input signal from pulse generator: VIN = 0.0 V to 3.0 V; PRR 10 MHz; duty cycle = 50 percent; tr 2.5 ns, tf 2.5 ns; tr and tf shall be measured from 0.3 V to 2.7 V, and from 2.7 V to 0.3 V, respectively. Timing parameters shall be tested at a minimum input frequency of 1 MHz. The outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 11 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. CIN and COUT shall be measured only for initial qualification and after process or design changes which may affect capacitance. CIN and COUT shall be measured between the designated terminal and GND at a frequency of 1 MHz. For CIN and COUT, test all applicable pins on five devices with zero failures. c. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2, herein. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 12 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25C 5C, after exposure, to the subgroups specified in table II herein. TABLE II. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class V Device class Q Device class M Interim electrical parameters (see 4.2) --- 1 1 Final electrical parameters (see 4.2) 1/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 2/ 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 2, 3, 4, 5, 6 1, 2, 3, 4, 5, 6 Group D end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 Group E end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 4, 7, 9 Group A test requirements (see 4.4) 1/ PDA applies to subgroup 1. 2/ PDA applies to subgroups 1 and 7. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 13 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. 6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-92233 A REVISION LEVEL A SHEET 14 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 06-12-06 Approved sources of supply for SMD 5962-92233 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ 5962-9223301MEA Vendor CAGE number 3/ 5962-9223301M2A 3/ 54FCT138T 01295 0C7V7 0C7V7 CY54FCT138TDMB IDT54FCT138TDB 5962-9223303MEA 01295 0C7V7 3/ CY54FCT138TLMB IDT54FCT138TLB 54FCT138AT 5962-9223303M2A 3/ 54FCT138AT 5962-9223302MEA 5962-9223302MFA 5962-9223302M2A Vendor similar PIN 2/ 54FCT138T IDT54FCT138TEB 5962-9223304M2A 0C7V7 IDT54FCT138ATLB 5962-9223304MEA 0C7V7 IDT54FCT138ATDB 5962-9223304MFA 0C7V7 IDT54FCT138ATEB 5962-9223305M2A 3/ 54FCT138CT 5962-9223305MEA 3/ 54FCT138CT 5962-9223306M2A 01295 0C7V7 01295 0C7V7 0C7V7 CY54FCT138CTLMB IDT54FCT138CTLB CY54FCT138CTDMB IDT54FCT138CTDB IDT54FCT138CTEB 5962-9223306MEA 5962-9223306MFA 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed, contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. 3/ Not available from an approved source of supply. 1 of 2 STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued. Vendor CAGE number Vendor name and address 01295 Texas Instruments Inc. Semiconductor Group 8505 Forest Ln. P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 0C7V7 QP Semiconductor 2945 Oakmead Village Court Santa Clara, CA 95051 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. 2 of 2