390
1
00
1
881
Rev 016
Features and Benefits
Wide operating voltage range f
r
24V
High magnetic sensitivity – Mul
CMOS technology
Chopper-stabilized amplifier s
tage
Low current consumption
Open drain output
Thin SOT23 3L and flat TO-92
3L
both RoHS Compliant
packages
Ordering Code
Product Code
Temperature Code
US1881 E
US1881 K
US1881 L
US1881 E
US1881 K
US1881 L
Legend:
Temperature Code:
L for Temperature Range
E for Temperature Range
K for Temperature Range
Package Code:
UA for TO
Option Code: xxx-
000:
Packing Form:
RE for Reel, BU for Bulk
Ordering example:
US1881KUA
1 Functional Diagram
Hall Latch – Hi
g
P
a
g
e
1
of 12
r
om 3.5V to
t
i-purpose
tage
3L
Application Exa
m
Automotive, Cons
u
Solid-state switch
Brushless DC m
otor
Speed detection
Linear position
dete
Angular position
d
Proximity detecti
on
Temperature Code
Package Code
Option Code Packing Form Code
UA AAA-000
UA AAA-000
UA AAA-000
SE AAA-000
SE AAA-000
SE AAA-000
L for Temperature Range
-40°C to 150°C
E for Temperature Range
-40°C to 85°C
K for Temperature Range
-40°C to 125°C
UA for TO
-92(Flat), SE for TSOT
000:
Standard version
RE for Reel, BU for Bulk
US1881KUA
-AAA-000-BU
2 General Descript
io
The Melexis US1881 is
a
designed in mixed signal CM
O
The device integrates a vo
l
sensor with dynamic offset
c
Schmitt trigger and an open-
d
in a single package.
Thanks to its wide operati
ng
extended choice of temper
atu
suitable for use in autom
ot
consumer applications.
The device is delivered in
a
Transistor (TSOT) for surfac
e
in a Plastic Single In Line (T
O
hole mount.
Both 3-lead packages are
RoHS
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
m
ples
u
mer and Industrial
otor
commutation
dete
ction
d
etection
on
Option Code Packing Form Code
BU
BU
BU
RE
RE
RE
io
n
a
Hall-effect latch
O
S technology.
l
tage regulator, Hall
c
ancellation system,
d
rain output driver, all
ng
voltage range and
atu
re range, it is quite
ot
ive, industrial and
a
Thin Small Outline
e
mount process and
O
-92 flat) for through-
RoHS
compliant.
US
1
8
81
Hall Latch – High Sensitivity
390
1
00
1
881
Rev 016
P
a
g
e
2
of 12
Data
S
h
e
et
Mar/12
Table of Contents
1 Functional Diagram ........................................................................................................ 1
2 General
Descr
ip
t
ion ........................................................................................................ 1
3 Glossary of Terms .......................................................................................................... 3
4 Absolute Maximum
Rat
ing
s
........................................................................................... 3
5 Pin Definitions and
Descr
ip
t
ion
s
................................................................................... 3
6 General Electrical Specifications .................................................................................. 4
7 Magnetic
Specifications
................................................................................................. 4
8 Output Behaviour versus Magnetic
Pole
...................................................................... 4
9 Detailed General
Descr
ip
t
ion ......................................................................................... 5
10 Unique F
eat
u
res
............................................................................................................ 5
11 Performance Graphs .................................................................................................... 6
11.1 Magnetic parameters vs. T
A
.....................................................................................................................6
11.2 Magnetic parameters vs. V
DD
...................................................................................................................6
11.3 V
DSon
vs. T
A
..............................................................................................................................................6
11.4 V
DSon
vs. V
DD
............................................................................................................................................6
11.5 I
DD
vs. T
A
..................................................................................................................................................6
11.6 I
DD
vs. V
DD
................................................................................................................................................6
11.7 I
OFF
vs.
T
A
.................................................................................................................................................7
11.8 I
OFF
vs.
V
DD
...............................................................................................................................................7
12 Test
C
ondi
t
ion
s
............................................................................................................. 7
12.1 Supply
Current
.........................................................................................................................................7
12.2 Output Saturation Voltage .......................................................................................................................7
12.3 Output Leakage
Current
..........................................................................................................................7
12.4 Magnetic Thresholds ...............................................................................................................................7
13 Application Information................................................................................................ 8
13.1 Typical Three-Wire Application Circuit ....................................................................................................8
13.2 Two-Wire Circuit ......................................................................................................................................8
13.3 Automotive and Harsh, Noisy Environments Three-Wire Circuit ............................................................8
14 Application
C
o
mme
n
ts
................................................................................................. 8
15 Standard information regarding manufacturability of Melexis products with
different soldering processes........................................................................................... 9
16 ESD P
reca
u
t
ion
s
........................................................................................................... 9
17 Package Information................................................................................................... 10
17.1 SE Package (TSOT-3L).........................................................................................................................10
17.2 UA Package (TO-92 flat) .......................................................................................................................11
18
Disclaimer....................................................................................................................
12
US
1
8
81
Hall Latch – High Sensitivity
390
1
00
1
881
Rev 016
P
a
g
e
3
of 12
Data
S
h
e
et
Mar/12
3 Glossary of Terms
MilliTesla (mT), Gauss Units of magnetic flux density:
1mT = 10 Gauss
RoHS Restriction of Hazardous Substances
TSOT Thin Small Outline Transistor (TSOT package) – also referred with the Melexis
package code “SE”
ESD Electro-Static Discharge
BLDC Brush-Less Direct-Current
Operating Point (B
OP
) Magnetic flux density applied on the branded side of the package which turns
the output driver ON (V
OUT
= V
DSon
)
Release Point (B
RP
) Magnetic flux density applied on the branded side of the package which turns
the output driver OFF (V
OUT
= high)
4 Absolute Maximum Ratings
Parameter Symbol Value Units
S
upp
l
y
V
o
l
t
a
g
e
V
DD
28
V
S
upp
l
y
Cu
rr
e
n
t
I
DD
50
m
A
Output
V
o
l
t
a
g
e
V
O
UT
28
V
Output
Cu
rr
e
n
t
I
O
UT
50
m
A
Storage Temperature
Range
T
S
-50 to
150
°
C
M
a
x
i
m
u
m
J
un
c
t
i
on
Temperature
T
J
165
°
C
Table 1: Absolute maximum ratings
Exceeding the absolute maximum ratings may cause permanent damage. Exposure to absolute-maximum-
rated conditions for extended periods may affect device reliability.
Operating Temperature Range Symbol Value Units
Temperature
S
u
ff
i
x
“
E
”
T
A
-40 to
85
°
C
Temperature
S
u
ff
i
x
“
K
”
T
A
-40 to
125
°
C
Temperature
S
u
ff
i
x
“
L
”
T
A
-40 to
150
°
C
5 Pin Definitions and Descriptions
SE Pin
№
UA Pin
№
Name Type Function
1
1
V
DD
S
upp
l
y
S
upp
l
y
V
o
l
t
a
g
e
p
i
n
2
3
O
UT
O
u
t
pu
t
Open
Dr
a
i
n
Output
p
i
n
3
2
GND
G
r
ound
Ground p
i
n
Table 2: Pin definitions and descriptions
SE package UA package
US
1
8
81
Hall Latch – High Sensitivity
390
1
00
1
881
Rev 016
P
a
g
e
4
of 12
Data
S
h
e
et
Mar/12
A
DD
6 General Electrical Specifications
DC Operating Parameters T = 25
o
C, V = 3.5V to 24V (unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Units
S
upp
l
y
V
o
l
t
a
g
e
V
DD
O
p
e
r
a
t
i
ng
3.5
24
V
S
upp
l
y
Cu
rr
e
n
t
I
DD
B < B
RP
5
m
A
Output
S
a
t
u
r
a
t
i
on
V
o
l
t
a
g
e
V
D
S
on
I
OUT
= 20mA, B > B
O
P
0.5
V
Output
L
ea
k
a
g
e
Cu
rr
e
n
t
I
OFF
B < B
RP,
V
OUT
=
24
V
0.3
10
µ
A
Output
R
i
s
e
T
i
m
e
t
r
R
L
= 1kΩ, C
L
=
20pF
0.25
µ
s
Output
F
a
ll
T
i
m
e
t
f
R
L
= 1kΩ, C
L
=
20pF
0.25
µ
s
M
a
x
i
m
u
m
S
w
i
t
c
h
i
ng
F
r
e
qu
e
n
c
y
F
SW
10
K
H
z
Package
T
h
e
r
m
a
l
R
e
s
i
s
t
a
n
c
e
R
TH
S
i
ng
l
e
l
a
y
e
r
(1S)
Jedec
bo
a
r
d
301
°
C
/W
Table 3: Electrical specifications
7 Magnetic Specifications
DC Operating Parameters V
DD
= 3.5V to 24V (unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Units
O
p
e
r
a
t
i
ng
P
o
i
n
t
B
O
P
E
spec., T
A
=
85°C
0.5
9.5
m
T
R
e
l
ea
s
e
P
o
i
n
t
B
RP
-
9.5
-
0.5
m
T
Hy
s
t
e
r
e
s
i
s
B
H
Y
S
T
7
12
m
T
O
p
e
r
a
t
i
ng
P
o
i
n
t
B
O
P
K spec., T
A
=
125°C
0.5
9.5
m
T
R
e
l
ea
s
e
P
o
i
n
t
B
RP
-
9.5
-
0.5
m
T
Hy
s
t
e
r
e
s
i
s
B
H
Y
S
T
7
12
m
T
O
p
e
r
a
t
i
ng
P
o
i
n
t
B
O
P
L spec., T
A
=
150°C
0.5
9.5
m
T
R
e
l
ea
s
e
P
o
i
n
t
B
RP
-
9.5
-
0.5
m
T
Hy
s
t
e
r
e
s
i
s
B
H
Y
S
T
6
12.5
m
T
Table 4: Magnetic specifications
Note 1: For typical values, please refer to the performance graphs in section 11
8 Output Behaviour versus Magnetic Pole
o o
DC Operating Parameters T
A
= -40 C to 150 C, V
DD
= 3.5V to 24V (unless otherwise specified)
Parameter Test Conditions (SE) OUT (SE) Test Conditions (UA) OUT (UA)
South po
l
e
B < B
RP
H
i
gh
B >
B
O
P
L
o
w
North
po
l
e
B >
B
O
P
L
o
w
B < B
RP
H
i
gh
Table 5: Output behaviour versus magnetic pole
South pole
North pole
North
po
l
e
South pole
OUT = high
OUT = low (V
DSon
) OUT = high OUT = low (V
DSon
)
SE package UA package
390
1
00
1
881
Rev 016
9 Detailed General Desc
ri
Based on mixed signal CMOS techn
o
sensitivity. This multi-purpose latch s
u
The chopper-stabilized amplifier uses
with Hall sensors and amplifiers. The
CM
contributes to smaller chip size and l
o
also an important factor to minimize t
h
This combination results in more stab
l
The wide operating voltage fro
m 3.5V
temperature range according to “L”, “
K
industrial and consumer applications.
The output signal is open-drain type.
S
a pull-up resistor tied between a pull-
u
10 Unique Features
The US1881 exhibits latch magnetic
s
poles to operate properly.
SE package - Latch characteri
s
The device behaves as a latch with s
y
means magnetic fields with equival
ent
Removing the magnetic field (B
→
0) k
eeps
device as a magnetic memory.
A magnetic hysteresis B
HYST
keeps B
OP
output oscillation near the switching
po
Hall Latch – Hi
g
P
a
g
e
5
of 12
ri
ption
logy, Melexis US1881 is a Hall-effect device with hi
gh
u
its most of the application requirements.
switched capacitor technique to suppress the offset
CM
OS technology makes this advanced technique
po
o
wer current consumption than bipolar technology. T
he
h
e effect of physical stress.
l
e magnetic characteristics and enables faster and
m
to 24V, low current consumption and large choice
of o
K
” and “E” specification make this device suitable for
S
uch output allows simple connectivity with TTL or
CM
u
p voltage and the device output.
s
witching characteristics. Therefore, it requires both
s
s
tic UA package - Latch c
harac
y
mmetric operating and release switching points (B
O
ent
strength and opposite direction drive the output hig
h
eeps
the output in its previous state. This latching p
r
OP
and B
RP
separated by a minimal value. This hyste
r
po
int.
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
gh
magnetic
generally observed
po
ssible and
he
small chip size is
m
ore precise design.
of o
perating
automotive,
CM
OS logic by using
s
outh and north
harac
teristic
P
=|B
RP
|). This
h
and low.
r
operty defines the
r
esis prevents
390
1
00
1
881
Rev 016
IDD (mA)
VDSon (Volts)
Magnetic field (mT)
11 Performance Graphs
11.1 Magnetic parameters vs
.
12
9
6
3
Bop, VDD=3.5V
0 Brp, VDD=3.5V
Bhyst, VDD=3.5V
-3
-6
-9
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 9
0
Ta
(
°
C)
11.3 V
DSon
vs. T
A
0.4
VDD = 3.5V
VDD = 12V
VDD = 24V
0.2
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 9
0
Ta
(
°
C)
11.5 I
DD
vs. T
A
5
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 9
0
Ta
(
°
C)
Hall Latch – Hi
g
P
a
g
e
6
of 12
IDD (mA)
VDSon (Volts)
Magnetic field (mT)
T
A
11.2 Magnetic parameters
12
9
6
3
Bop, VDD=24V
Brp, VDD=24V 0
Bhyst, VDD=24V
-3
Bop,
Ta
Brp,
Ta
=25
Bhyst,
T
a
-6
0
100 110 120 130 140
150
-9
3 4 5 6 7 8 9 10 11 12 13 14 15 1
6
VDD
(Volts)
11.4 V
DSon
vs. V
DD
0.5
0.4
0.3
0.2
0.1
0
100 110 120 130 140
150
0
3 4 5 6 7 8 9 10 11 12 13 14 15
1
VDD
(Volts)
11.6 I
DD
vs. V
DD
5
VDD = 3.5V
VDD = 12V
VDD = 24V
4.5
4
3.5
3
2.5
2
0
100 110 120 130 140
150
1.5
1
0.5
0
3 4 5 6 7 8 9 10 11 12 13 14 15
1
VDD
(Volts)
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
vs. V
DD
=
25
°
C
Bop,
Ta=150
°
C
=25
°
C
Brp,
Ta=150
°
C
a
=25
°
C
Bhyst,
Ta=150
°
C
6
17 18 19 20 21 22 23
24
Ta =
-40
°
C
Ta =
25
°
C
Ta =
85
°
C
Ta =
150
°
C
1
6 17 18 19 20 21 22 23
24
Ta =
-40
°
C
Ta =
25
°
C
Ta =
85
°
C
Ta =
150
°
C
1
6 17 18 19 20 21 22 23
24
390
1
00
1
881
Rev 016
Ioff
(
µ
A)
11.7 I
OFF
vs. T
A
60
50
40
30
20
10
0
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80
90
Ta
(
°
C)
12 Test Conditions
Note : DUT = Device Under Test
12.1 Supply Current
12.3 Output Leakage Curre
nt
Hall Latch – Hi
g
P
a
g
e
7
of 12
Ioff
(
µ
A)
11.8 I
OFF
vs. V
DD
60
VDD =
3.5V
50
VDD =
12V
VDD =
24V
40
Ta =
25
°
C
Ta =
85
°
C
Ta =
150
°
C
30
20
10
90
100 110 120 130 140
150
0
3 4 5 6 7 8 9 10 11 12 13 14 15 1
6
VDD
(Volts)
12.2 Output Saturation V
o
nt
12.4 Magnetic Threshold
s
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
C
C
6
17 18 19 20 21 22 23
24
o
ltage
s
390
1
00
1
881
Rev 016
13 Application Informati
o
13.1 Typical Three-Wire App
lica
13.3 Automotive and Harsh,
No
Three-Wire Circuit
14 Application Commen
ts
For proper operation, a 100nF bypas
s
the V
DD
and ground pin.
For reverse voltage protection, it is re
c
When using a resistor, three points ar
e
- the resistor has to limit the r
e
- the resulting device supply
v
- the resistor has to withsta
nd
When using a diode, a reverse curr
ent
Therefore, a 100
Ω
/0.25W resistor for
5V
Both solutions provide the required re
v
When a weak power supply is used
or
recommended that figure 13.3 fr
om the
The low-pass filter formed by R1 and
C
occurring on the device supply volt
age
Hall Latch – Hi
g
P
a
g
e
8
of 12
o
n
lica
tion Circuit
13.2 Two-Wi
re
No
isy Environments
Note:
With this circuit,
p
currents can be
de
connecting wires.
The resistors RL
a
bias the input cu
rr
specifications for
li
B
RP
: I
OFF
= I
R
+ I
B
OP
:
I
ON
= I
OFF
+ I
ts
s
capacitor should be placed as close as possible to
t
c
ommended to connect a resistor or a diode in seri
es
e
important:
e
verse current to 50mA maximum (V
CC
/ R1
≤
50mA
)
v
oltage V
DD
has to be higher than V
DD
min (V
DD
= V
C
C
nd
the power dissipated in reverse voltage condition (
P
ent
cannot flow and the voltage drop is almost cons
tant
5V
application and a diode for higher supply voltag
e
v
erse voltage protection.
or
when the device is intended to be used in noisy en
vi
om the
Application Information section is used.
C
1 and the zener diode Z1 bypass the disturbances
age
V
DD
. The diode D1 provides additional reverse vol
ta
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
re
Circuit
p
recise ON and OFF
de
tected using only two
a
nd Rb can be used to
rr
ent. Refer to the part
li
miting values.
+ I
DD
= V
DD
/R
b
+ I
DD
+ I
OUT
= I
OFF
+ V
DD
/R
L
t
he device between
es
with the V
DD
pin.
)
C
– R1.I
DD
)
2
P
D
= V
CC
/ R1)
tant
(
≈
0.7V).
e
are recommended.
vi
ronment, it is
or voltage spikes
ta
ge protection.
US
1
8
81
Hall Latch – High Sensitivity
390
1
00
1
881
Rev 016
P
a
g
e
9
of 12
Data
S
h
e
et
Mar/12
15 Standard information regarding manufacturability of Melexis
products with different soldering processes
Our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity
level according to following test methods:
Reflow Soldering SMD’s (Surface Mount Devices)
• IPC/JEDEC J-STD-020
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices
(classification reflow profiles according to table 5-2)
• EIA/JEDEC JESD22-A113
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing
(reflow profiles according to table 2)
Wave Soldering SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
• EN60749-20
Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat
• EIA/JEDEC JESD22-B106 and EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Iron Soldering THD’s (Through Hole Devices)
• EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Solderability SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)
• EIA/JEDEC JESD22-B102 and EN60749-21
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak
temperature, temperature gradient, temperature profile etc) additional classification and qualification tests
have to be agreed upon with Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of
adhesive strength between device and board.
Melexis is contributing to global environmental conservation by promoting lead free solutions. For more
information on qualifications of RoHS compliant products (RoHS = European directive on the Restriction Of the
use of certain Hazardous Substances) please visit the quality page on our website:
http://www.melexis.com/quality.aspx
16 ESD Precautions
Electronic semiconductor products are sensitive to Electro Static Discharge (ESD).
Always observe Electro Static Discharge control procedures whenever handling semiconductor products.
390
1
00
1
881
Rev 016
0.891
+/-
0.05
0.20
2.90
B
S
C
see note 3
0.95
B
S
C
0.30
0.45
17 Package Information
17.1 SE Package (TSOT-3L)
Hall Latch – Hi
g
P
a
g
e
10
of 12
1.90
B
S
C
0.127
+
0.023
-
0.007
0.15
0.20
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
390
1
00
1
881
Rev 016
1.65
+/-
0.10
3.00
+/-
0.2 0
2.5
m
in
see
note
4
17.2 UA Package (TO-92 flat)
Hall Latch – Hi
g
P
a
g
e
11
of 12
14.5
+/-
0.5
US
1
8
81
g
h Sensitivity
Data
S
h
e
et
Mar/12
US
1
8
81
Hall Latch – High Sensitivity
390
1
00
1
881
Rev 016
P
a
g
e
12
of 12
Data
S
h
e
et
Mar/12
18 Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its
Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the
information set forth herein or regarding the freedom of the described devices from patent infringement.
Melexis reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with Melexis for current information. This
product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-
support or life-sustaining equipment are specifically not recommended without additional processing by
Melexis for each application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be
liable to recipient or any third party for any damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential
damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical
data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering
of technical or other services.
© 2012 Melexis NV. All rights reserved.
For the latest version of this document, go to our website at
www.melexis.com
Or for additional information contact Melexis Direct:
Europe, Africa, Asia: America:
Phone: +32 1367 0495 Phone: +1 248 306 5400
E-mail: sales_europe@melexis.com E-mail: sales_usa@melexis.com
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