Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 FEATURES APPLICATIONS * B-bit resolution High-speed analog-to-digital conversion for: * Sampling rate up to 75 MHz * video data digitizing . * No missing codes guaranteed radar pulse analysis transient signal analysis High signal-to-noise ratio over a large analog input : / frequency range (7.7 effective bits at 4.43 MHztull-scale *_high energy physics research input at fo, = 75 MHz) ZA modulators * Overflow/underflow 3-state TTL output medical imaging. TTL compatible digital inputs GENERAL DESCRIPTION The TDA8714 is an 8-bit high-speed analog-to-digital converter (ADC) for professional video and other Power dissipation only 340 mW (typical) applications. It converts the analog input signal into 8-bit binary-coded digital words at a maximum sampling rate of 75 MHz. All digital inputs and outputs are TTL compatible, although a low-level sine wave clock input signal is No sample-and-hold circuit required. allowed. Low-level AC clock input signal allowed External reference voltage regulator Low analog input capacitance, no buffer amplifier required QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Veca analog supply voltage 4.75 5.0 .25 Vv Veco digital supply voltage 4.75 5.0 5.25 Vv Veco output stages supply voltage 4.75 5.0 5.25 Vv loca analog supply current - 25 30 mA loep digital supply current - 27 33 mA loco output stages supply current - 16 20 mA INL DC integral non-linearity ~ +0.4 +0.5 LSB DNL OC differential non-linearity - +0.2 +0.35 LSB AINL AC integral non-linearity note 1 - +0.5 +1.0 LSB fokimax) maximum clock frequency TDA8714/7 75 - - MHz TDA8714/6 60 ~ - MHz TDA8714/4 40 - - MHz Prot total power dissipation - 340 435 mw Note 1. Full-scale sine wave (f, = 4.43 MHz: fo, = 75 MHz). 1995 Mar 21 1284Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 ORDERING INFORMATION TYPE PACKAGE SAMPLING NUMBER NAME DESCRIPTION VERSION | FREQUENCY (MHz) TDA8714T/4 S024 _| plastic small outline package; 24 leads: body width | SOT137-1 40 TDA8714T/6 | SO24 7.6mm SOT137-1 60 TDA8714T/7 | S024 SOT137-1 75 TDA8714T/4 | SSOP24 | plastic shrink small outline package; 24 leads; body | SOT340-1 40 TDA8714T/6 | SSOP24 | width 5.3 mm SOT340-1 60 TDA8714T/7 | SSOP24 SOT340-1 75 BLOCK DIAGRAM [ vooa CLK |vceo cE | 16 |'8 22 CLOCK DRIVER VR 148 TDA8714 : c 12| 07 MSB 13] D6 14] DS Vv ' 15] D4 analog ifs ! ANALOG -TO-DIGITAL . . voltage input CONVERTER | LATCHES TTL OUTPUTS | 93] 53 data outputs 24] D2 I 1901 2100 | isp Veco 19 Vre | 4 + y 21 Veco2 OVERFLOW / UNDERFLOW I 14]. overflow / underflow ocno| 20 LATCH TTL OUTPUT > output output ground I Ti 17 yacn pon MSAB8D analog ground digital ground Fig.1 Block diagram. 1995 Mar 21 1285Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA87 14 PINNING SYMBOL | PIN DESCRIPTION D1 1 | data output; bit 1 DO 2 | data output: bit 0 (LSB) nc. 3. | not connected Ves 4 | reference voltage BOTTOM input nc. 5 | not connected AGND 6 | analog ground pr U 24) pe Veca 7 | analog supply voltage (+5 V) vo (2] 23) DS vy 8 | analog input voltage ne. [3] 22) CE VAT 9 | reference voltage TOP input Vee [4] Veco2 n.c. 10 | not connected ne. & 201 OGND O/UF 11 | overflow/underflow data output Vv D7 12 | data output: bit 7 (MSB) a TDAa714 ee D6 13 | data output; bit 6 Ds 14 | data output; bit 5 vi Ca [17] Dono D4 15 | data output; bit 4 Yat [a | fie] crk CLK 16 | clock input ne. [19] ns} 04 DGND 17 | digital ground onur [15] 14} 05 Veco 18 | digital supply voltage (+5 V) D7 (| 3] D Veco1 19 | supply voltage for output stages 1 "one? (+5 V) OGND 20 | output ground Voco2 21 | supply vottage for output stages 2 (+5 V) CE 22 | chip enable input (TTL level input, active LOW) D3 23 | data output; bit 3 Fig.2 Pin configuration. D2 24 | data output; bit 2 1995 Mar 21 1286Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT Voca analog supply voltage note 1 -0.3 +7.0 Vv Veco digital supply voltage note 1 -0.3 +7.0 Vv Veco output stages supply voltage note 1 -0.3 +7.0 Vv AVec supply voltage differences between ~1.0 +1.0 Vv Veca and Vecp AVec supply voltage differences between -1.0 +1.0 Vv Veco and Vecp AVcc supply voltage differences between -1.0 +1.0 Vv Veca and Veco Vi input voltage referenced to AGND -0.3 +7.0 Vv Volk(p-p) AC input voltage for switching referenced to DGND - Veep Vv (peak-to-peak value) lo output current - 10 mA Tstg storage temperature -55 +150 C Tamb operating ambient temperature 0 +70 C Tj junction temperature - +150 C Note 1. The supply voltages Voca and Vecp may have any value between -0.3 V and +7.0 V provided the difference between Vcca and Vecp is between -1 V and +1 V. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling integrated circuits. THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT Rih j-a thermal resistance from junction to ambient in free air SOT137-1 75 KW SOT340-1 119 Kw 1995 Mar 21 1287Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 CHARACTERISTICS Voca = V7 to Ve = 4.75 to 5.25 V; Vecp = Vig tO Vi7 = 4.75 to 5.25 V; Veco = Vig and Vo; to Vag = 4.75 to 5.25 V; AGND and DGND shorted together; Veca to Vecp = 0.25 to +0.25 V; Veco tO Vecp = -0.25 to +0.25 V; Voca to Veco = -0.25 to +0.25 V; Viip-p) = 1.75 V; Tamb = 0 to +70 C; typical values measured at Veca = Vecp = Veco = 5 V and Tamp = 25 C; unless otherwise specified. SYMBOL || PARAMETER conpiTions | min. | Typ. | Max. | UNIT Supply Voca analog supply voltage 4.75 5.0 5.25 Vv Veco digital supply voltage 4.75 5.0 5.25 Vv Veco output stages supply voltage 4.75 5.0 5.25 |V loca analog supply current - 25 30 mA leco digital supply current - 27 33 mA leco output stages supply current - 16 20 mA Inputs CLOCK INPUT CLK (REFERENCED TO DGND); note 1 Vi LOW level input voltage 0 - 0.8 v Vin HIGH level input voltage 2.0 - Veco |V fi LOW level input current Vek = 0.4V -400 |- - pA hy HIGH tevel input current Vok =2.7V - - 300 pA Zi input impedance fox = 75 MHz - 2 - kQ C, input capacitance fox = 75 MHz - 45 - pF INPUT CE (REFERENCED TO DGND): see Table 2 Vir LOW level input voltage 0 - 0.8 Vv Vin HIGH level input voltage 2.0 - Veco | V im LOW level input current Vi = 0.4V 400 |- - nA hy HIGH level input current Vis 2.7 V - - 20 pA V, (ANALOG INPUT VOLTAGE REFERENCED TO AGND) tie LOW level input current Vi=1.2V - 0 - pA ln HIGH levet input current Vi=3.5V 60 130 280 pA Z| input impedance f, = 4.43 MHz - 10 - kQ2 C; input capacitance f, = 4.43 MHz - 14 - pF Reference voltages for the resistor ladder; see Table 1 Vas reference voltage BOTTOM 12 1.3 1.6 Vv Vert reference voltage TOP 3.5 3.6 3.9 Vv Vaitt differential reference voltage Vit - Vrp 1.9 2.3 2.7 Vv leet reference current - 11.5 - mA Rap resistor ladder - 200 - QQ TCaiap temperature coefficient of the resistor ladder - 0.24 - ppm VosB offset voltage BOTTOM note 2 - 255 ~ mv Vost offset voltage TOP note 2 - 300 - mV Vip-p) analog input voltage (peak-to-peak value) 1.45 1.75 2.15 Vv 1995 Mar 21 1288Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 SYMBOL | PARAMETER | conomons | min. | Typ. | max. | unr Outputs DIGITAL OUTPUTS D7 To DO (REFERENCED TO DGND) Vor LOW level output voltage lo=1mA 0 - 0.4 Vv Von HIGH level output voltage lo =-0.4mA 2.7 - Veco |V lo =-1 mA 2.4 - Vocp Vv loz output current in 3-state mode 0.4 V < Vo < Vecp -20 - +20 pA Switching characteristics CLOCK INPUT CLK (note 1; see Fig.3) fokiman) maximum clock frequency TDA8714/4 40 - ~ MHz TDA8714/6 60 - - MHz TDA87 14/7 75 - - MHz tcorH clock pulse width HIGH - - ns topL clock pulse width LOW - - ns Analog signal processing LINEARITY INL DC integral non-linearity - +0.4 +0.5 LSB DNL DC differential non-linearity - +0.2 +0.35 | LSB AINL AC integral non-linearity note 3 - +0.5 +1.0 LSB BANDWIOTH (fo, = 40 MHz); note 4 B analog bandwidth full-scale sine wave - 13 - MHz 75% full-scale sine - 20 - MHz wave; small signal at V, = +5 LSB, code 128 tstLH analog input settling time LOW-to-HIGH full-scale square - 2.5 3.5 ns wave; Fig.6; note 5 tstHL analog input settling time HIGH-to-LOW full-scale square - 3.0 4.0 ns wave; Fig.6; note 5 HARMONICS (fo, = 40 MHz) hy fundamental harmonics (full scale) f, = 4.43 MHz - ~ 0 dB Natl harmonics (full scale); f, = 4.43 MHz all components second harmonics - -64 -60 dB third harmonics - -58 -55 dB THD total harmonic distortion f, = 4.43 MHz - -56 - dB SIGNAL-TO-NOISE RATIO (note 6; see Figs 7 and 13) S/N signal-to-noise ratio (full scale) without harmonics; 46 48 - dB fok = 40 MHz; f= 4.43 MHz 1995 Mar 21 1289Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 SYMBOL | PARAMETER | conpmions | min. | Tv. | Max. | UNIT EFFECTIVE BITS (note 6; see Figs 7 and 13) EB effective bits TDA8714/4 fo = 40 MHz f = 4.43 MHz - 7.75 - bits f, = 7.5 MHz - 7.6 - bits effective bits TDA8714/6 fax = 60 MHz fi = 4.43 MHz - 7.7 - bits f= 7.5 MHz - 7.55 - bits fi = 10 MHz - 7.4 - bits effective bits TDA8714/7 fo = 75 MHz f, = 4.43 MHz - 7.7 - bits fi = 7.5 MHz - 7.5 - bits fi = 10 MHz - 7.2 - bits fi = 15 MHz - 6.3 - bits TWO-TONE (note 7) TTIR _ | two-tone intermodulation rejection fax = 40 MHz [- [-s6 [- | BIT ERROR RATE BER bit error rate fork = 40 MHz; - 10-71 | - times/ f, = 4.43 MHz; samples V, = +16 LSB at code 128 DIFFERENTIAL GAIN (note 8) Gait differential gain folk = 40 MHz; - 0.6 - % f, = 4.43 MHz DIFFERENTIAL PHASE (note 8) Gait differential phase for = 40 MHz: - 0.8 - deg fi = 4.43 MHz Timing (note 9; see Figs 3 and 5; f., = 75 MHz) tas sampling delay time - - 2 ns th output hold time 5 - - ns tg output delay tine - 10 11 ns 3-state output delay times (see Fig.4) tazH enable HIGH - 6 10 ns tazi enable LOW - 12 16 ns taHz disable HIGH - 50 54 ns taiz disable LOW - 10 14 ns 1995 Mar 21 1290Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 Notes to the characterlstics 1. In addition to a good layout of the digital and anaiog ground, it is recommended that the rise and fall times of the clock must not be less than 1 ns. Analog input voltages producing code 00 up to and including FF: a) Vosp (voltage offset BOTTOM) is the difference between the analog input which produces data equal to 00 and the reference voltage BOTTOM (Vrpg) at Tamp = 25 C. b) Vosr (voltage offset TOP) is the difference between V pz (reference voltage TOP) and the analog input which produces data outputs equal to FF at Tamp = 25 C. Full-scale sine wave (f| = 4.43 MHz; fo = 75 MHz). The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device. No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale input (square-wave signal) in order to sample the signat and obtain correct output data. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent fundamental period. The calculation takes into account all harmonics and noise up to half of the ciock frequency (NYQUIST frequency). Conversion to signal-to-noise ratio: S/N = EB x 6.02 + 1.76 dB. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two input signals have the same amplitude and the total amplitude of both signals provides full scale to the converter. Measurement carried out using video analyser VM700A where the video analog signal is reconstructed through a digital-to- analog converter. Output data acquisition: the output data is available after the maximum delay time of ty; in the event of 75 MHz clock operation, the hardware design must take into account the ty and t, limits with respect to the input characteristics of the acquisition circuit. 1995 Mar 21 1291Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 Table 1 Output coding and input voltage (typical values; referenced to AGND) BINARY OUTPUT BITS STEP Vip-p) O/UF D7 D6 DS Da D3 D2 D1 Do Underflow <1.555 1 0 0 0 0 oO 0 0 0 0 1.555 0 0 0 0 0 0 0 1 . 0 0 0 0 0 0 0 0 254 . 0 1 1 1 1 1 1 0 255 3.30 0 1 1 1 1 1 1 1 1 Overflow >3.30 1 1 1 1 1 1 1 1 1 Table 2. Mode selection CE D7 TO DO O/UF 1 high impedance high impedance 0 active; binary active "cp. + tcPH CLK _- \ \ } ie 14V sample N sample N + 1 sample N+ 2 x "ds 'h 24V DATA DATA DATA 00 to D7 N-2 Nad 14V O4V MSA870 Fig.3 Timing diagram. 1995 Mar 21 1292Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA87 14 output data output data TEST $1 tatz Vecp Veco tazi Vecp 3.3 kL t GND TDAG714 pw A, GHZ tazH GND T 15 pF KE a y MaDa7e fce = 100 kHz Fig.4 Timing diagram and test conditions of 3-state output delay time. DO to B7 rT 1" MBBOS6 - 1 Fig.5 Load circuit for timing measurement. 1995 Mar 21 1293Philips Semiconductors 8-bit high-speed analog-to-digital converter Product specification TDA87 14 'STLH 'STHL - code 1023 Vi 50% code 0 Sas CLK 50% MBO875 208 Fig.6 Analog input settling-time diagram. 1995 Mar 21 1294Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 0 MBD877 amplitude (dB) -20 -40 -60 -120 2.50 5.00 7,50 10.0 12.5 15.0 17.5 20.0 f (MHz) Effective bits: 7.80; THD = -57.82 dB. Harmonic levels (d8): 2nd = -68.00; 3rd = -61.54; 4th = -72.46: 5th = -65.B0; 6th = -68.88 Fig.7 Fast Fourier Transform (fo, = 40 MHz; f, = 4.43 MHz). MBD878 TT TT T T T T T 1 T amplitude (dB) PO oF = - +4 | ~40 -60 ~80 ae eal ie i Effective bits: 7.27; THD = -49.23 dB. Harmonic levets (d8): 2nd = -56.16; 3rd = -51.01; 4th = -69.84; Sth = -59.10; 6th = -65.34. Fig.8 Fast Fourier Transform (fy, = 75 MHz; f; = 10 MHz). 1995 Mar 21 1295Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 INTERNAL PIN CONFIGURATIONS Veco Veco Voca ---- # a D7 to DO Vv ee) O/UF ! a x DGND AGND ---- MLBOIE MLBO37 Fig.9 TTL data and overflow/underflow outputs. Fig.10 Analog inputs. Vecor i Voca Y x zx TY VRT Vv = Fe RM q Riap VRB x a x a AGND MEAO5O DGND MLBO38 Fig.11 CE (3-state) input. Fig.12 Vag and Var. 1995 Mar 21 1296Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 Yeop pI er ref CLK } 30 ksz 30 kQ OGND f bl Pt MCD189-1 Fig.13 CLK input. 1995 Mar 21 1297Philips Semiconductors Product specification 8-bit high-speed analog-to-digital converter TDA8714 APPLICATION INFORMATION 21- ON 1 24 Oo}, 23 2) ys 3 22 (1) Vv RB 4 100 nF (2) > YS 5 20 AGND AGND 6 19 TOAB7 14 Vv, COAT 7 18 yy 1 5 7 vy, (vy RT 9 16 100 nF (2) a nc. |i5 15 AGND OMT 14 Db? 12 13 MSA668 The analog and digital supplies should be separated and decoupled. The external voltage generator must be built such that a good supply voltage ripple rejection is achieved with respect to the LSB value. (1} Vag and Vpr are decoupled to AGND. (2) Pin 5 should be connected to AGND: pins 3 and 10 to DGND in order to prevent noise influence. Fig.14 Application diagram. 1995 Mars 21 1298