AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D – OCTOBER 1980 – REVISED MARCH 2002
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
AM26LS32A Devices Meet or Exceed the
Requirements of ANSI TIA/EIA-422-B,
TIA/EIA-423-B, and ITU Recommendations
V.10 and V.11
D
AM26LS32A Devices Have ±7-V
Common-Mode Range With ±200-mV
Sensitivity
D
AM26LS33A Devices Have ±15-V
Common-Mode Range With ±500-mV
Sensitivity
D
Input Hysteresis . . . 50 mV Typical
D
Operate From a Single 5-V Supply
D
Low-Power Schottky Circuitry
D
3-State Outputs
D
Complementary Output-Enable Inputs
D
Input Impedance . . . 12 k Min
D
Designed to Be Interchangeable With
Advanced Micro Devices AM26LS32 and
AM26LS33
description
The AM26LS32A and AM26LS33A devices are
quadruple differential line receivers for balanced
and unbalanced digital data transmission. The
enable function is common to all four receivers
and offers a choice of active-high or active-low
input. The 3-state outputs permit connection
directly to a bus-organized system. Fail-safe
design ensures that, if the inputs are open, the
outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional
stage of amplification to improve sensitivity . The input impedance has been increased, resulting in less loading
of the bus line. The additional stage has increased propagation delay; however, this does not affect
interchangeability in most applications.
The AM26LS32AC and AM26LS33AC are characterized for operation from 0°C to 70°C. The AM26LS32AI is
characterized for operation from –40°C to 85°C. The AM26LS32AM and AM26LS33AM are characterized for
operation over the full military temperature range of –55°C to 125°C.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
AM26LS32 and AM26LS33 are trademarks of Advanced Micro Devices, Inc.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1Y
G
2Y
2A
2B
GND
VCC
4B
4A
4Y
G
3Y
3A
3B
AM26LS32AC . . . D, N, OR NS PACKAGE
AM26LS32AI, AM26LS33AC ...D OR N PACKAGE
AM26LS32AM, AM26LS33AM ...J PACKAGE
(TOP VIEW)
3212019
910111213
4
5
6
7
8
18
17
16
15
14
4A
4Y
NC
G
3Y
1Y
G
NC
2Y
2A
AM26LS32AM, AM26LS33AM . . . FK PACKAGE
(TOP VIEW)
1A
1B
NC
3B
3A 4B
2B
GND
NC VCC
NC – No internal connection
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
FUNCTION TABLE
(each receiver)
DIFFERENTIAL ENABLES OUTPUT
A – B G G Y
VID VIT
H X H
V
ID
V
IT+ XLH
VIT VID VIT
H X ?
V
IT
V
ID
V
IT+ XL?
VID VIT
H X L
V
ID
V
ITXLL
X L H Z
O
p
en
H X H
Open
X L H
H = high level, L = low level, ? = indeterminate,
X = irrelevant, Z = high impedance (off)
logic diagram (positive logic)
4
12
2
13
6
75
10
911
14
15 13
G
G
1A
1B
2A
2B
3A
3B
4A
4B
1Y
2Y
3Y
4Y
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
schematics of inputs and outputs
EQUIVALENT OF EACH
DIFFERENTIAL INPUT
VCC
Input
EQUIVALENT OF EACH ENABLE INPUT
Output
85
NOM
TYPICAL OF ALL OUTPUTS
8.3 k
NOM
Enable
20 k
NOM
960
NOM
960
NOM
100 k
A Input Only
VCC
100 k
B Input Only
VCC
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI: Any differential input ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Other inputs 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, TC: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package 260°C. . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the network ground terminal.
2. Differential voltage values are at the noninverting (A) input terminals with respect to the inverting (B) input terminals.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE TA 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 125°C
POWER RATING
FK 1375 mW 11.0 mW/°C880 mW 275 mW
J1375 mW 11.0 mW/°C880 mW 275 mW
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
VCC
Su
pp
ly voltage
AM26LS32AC, AM26LS32AI, AM26LS33AC 4.75 5 5.25
V
V
CC
Supply
voltage
AM26LS32AM, AM26LS33AM 4.5 5 5.5
V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
VIC
Common mode in
p
ut voltage
AM26LS32A ±7
V
V
IC
Common
-
mode
input
voltage
AM26LS33A ±15
V
IOH High-level output current 440 µA
IOL Low-level output current 8 mA
AM26LS32AC, AM26LS33AC 0 70
TAOperating free-air temperature AM26LS32AI 40 85 °C
AM26LS32AM, AM26LS33AM 55 125
electrical characteristics over recommended ranges of VCC, VIC, and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYPMAX UNIT
VIT
Positive-
g
oin
g
VO=V
OHmin IOH = 440 µA
AM26LS32A 0.2
V
V
IT+
gg
input threshhold voltage
V
O =
V
OH
min
,
I
OH =
440
µ
A
AM26LS33A 0.5
V
VIT
Ne
g
ative-
g
oin
g
VO=045VI
OL =8mA
AM26LS32A 0.2
V
V
IT
ggg
input threshhold voltage
V
O =
0
.
45
V
,
I
OL =
8
mA
AM26LS33A 0.5
V
Vhys Hysteresis voltage
(VIT+ VIT)50 mV
VIK Enable-input clamp voltage VCC = MIN, II = 18 mA 1.5 V
VOH
High level out
p
ut voltage
V
CC
=MIN, V
ID
= 1 V, AM26LS32AC
AM26LS33AC 2.7
V
V
OH
High
-
level
output
voltage
CC ,ID ,
VI(G) = 0.8 V, IOH = 440 µAAM26LS32AM, AM26LS32AI,
AM26LS33AM 2.5
V
VOL
Low level out
p
ut voltage
V
CC
= MIN, V
ID
= 1 V, IOL = 4 mA 0.4
V
V
OL
Low
-
level
output
voltage
CC ,ID ,
VI(G) = 0.8 V IOL = 8 mA 0.45
V
IOZ
Off-state
(high im
p
edance state)
VCC = MAX
VO = 2.4 V 20
µA
I
OZ
(hi
g
h
-
i
mpe
d
ance s
t
a
t
e
)
output current
V
CC =
MAX
VO = 0.4 V 20 µ
A
II
Line in
p
ut current
VI = 15 V, Other input at 10 V to 15 V 1.2
mA
I
I
Line
input
current
VI = 15 V, Other input at 15 V to 10 V 1.7
mA
II(EN) Enable input current VI = 5.5 V 100 µA
IIH High-level enable current VI = 2.7 V 20 µA
IIL Low-level enable current VI = 0.4 V 0.36 mA
rIInput resistance VIC = 15 V to 15 V, One input to ac ground 12 15 k
IOS Short-circuit output current§VCC = MAX 15 85 mA
ICC Supply current VCC = MAX, All outputs disabled 52 70 mA
All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold levels
only.
§Not more than one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output
CL=15
p
F
See Figure 1
20 35
ns
tPHL Propagation delay time, high-to-low-level output
C
L =
15
pF
,
See
Figure
1
22 35
ns
tPZH Output enable time to high level
CL=15
p
F
See Figure 1
17 22
ns
tPZL Output enable time to low level
C
L =
15
pF
,
See
Figure
1
20 25
ns
tPHZ Output disable time from high level
CL=5
p
F
See Figure 1
21 30
ns
tPLZ Output disable time from low level
C
L =
5
pF
,
See
Figure
1
30 40
ns
PARAMETER MEASUREMENT INFORMATION
S1 Open
S2 Closed
5 k
S1
RL = 2 k
VCC
From Output
Under Test
CL
(see Note A) See Note B
S2
tPHL VOH
VOL
2.5 V
2.5 V
tPLH
S1 and S2 Closed
VOLTAGE WAVEFORMS FOR tPLH, tPHL
TEST CIRCUIT
10%
90%
10%
90%
0
3 V
10%
10%
90% 90%
1.3 V 1.3 V
1.3 V 1.3 V
3 V
0
5 ns
10%
90%
10%
90%
0
3 V
10%
10%
90% 90%
1.3 V 1.3 V
1.3 V 1.3 V
3 V
0
Enable G
Enable G
tPZH
1.3 V
Output VOH
0.5 V
1.4 V
tPHZ S1 Closed
S2 Closed
tPZL
1.3 V
S1 Closed
S2 Open
S1 Closed
S2 Closed
VOL
0.5 V
tPLZ
VOLTAGE WAVEFORMS FOR tPHZ, tPZH VOLTAGE WAVEFORMS FOR tPLZ, tPZL
Test
Point
Output
See Note CSee Note C
Input
Output
Enable G
Enable G
5 ns 5 ns 5 ns
1.4 V
NOTES: A. CL includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Enable G is tested with G high; G is tested with G low.
00
1.3 V 1.3 V
Figure 1
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
2
1
0010 20 30
High-Level Output Voltage V
3
4
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
40 50
VCC = 5.25 V
VCC = 5 V
VCC = 4.75 V
IOH High-Level Output Current mA
VOH
VID = 0.2 V
TA = 25°C
VCC = 5.5 V
VCC = 4.5 V
VCC = 5.5 V and VCC = 4.5 V applies to M-suffix devices only.
Figure 2
2
00 102030405060
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
5
70 80
4
3
1
High-Level Output Voltage V
VOH
TA Free-Air Temperature °C
VCC = 5 V
VID = 0.2 mV
IOH = 440 µA
Figure 3
Figure 4
0.3
0.2
0.1
00510
Low-Level Output Voltage V
0.4
0.5
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
0.6
15 20 25 30
IOL Low-Level Output Current mA
VOL
VCC = 5 V
TA = 25°C
VID = 0.2 mV
Figure 5
0.3
0.2
0.1
00 1020304050
0.4
0.5
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
60 70 80
Low-Level Output Voltage VVOL
TA Free-Air Temperature °C
VCC = 5 V
VID = 0.2 V
IOL = 8 mA
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage V
3
2
0 0.5 1 1.5
4
5
2 2.5 3
1
0
Output Voltage VVO
VID = 0.2 V
TA = 25°C
Load = 8 k to GND VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
4.5
3.5
2.5
1.5
0.5
Figure 6
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage V
Output Voltage VVO
2
00 0.5 1 1.5 2
3
4
2.5 3
1
TA = 70°C
TA = 25°C
TA = 0°C
3.5
2.5
1.5
0.5
5
4.5 VCC = 5 V
VID = 0.2 V
Load = 8 k to GND
Figure 7
Figure 8
Enable G Voltage V
Output Voltage VVO
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
VCC = 5.5 V
VCC = 5 V
VCC = 4.5 V
VID = 0.2 V
Load = 1 k to VCC
TA = 25°C
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Figure 9
OUTPUT VOLTAGE
vs
ENABLE G VOLTAGE
Enable G Voltage V
Output Voltage VVO
3
2
1
00 0.5 1
4
5
6
1.5 2 2.5 3
VCC = 5 V
VID = 0.2 V
Load = 1 k to VCC
TA = 0°C
TA = 25°C
TA = 70°C
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
2.5
2
1
0.5
0
4.5
1.5
200 150 100 50 0
3.5
3
4
AM26LS32A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5
50 100 150 200
VID Differential Input Voltage mV
Output Voltage V
VO
VCC = 5 V
IO = 0
TA = 25°C
VITVIT+
VIC =
7 V VIC =
0VIC =
7 V
VIT
VIT+
VITVIT+
2.5
2
1
0.5
0
4.5
1.5
200 150 100 50 0
3.5
3
4
AM26LS33A
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
5
50 100 150 200
VID Differential Input Voltage mV
Output Voltage V
VO
VCC = 5 V, IO = 0, TA = 25°C
VIT
VIT+
VIC =
15 V VIC =
0VIC =
15 V
VIT
VIT+
VIT
VIT+
Figure 11
0
1
3
4
25 20 15 50 510
Input Current mA
1
3
INPUT CURRENT
vs
INPUT VOLTAGE
4
2015
2
2
II
VI Input Voltage V
The Unshaded Area
Shows Requirements of
Paragraph 4.2.1 of ANSI
Standards EIA/TIA-422-B and
EIA/TIA-423-B.
10 25
VCC = 5 V
VCC = 0
Figure 12
AM26LS32AC, AM26LS32AI, AM26LS33AC,
AM26LS32AM, AM26LS33AM
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS115D OCT OBER 1980 REVISED MARCH 2002
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
1/4 AM26LS32AC
1/4 AM26LS31AC
Data
In Data
Out
Data
Out
Data
Out
1/4 AM26LS32AC 1/4 AM26LS33AC
RT
RT equals the characteristic impedance of the line.
Figure 13. Circuit With Multiple Receivers
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TIs terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TIs standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding thirdparty products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated