IRF640S - STMICROELECTRONICS

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 1Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

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Power MOSFET

FEATURES

• Surface mount

• Low-profile through-hole

• Available in tape and reel

• Dynamic dV/dt rating

• 150 °C operating temperature

• Fast switching

• Fully avalanche rated

• Material categorization: for definitions of compliance

please see www.vishay.com/doc?99912

Note

This datasheet provides information about parts that are



RoHS-compliant and / or parts that are non-RoHS-compliant. For



example, parts with lead (Pb) terminations are not RoHS-compliant.



Please see the information / tables in this datasheet for details.

DESCRIPTION

Third generation power MOSFETs from Vishay provide the

designer with the best combinations of fast switching,

ruggedized device design, low on-resistance and

cost-effectiveness.

The D2PAK is a surface mount power package capable of

accommodating die size up to HEX-4. It provides the

highest power capability and the last lowest possible

on-resistance in any existing surface mount package. The

D2PAK is suitable for high current applications because of

its low internal connection resistance and can dissipate up

to 2.0 W in a typical surface mount application. The

through-hole version (SiHF640L) is available for low-profile

applications.

Note

a. See device orientation.

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. VDD = 50 V, starting TJ = 25 °C, L = 2.7 mH, Rg = 25 , IAS = 18 A (see fig. 12).

c. ISD  18 A, dI/dt  150 A/μs, VDD  VDS, TJ  150 °C.

d. 1.6 mm from case.

e. Uses IRF640, SiHF640 data and test conditions.

PRODUCT SUMMARY

VDS (V) 200

RDS(on) ()V

GS = 10 V 0.18

Qg max. (nC) 70

Qgs (nC) 13

Qgd (nC) 39

Configuration Single

N-Channel MOSFET

PAK (TO-263)

PAK (TO-262)

GDS

Available

ORDERING INFORMATION

Package D2PAK (TO-263) D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262)

Lead (Pb)-free and Halogen-free SiHF640S-GE3 SiHF640STRL-GE3

a SiHF640STRR-GE3 a SiHF640L-GE3

Lead (Pb)-free IRF640SPbF IRF640STRLPbF a IRF640STRRPbF a -

ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)

PARAMETER SYMBOL LIMIT UNIT

Drain-Source Voltage VDS 200 V

Gate-Source Voltage VGS ± 20

Continuous Drain Current VGS at 10 V TC = 25 °C ID

ATC = 100 °C 11

Pulsed Drain Current a, e IDM 72

Linear Derating Factor 1.0 W/°C

Single Pulse Avalanche Energy b, e EAS 580 mJ

Avalanche Current aIAR 18 A

Repetitive Avalanche Energy aEAR 13 mJ

Maximum Power Dissipation TC = 25 °C PD

130 W

TA = 25 °C 3.1

Peak Diode Recovery dV/dt c, e dV/dt 5.0 V/ns

Operating Junction and Storage Temperature Range TJ, Tstg -55 to +150 °C

Soldering Recommendations (Peak temperature) dfor 10 s 300

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 2Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Note

a. When mounted on 1" square PCB (FR-4 or G-10 material).

Notes

a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).

b. Pulse width  300 μs; duty cycle  2 %.

c. Uses IRF640/SiHF640 data and test conditions.

THERMAL RESISTANCE RATINGS

PARAMETER SYMBOL TYP. MAX. UNIT

Maximum Junction-to-Ambient 

(PCB mounted, steady-state) a RthJA -40

°C/W

Maximum Junction-to-Case (Drain) RthJC -1.0

SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT

Static

Drain-Source Breakdown Voltage VDS VGS = 0 V, ID = 250 μA 200 - - V

VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA c -0.29-V/°C

Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.0 V

Gate-Source Leakage IGSS V

GS = ± 20 V - - ± 100 nA

Zero Gate Voltage Drain Current IDSS

VDS = 200 V, VGS = 0 V - - 25 μA

VDS = 160 V, VGS = 0 V, TJ = 125 °C - - 250

Drain-Source On-State Resistance RDS(on) V

GS = 10 V ID = 11 A b - - 0.18 

Forward Transconductance gfs VDS = 50 V, ID = 11 A d 6.7 - - S

Dynamic

Input Capacitance Ciss VGS = 0 V,

VDS = 25 V,

f = 1.0 MHz, see fig. 5 d

- 1300 -

pFOutput Capacitance Coss - 430 -

Reverse Transfer Capacitance Crss - 130 -

Total Gate Charge Qg

VGS = 10 V ID = 18 A, VDS = 160 V,

see fig. 6 and 13 b, c

--70

nC Gate-Source Charge Qgs --13

Gate-Drain Charge Qgd --39

Turn-On Delay Time td(on)

VDD = 100 V, ID = 18 A,

Rg = 9.1 , RD = 5.4 , see fig. 10 b, c

-14-

Rise Time tr -51-

Turn-Off Delay Time td(off) -45-

Fall Time tf -36-

Gate Input Resistance Rgf = 1 MHz, open drain 0.5 - 3.6 

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current ISMOSFET symbol

showing the 

integral reverse

p - n junction diode

--18

Pulsed Diode Forward Current a ISM --72

Body Diode Voltage VSD TJ = 25 °C, IS = 18 A, VGS = 0 V b --2.0V

Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 18 A, dI/dt = 100 A/μs b, c - 300 610 ns

Body Diode Reverse Recovery Charge Qrr -3.47.1μC

Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 3Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)

Fig. 1 - Typical Output Characteristics, TJ = 25 °C

Fig. 2 - Typical Output Characteristics, TJ = 175 °C

Fig. 3 - Typical Transfer Characteristics

Fig. 4 - Normalized On-Resistance vs. Temperature

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

91037_01

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 25 °C

4.5 V

, Drain-to-Source Voltage (V)

, Drain Current (A)

100101

101

100

10-1

101

100

10-1 100101

VDS, Drain-to-Source Voltage (V)

ID, Drain Current (A)

Bottom

To p

VGS

15 V

10 V

8.0 V

7.0 V

6.0 V

5.5 V

5.0 V

4.5 V

20 µs Pulse Width

TC = 150 °C

91037_02

4.5 V

20 µs Pulse Width

VDS = 50 V

101

100

10-1

ID, Drain Current (A)

VGS, Gate-to-Source Voltage (V)

5678910

25 °C

150 °C

91037_03

= 18 A

= 10 V

3.0

0.0

0.5

1.0

1.5

2.0

2.5

Junction Temperature (°C)

DS(on)

, Drain-to-Source On Resistance

(Normalized)

91037_04

- 60 - 40 - 20 0 20 40 60 80 100 120 140 160

3000

2500

2000

1500

500

1000

100101

Capacitance (pF)

VDS, Drain-to-Source Voltage (V)

Ciss

Crss

Coss

VGS = 0 V, f = 1 MHz

Ciss = Cgs + Cgd, Cds Shorted

Crss = Cgd

Coss = Cds + Cgd

91037_05

, Total Gate Charge (nC)

, Gate-to-Source Voltage (V)

015 75

6045

= 40 V

= 100 V

For test circuit

see figure 13

= 160 V

91037_06

= 18 A

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 4Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

Fig. 9 - Maximum Drain Current vs. Case Temperature

Fig. 10a - Switching Time Test Circuit

Fig. 10b - Switching Time Waveforms

Fig. 10 - Maximum Effective Transient Thermal Impedance, Junction-to-Case

101

100

VSD, Source-to-Drain Voltage (V)

ISD, Reverse Drain Current (A)

0.50 1.30

1.100.900.70

25 °C

150 °C

= 0 V

91037_07

1.50

10 µs

100 µs

1 ms

10 ms

Operation in this area limited

by RDS(on)

VDS, Drain-to-Source Voltage (V)

ID, Drain Current (A)

TC = 25 °C

TJ = 150 °C

Single Pulse

102

0.1

125

25 102

25103

91037_08

103

ID, Drain Current (A)

TC, Case Temperature (°C)

25 1501251007550

91037_09

Pulse width ≤ 1 µs

Duty factor ≤ 0.1 %

VGS

D.U.T.

10 V

VDS

VDD

VDS

90 %

10 %

VGS

td(on) trtd(off) tf

0.1

10-2

10-5 10-4 10-3 10-2 0.1 1 10

PDM

t1, Rectangular Pulse Duration (s)

Thermal Response (ZthJC)

Notes:

1. Duty Factor, D = t1/t2

2. Peak Tj = PDM x ZthJC + TC

Single Pulse

(Thermal Response)

0 − 0.5

0.2

0.1

0.05

0.02

0.01

91037_11

10-3

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 5Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 12a - Unclamped Inductive Test Circuit

Fig. 12b - Unclamped Inductive Waveforms

Fig. 12c - Maximum Avalanche Energy vs. Drain Current

Fig. 13a - Basic Gate Charge Waveform

Fig. 13b - Gate Charge Test Circuit

IAS

0.01 Ω

D.U.T.

VDS

-VDD

Driver

15 V

20 V

IAS

VDS

1400

400

600

800

1000

1200

25 150

125

10075

Starting TJ, Junction Temperature (°C)

EAS, Single Pulse Energy (mJ)

Bottom

To p

8.0 A

11.0 A

18.0 A

VDD = 50 V

91037_12c

200

QGS QGD

Charge

10 V

D.U.T.

3 mA

VGS

VDS

IGID

0.3 µF

0.2 µF

50 kΩ

12 V

Current regulator

Current sampling resistors

Same type as D.U.T.

IRF640S, SiHF640S, SiHF640L

www.vishay.com Vishay Siliconix

S16-0014-Rev. E, 18-Jan-16 6Document Number: 91037

For technical questions, contact: hvm@vishay.com

THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT

ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000

Fig. 14 - For N-Channel



Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon

Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and

reliability data, see http://www.vishay.com/ppg?91037.

P.W. Period

dI/dt

Diode recovery

dV/dt

Ripple ≤ 5 %

Body diode forward drop

Re-applied

voltage

Reverse

recovery

current

Body diode forward

current

VGS = 10 Va

ISD

Driver gate drive

D.U.T. lSD waveform

D.U.T. VDS waveform

Inductor current

D = P.W.

Period

Peak Diode Recovery dV/dt Test Circuit

VDD

• dV/dt controlled by Rg

• Driver same type as D.U.T.

• ISD controlled by duty factor “D”

• D.U.T. - device under test

D.U.T. Circuit layout considerations

• Low stray inductance

• Ground plane

• Low leakage inductance

current transformer

Note

a. VGS = 5 V for logic level devices

VDD

Document Number: 91364 www.vishay.com

Revision: 15-Sep-08 1

Package Information

Vishay Siliconix

TO-263AB (HIGH VOLTAGE)

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimensions are shown in millimeters (inches).

3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the

outmost extremes of the plastic body at datum A.

4. Thermal PAD contour optional within dimension E, L1, D1 and E1.

5. Dimension b1 and c1 apply to base metal only.

6. Datum A and B to be determined at datum plane H.

7. Outline conforms to JEDEC outline to TO-263AB.

Detail A

2 x e

2 x b2

2 x b

0.010 A B

MM ± 0.004 B

Base

metal

Plating b1, b3

(b, b2)

(c)

Section B - B and C - C

Scale: none

Lead tip

(Datum A)

2CC

View A - A

Seating plane

Gauge

plane

0° to 8°

Detail “A”

Rotated 90° CW

scale 8:1

L3 A1

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 -

A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420

b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 -

b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC

b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625

b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066

c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070

c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC

D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208

ECN: S-82110-Rev. A, 15-Sep-08

DWG: 5970

Document Number: 91367 www.vishay.com

Revision: 27-Oct-08 1

Package Information

Vishay Siliconix

I2PAK (TO-262) (HIGH VOLTAGE)

Notes

1. Dimensioning and tolerancing per ASME Y14.5M-1994.

2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost

extremes of the plastic body.

3. Thermal pad contour optional within dimension E, L1, D1, and E1.

4. Dimension b1 and c1 apply to base metal only.

Base

metal

Plating b1, b3

(b, b2)

Section A - A

Section B - B and C - C

Scale: None

Seating

plane

Lead tip

(Datum A)

2 x e

3 x b2

3 x b

0.010 A B

MILLIMETERS INCHES MILLIMETERS INCHES

DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX.

A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380

A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 -

b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420

b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 -

b2 1.14 1.78 0.045 0.070 e 2.54 BSC 0.100 BSC

b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555

c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065

c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146

c2 1.14 1.65 0.045 0.065

ECN: S-82442-Rev. A, 27-Oct-08

DWG: 5977

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Revision: 08-Feb-17 1Document Number: 91000

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

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