This is information on a product in full production.
March 2012 Doc ID 022794 Rev 1 1/28
28
VIPER06
Fixed-frequency VIPer™ plus family
Datasheet — production data
Features
■800 V avalanche rugged power section
■PWM operation with frequency jittering for low
EMI
■Operating frequency:
– 30 kHz for VIPER06Xx
– 60 kHz for VIPER06Lx
– 115 kHz for VIPER06Hx
■No need for an auxiliary winding in low-power
applications
■Standby power < 30 mW at 265 VAC
■Limiting current with adjustable set point
■On-board soft-start
■Safe auto-restart after a fault condition
■Hysteretic thermal shutdown
Applications
■Replacement of capacitive power supplies
■Home appliances
■Power metering
■LED drivers
Description
The VIPER06 is an offline converter with an 800 V
avalanche rugged power section, a PWM
controller, a user-defined overcurrent limit, open-
loop failure protection, hysteretic thermal
protection, soft startup and safe auto-restart after
any fault condition. The device is able to power
itself directly from the rectified mains, eliminating
the need for an auxiliary bias winding. Advanced
frequency jittering reduces EMI filter cost. Burst
mode operation and the device’s very low power
consumption both help to meet the standards set
by energy-saving regulations.
Figure 1. Typical application
DIP-7
SSO10
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www.st.com
Contents VIPER06
2/28 Doc ID 022794 Rev 1
Contents
1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Typical power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
6 Typical circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 High voltage current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
9 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10 Soft startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
11 Adjustable current limit set point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
12 FB pin and COMP pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
13 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
14 Automatic auto-restart after overload or short-circuit . . . . . . . . . . . . 19
15 Open-loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
16 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
VIPER06 Contents
Doc ID 022794 Rev 1 3/28
17 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Block diagram VIPER06
4/28 Doc ID 022794 Rev 1
1 Block diagram
2 Typical power
Figure 2. Block diagram
OLP
LOGIC
+
-
E/A
VDD
GND
+
-
PWM
Oscillator
LEB
BURST-MODE
Logic
TURN-ON
LOGIC
SOFT START
UVLO
BURST
OTP
LIM
V
COMPL
HV_ON
SUPPLY
&
UVLO
I
DDch
V
REF_FB
THERMAL
SHUTDOWN
DRAIN
+
-
OCP
I
DLIM
set-up
S
R
Q
Burst
RSENSE
OTP
Internal Supply BUS &
REFERENCE VOLTAGES
COMP
FB
Table 1. Typical power
Part number
230 VAC 85-265 VAC
Adapter(1)
1. Typical continuous power in non-ventilated enclosed adapter measured at 50 °C ambient.
Open frame(2)
2. Maximum practical continuous power in an open-frame design at 50 °C ambient, with adequate heat
sinking.
Adapter(1) Open frame(2)
VIPER06 6 W 8 W 4 W 5 W
VIPER06 Pin settings
Doc ID 022794 Rev 1 5/28
3 Pin settings
Figure 3. Connection diagram (top view)
Note: The copper area for heat dissipation has to be designed under the DRAIN pins.
DRAIN
DRAIN
AM11339v1
DRAIN
DRAIN
DRAIN
DRAIN
DRAIN
GND
VDD
FB
COMP
LIM
Table 2. Pin description
Pin
Name Function
DIP-7 SSO10
11GND
Connected to the source of the internal power MOSFET and controller
ground reference.
22VDD
Supply voltage of the control section. This pin provides the charging
current of the external capacitor.
33LIM
This pin allows setting the drain current limitation. The limit can be
reduced by connecting an external resistor between this pin and GND.
Pin left open if default drain current limitation is used.
44FB
Inverting input of the internal transconductance error amplifier.
Connecting the converter output to this pin through a single resistor
results in an output voltage equal to the error amplifier reference
voltage (see VFB_REF in Table 6). An external resistor divider is
required for higher output voltages.
55COMP
Output of the internal transconductance error amplifier. The
compensation network has to be placed between this pin and GND to
achieve stability and good dynamic performance of the voltage control
loop. The pin is used also to directly control the PWM with an
optocoupler. The linear voltage range extends from VCOMPL to
VCOMPH (Ta b le 6 ).
7, 8 6-10 DRAIN
High-voltage drain pins. The built-in high-voltage switched startup bias
current is drawn from these pins too.
Pins connected to the metal frame to facilitate heat dissipation.
Electrical data VIPER06
6/28 Doc ID 022794 Rev 1
4 Electrical data
4.1 Maximum ratings
4.2 Thermal data
Table 3. Absolute maximum ratings
Symbol Pin
(DIP-7) Parameter
Value
Unit
Min Max
VDRAIN 7, 8 Drain-to-source (ground) voltage 800 V
EAV 7, 8 Repetitive avalanche energy (limited by TJ = 150 °C) 2 mJ
IAR 7, 8 Repetitive avalanche current (limited by TJ = 150 °C) 1 A
IDRAIN 7, 8 Pulse drain current (limited by TJ = 150 °C) 2.5 A
VCOMP 5 Input pin voltage -0.3 3.5 V
VFB 4 Input pin voltage -0.3 4.8 V
VLIM 3 Input pin voltage -0.3 2.4 V
VDD 2 Supply voltage -0.3 Self-
limited V
IDD 2 Input current 20 mA
PTOT
Power dissipation at TA < 40 °C (DIP-7) 1 W
Power dissipation at TA < 50 °C (SSO10) 1 W
TJOperating junction temperature range -40 150 °C
TSTG Storage temperature -55 150 °C
Table 4. Thermal data
Symbol Parameter Max value
SSO10
Max value
DIP-7 Unit
RthJP
Thermal resistance junction pin
(dissipated power = 1 W) 35 40 °C/W
RthJA
Thermal resistance junction ambient
(dissipated power = 1 W) 100 110 °C/W
RthJA
Thermal resistance junction ambient (1)
(dissipated power = 1 W)
1. When mounted on a standard single side FR4 board with 100 mm2 (0.155 sq in) of Cu (35 μm thick).
80 90 °C/W
VIPER06 Electrical data
Doc ID 022794 Rev 1 7/28
4.3 Electrical characteristics
(TJ = -25 to 125 °C, VDD = 14 V (a) unless otherwise specified).
a. Adjust VDD above VDDon startup threshold before setting to 14 V.
Table 5. Power section
Symbol Parameter Test condition Min Typ Max Unit
VBVDSS Breakdown voltage IDRAIN = 1 mA,
VCOMP = GND, TJ = 25 °C 800 V
IOFF OFF state drain current VDRAIN = max rating,
VCOMP = GND 60 μA
RDS(on) Drain-source on-state resistance IDRAIN = 0.2 A, TJ = 25 °C 32 Ω
IDRAIN = 0.2 A, TJ = 125 °C 67 Ω
COSS Effective (energy related) output capacitance VDRAIN = 0 to 640 V 10 pF
Table 6. Supply section
Symbol Parameter Test condition Min Typ Max Unit
Voltag e
VDRAIN_START Drain-source startup voltage 25 45 V
IDDch1 Startup charging current VDRAIN = 100 V to 640 V,
VDD = 4 V -0.6 -1.8 mA
IDDch2 Charging current during operation VDRAIN = 100 V to 640 V,
VDD = 9 V falling edge -7 -14 mA
VDD Operating voltage range 11.5 23.5 V
VDDclamp VDD clamp voltage IDD = 15 mA 23.5 V
VDDon VDD startup threshold 12 13 14 V
VDDCSon
VDD on internal high-voltage current
generator threshold 9.5 10.5 11.5 V
VDDoff VDD undervoltage shutdown threshold 7 8 9 V
Current
IDD0 Operating supply current, not switching FOSC = 0 kHz, VCOMP = GND 0.6 mA
IDD1 Operating supply current, switching
VDRAIN = 120 V,
FOSC = 30 kHz 1.3 mA
VDRAIN = 120 V,
FOSC = 60 kHz 1.45 mA
VDRAIN = 120 V,
FOSC = 115 kHz 1.6 mA
IDDoff Operating supply current with VDD < VDDoff VDD < VDDoff 0.35 mA
IDDol Open-loop failure current threshold VDD = VDDclamp
VCOMP = 3.3 V, 4 mA
Electrical data VIPER06
8/28 Doc ID 022794 Rev 1
Table 7. Controller section
Symbol Parameter Test condition Min Typ Max Unit
Error amplifier
VREF_FB FB reference voltage 3.2 3.3 3.4 V
IFB_PULL UP Current pull-up -1 μA
GMTransconductance 2 mA/V
Current setting (LIM) pin
VLIM_LOW Low-level clamp voltage ILIM = -100 μA0.5V
Compensation (COMP) pin
VCOMPH Upper saturation limit TJ = 25 °C 3 V
VCOMPL Burst mode threshold TJ = 25 °C 1 1.1 1.2 V
VCOMPL_HYS Burst mode hysteresis TJ = 25 °C 40 mV
HCOMP ΔVCOMP / ΔIDRAIN 49V/A
RCOMP(DYN) Dynamic resistance VFB = GND 15 kΩ
ICOMP
Source / sink current VFB > 100 mV 150 μA
Max source current VCOMP = GND, VFB = GND 220 μA
Current limitation
IDlim Drain current limitation ILIM = -10 μA, VCOMP = 3.3 V,
TJ = 25 °C 0.32 0.35 0.38 A
tSS Soft-start time 8.5 ms
TON_MIN Minimum turn-on time 450 ns
IDlim_bm Burst mode current limitation VCOMP = VCOMPL 85 mA
Overload
tOVL Overload time 50 ms
tRESTART Restart time after fault 1 s
Oscillator section
FOSC Switching frequency
VIPER06Xx 27 30 33 kHz
VIPER06Lx 54 60 66 kHz
VIPER06Hx 103 115 127 kHz
FDModulation depth
FOSC = 30 kHz ±3 kHz
FOSC = 60 kHz ±4 kHz
FOSC = 115 kHz ±8 kHz
FMModulation frequency 230 Hz
DMAX Maximum duty cycle 70 80 %
VIPER06 Electrical data
Doc ID 022794 Rev 1 9/28
Thermal shutdown
TSD Thermal shutdown temperature 150 160 °C
THYST Thermal shutdown hysteresis 30 °C
Table 7. Controller section (continued)
Symbol Parameter Test condition Min Typ Max Unit
Typical electrical characteristics VIPER06
10/28 Doc ID 022794 Rev 1
5 Typical electrical characteristics
Figure 4. IDlim vs. TJ Figure 5. FOSC vs. TJ
Figure 6. VDRAIN_START vs. TJFigure 7. HCOMP vs. TJ
Figure 8. GM vs. TJFigure 9. VREF_FB vs. TJ
IDlim/ IDlim@2 5°C
0.94
0.96
0.98
1.00
1.02
1.04
-50 0 50 100 150
TJ [°C]
AM01144v1
AM01145v1
FOSC / FOSC@25°C
0.92
0.94
0.96
0.98
1.00
1.02
1.04
-50 0 50 100 150
TJ [°C]
AM01146v1
VDRAIN_START / VDRAIN_START@25°C
0.960
0.970
0.980
0.990
1.000
1.010
1.020
-50 0 50 100 150
TJ [°C]
AM01147v1
HCOM P / HC O M P@2 5°C
0.80
0.90
1.00
1.10
1.20
1.30
-50 0 50 100 150
TJ [°C]
AM01148v1
GM / GM @2 5°C
0.80
0.85
0.90
0.95
1.00
1.05
1.10
-50 0 50 100 150
TJ [°C]
AM01149v1
V REF_ FB / V REF_ FB@2 5°C
0.80
0.84
0.88
0.92
0.96
1.00
1.04
1.08
-50 0 50 100 150
TJ [°C]
VIPER06 Typical electrical characteristics
Doc ID 022794 Rev 1 11/28
Figure 10. ICOMP vs. TJFigure 11. Operating supply current
(no switching) vs. TJ
Figure 12. Operating supply current
(switching) vs. TJ
Figure 13. IDlim vs. RLIM
Figure 14. Power MOSFET on-resistance
vs. TJ
Figure 15. Power MOSFET breakdown voltage
vs. TJ
AM01150v1
ICOM P / ICOM P@2 5°C
0.80
0.84
0.88
0.92
0.96
1.00
1.04
1.08
-50 0 50 100 150
TJ [°C]
AM01151v1
IDD 0 / IDD0@25°C
0.80
0.84
0.88
0.92
0.96
1.00
1.04
1.08
-50 0 50 100 150
TJ [°C]
AM01152v1
IDD 1 / IDD1@2 5°C
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.05
1.10
-50 0 50 100 150
TJ [°C]
AM01153v1
IDlim / IDlim@10 0 KOhm
0.00
0.10
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
1.10
020406080100
Rlim [ k Oh m ]
Typical electrical characteristics VIPER06
12/28 Doc ID 022794 Rev 1
Figure 16. Thermal shutdown
T
J
V
DD
I
DRAIN
V
DDon
time
V
DDCSon
V
DDoff
T
SD
time
time
T
SD
-T
HYST
Shut down after over temperature
Normal operation Normal operation
VIPER06 Typical circuit
Doc ID 022794 Rev 1 13/28
6 Typical circuit
Figure 17. Flyback converter (non-isolated output)
Figure 18. Flyback converter (isolated output)
AM01197v1
VOUT
4
12
10
66
+
Cout
+
C2
Rcomp1
Ccl
CONTROL
FB
DRAIN
GND
VDD
COMP LIM
VIPer16
AC IN
Rcl
D1
Rfb2
AC IN
Ccomp1
RLIM
Dout
Rfb1
Rin
Daux
-+
Din
1
4
3
2
(optional)
+
C3
C1
L1
Ccomp2
AM01195v1
-
AC IN
AC IN
VOUT
L1L1
C5C5
C3C3
C4C4
+
C7
+
C7
R3R3
R5R5
D3D3
CONTROL
FB
DRAIN
GND
VDD
COMP LIM
VIPER06
CONTROL
FB
DRAIN
GND
VDD
COMP LIM
VIPER06
+
C2
+
C2
C8C8R4R4
D1D1
+
C1
+
C1
R1R1
R6R6
T2T2
C6C6
IC2IC2
IC3IC3
D2D2
R2R2
Typical circuit VIPER06
14/28 Doc ID 022794 Rev 1
Figure 19. Flyback converter (isolated output without optocoupler)
Figure 20. Buck converter
(optional)
Rfbl
L1
CONTROL
FB
DRAIN
GND
VDD
COMP
LIM
VIPer06
Rfbh
+
Cout
TRANSF
1
3
4
12
10
66
FUSE
Daux
+
CVDD
Rc
+
C1
D2
Rcl
Cfb
-+
D0
BRIDGE
1
4
3
2
D1
Cc
Cp RLIM
Ccl
+
C2
Raux
Vout
AC IN
AC IN
.
AM01196v1
(optional)
CONTROL
FB
DRAIN
GND
VDD
COMP
LIM
VIPer06
Ccomp
Rfb2
Cout
C1
D2
Lout
C3
Rfb1
Rcomp
C4
L1
C2
RLIM
Cfb
Dout
AC IN
GND
Vout
AM01194v1
VIPER06 Power section
Doc ID 022794 Rev 1 15/28
7 Power section
The power section is implemented with an N-channel power MOSFET with a breakdown
voltage of 800 V min. and a typical RDS(on) of 32 Ω. It includes a SenseFET structure to allow
virtually lossless current sensing and the thermal sensor.
The gate driver of the power MOSFET is designed to supply a controlled gate current during
both turn-ON and turn-OFF in order to minimize common-mode EMI. During UVLO
conditions, an internal pull-down circuit holds the gate low in order to ensure that the power
MOSFET cannot be turned ON accidentally.
8 High voltage current generator
The high-voltage current generator is supplied by the DRAIN pin. At the first startup of the
converter it is enabled when the voltage across the input bulk capacitor reaches the
VDRAIN_START threshold, sourcing a IDDch1 current (see Table 6 on page 7). As the VDD
voltage reaches the VDDon threshold, the power section starts switching and the high-
voltage current generator is turned OFF. The VIPER06 is powered by the energy stored in
the VDD capacitor.
In a steady-state condition, if the self-biasing function is used, the high-voltage current
generator is activated between VDDCSon and VDDon (see Table 6 on page 7), delivering
IDDch2, see Table 6 on page 7 to the VDD capacitor during the MOSFET off-time (see
Figure 21).
The device can also be supplied through the auxiliary winding in which case the high-
voltage current source is disabled during steady-state operation, provided that VDD is
above VDDCSon.
At converter power-down, the VDD voltage drops and the converter activity stops as it falls
below the VDDoff threshold (see Table 6 on page 7).
Figure 21. Power-on and power-off
Oscillator VIPER06
16/28 Doc ID 022794 Rev 1
9 Oscillator
The switching frequency is internally fixed at 30 kHz or 60 kHz or 115 kHz (respectively part
numbers VIPER06Xx, VIPER06Lx and VIPER06Hx).
The switching frequency is modulated by approximately ±3 kHz (30 kHz version) or ±4 kHz
(60 kHz version) or ±8 kHz (115 kHz version) at 230 Hz (typical) rate, so that the resulting
spread spectrum action distributes the energy of each harmonic of the switching frequency
over a number of sideband harmonics having the same energy on the whole, but smaller
amplitudes.
10 Soft startup
During the converter’s startup phase, the soft-start function progressively increases the
cycle-by-cycle drain current limit, up to the default value IDlim. In this way the drain current is
further limited and the output voltage is progressively increased, reducing the stress on the
secondary diode. The soft-start time is internally fixed to tSS, see typical value
in Table 7 on page 8, and the function is activated for any attempt of converter startup and
after a fault event.
This function helps prevent saturation of the transformer during startup and short-circuit.
11 Adjustable current limit set point
The VIPER06 includes a current-mode PWM controller. The drain current is sensed cycle-
by-cycle through the integrated resistor RSENSE and the voltage is applied to the non-
inverting input of the PWM comparator, see Figure 2 on page 4. As soon as the sensed
voltage is equal to the voltage derived from the COMP pin, the power MOSFET is switched
OFF.
In parallel with the PWM operations, the comparator OCP, see Figure 2 on page 4, checks
the level of the drain current and switches OFF the power MOSFET in case the current is
higher than the threshold IDlim, see Table 7 on page 8.
The level of the drain current limit IDlim can be reduced using a resistor RLIM connected
between the LIM and GND pins. Current is sunk from the LIM pin through the resistor RLIM
and the setup of IDlim depends on the level of this current. The relation between IDlim and
RLIM is shown in Figure 13 on page 11.
When the LIM pin is left open or if RLIM has a high value (i.e. > 80 kΩ), the current limit is
fixed to its default value, IDlim, as given in Table 7 on page 8.
VIPER06 FB pin and COMP pin
Doc ID 022794 Rev 1 17/28
12 FB pin and COMP pin
The device can be used both in non-isolated and isolated topology. In non-isolated topology,
the feedback signal from the output voltage is applied directly to the FB pin as the inverting
input of the internal error amplifier having the reference voltage, VREF_FB, see Tabl e 7 on
page 8.
The output of the error amplifier sources and sinks the current, ICOMP
, respectively to and
from the compensation network connected on the COMP pin. This signal is then compared
in the PWM comparator with the signal coming from the SenseFET in order to switch off the
power MOSFET on a cycle-by-cycle basis. See the Figure 2 on page 4 and the Figure 22.
When the power supply output voltage is equal to the error amplifier reference voltage,
VREF_FB, a single resistor has to be connected from the output to the FB pin. For higher
output voltages the external resistor divider is needed. If the voltage on the FB pin is
accidentally left floating, an internal pull-up protects the controller.
The output of the error amplifier is externally accessible through the COMP pin and it’s used
for the loop compensation, usually an RC network.
As shown in Figure 22, in case of an isolated power supply, the internal error amplifier has to
be disabled (FB pin shorted to GND). In this case an internal resistor is connected between
an internal reference voltage and the COMP pin, see Figure 22. The current loop has to be
closed on the COMP pin through the opto-transistor in parallel with the compensation
network. The VCOMP dynamic range is between VCOMPL and VCOMPH shown in Figure 23 on
page 18.
When the voltage VCOMP drops below the voltage threshold VCOMPL, the converter enters
burst mode, see Section 13 on page 18.
When the voltage VCOMP rises above the VCOMPH threshold, the peak drain current, as well
as the deliverable output power, will reach its limit.
Figure 22. Feedback circuit
FB
COMP
Without Isolation:
switch open & E/A enabled
With Isolation:
switch closed & E/A disabled
No
Isolation
V
OUT
+
-
PWM stop
from R
SENSE
R
Isolation
R
L
nR
SW
V
REF
R
COMP
+
-
E/A
BUS
+
-
to PWM
V
COMPL
R
HV
REF_FB
Burst mode VIPER06
18/28 Doc ID 022794 Rev 1
Figure 23. COMP pin voltage versus IDRAIN
13 Burst mode
When the voltage VCOMP drops below the threshold, VCOMPL, the power MOSFET is kept in
the OFF state and the consumption is reduced to the IDD0 current, as reported on Ta bl e 6 o n
page 7. In reaction to the loss of energy, the VCOMP voltage increases and as soon as it
exceeds the threshold VCOMPL + VCOMPL_HYS, the converter starts switching again with a
level of consumption equal to the IDD1 current. This ON-OFF operation mode, referred to as
“burst mode” and shown in Figure 24 on page 18, reduces the average frequency, which can
go down even to a few hundreds hertz, thus minimizing all frequency-related losses and
making it easier to comply with energy-saving regulations. During burst mode, the drain
current limit is reduced to the value IDlim_bm (given inTable 7 on page 8) in order to avoid the
audible noise issue.
Figure 24. Load-dependent operating modes: timing waveforms
AM01095v1
V
COMPH
V
COMPL
I
Dlim_bm
I
Dlim
IDRAIN
VCOMP
time
time
time
V
COMP
V
COMPL
+V
COMPL_HYS
V
COMPL
I
DD1
I
DD0
I
DD
I
DRAIN
I
Dlim_bm
Burst Mode
VIPER06 Automatic auto-restart after overload or short-circuit
Doc ID 022794 Rev 1 19/28
14 Automatic auto-restart after overload or short-circuit
The overload protection is implemented automatically using the integrated up-down counter.
Every cycle, it is incremented or decremented depending upon the current logic detection of
the limit condition or not. The limit condition is the peak drain current, IDlim , given in Tabl e 7
on page 8 or the one set by the user through the RLIM resistor, shown in Figure 13 on
page 11. After the reset of the counter, if the peak drain current is continuously equal to the
level IDlim, the counter will be incremented until the fixed time, tOVL, at which point the power
MOSFET switch ON will be disabled. It will be activated again through the soft-start after the
tRESTART time (see Figure 25 and Figure 26 on page 19) and the time values mentioned in
Table 7 on page 8.
For overload or short-circuit events, the power MOSFET switching will be stopped after a
period of time dependent upon the counter with a maximum equal to tOVL. The protection
sequence continues until the overload condition is removed, see Figure 25 and Figure 26.
This protection ensures a low repetition rate of restart attempts of the converter, so that it
works safely with extremely low power throughput and avoids overheating the IC in case of
repeated overload events. If the overload is removed before the protection tripping, the
counter will be decremented cycle-by-cycle down to zero and the IC will not be stopped.
Figure 25. Timing diagram: OLP sequence (IC externally biased)
Figure 26. Timing diagram: OLP sequence (IC internally biased)
time
time
V
DD
V
DDon
V
DDCSon
I
DRAIN
I
Dlim_bm
t
1*
* The time t
1
can be lower or equal to the time t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
SHORT CIRCUIT
OCCURS HERE
SHORT CIRCUIT
REMOVED HERE
time
time
V
DD
V
DDon
V
DDCSon
I
DRAIN
I
Dlim_bm
t
1*
* The time t
1
can be lower than or equal to the time t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
t
OVL
t
RESTART
t
SS
SHORT CIRCUIT
OCCURS HERE
SHORT CIRCUIT
REMOVED HERE
Open-loop failure protection VIPER06
20/28 Doc ID 022794 Rev 1
15 Open-loop failure protection
If the power supply has been designed using flyback topology and the VIPER06 is supplied
by an auxiliary winding, as shown in Figure 27 and Figure 28 on page 21, the converter is
protected against feedback loop failure or accidental disconnections of the winding.
The following description is applicable for the schematics of Figure 27 and Figure 28 on
page 21, respectively the non-isolated flyback and the isolated flyback.
If RH is open or RL is shorted, the VIPER06 works at its drain current limitation. The output
voltage, VOUT
, will increase as does the auxiliary voltage, VAUX, which is coupled with the
output through the secondary-to-auxiliary turns ratio.
As the auxiliary voltage increases up to the internal VDD active clamp, VDDclamp (the value is
given in Table 7 on page 8) and the clamp current injected on the VDD pin exceeds the latch
threshold, IDDol (the value is given in Table 7 on page 8), a fault signal is internally
generated.
In order to distinguish an actual malfunction from a bad auxiliary winding design, both the
above conditions (drain current equal to the drain current limitation and current higher than
IDDol through the VDD clamp) have to be verified to reveal the fault.
If RL is open or RH is shorted, the output voltage, VOUT
, will be clamped to the reference
voltage VREF_FB (for non-isolated flyback) or to the external TL voltage reference (for
isolated flyback).
Figure 27. FB pin connection for non-isolated flyback
V
COMPL
D
AUX
nR
FB
VDD
V
AUX
COMP
+
-
to PWM
R
L
+
-
E/A
R
H
R
R
AUX
C
VDD
V
OUT
R
S
V
REF_FB
from R
SENSE
BUS
+
-
PWM stop
C
S
C
P
VIPER06 Open-loop failure protection
Doc ID 022794 Rev 1 21/28
Figure 28. FB pin connection for isolated flyback
V
REF_FB
R
H
C
COMP
+
-
PWM stop
R
3
R
TL
R
AUX
R
COMP
C
VDD
-
COMP
+
-
E/A
nR
R
L
V
REF
C
C
U5
Disabled
V
AUX
V
OUT
+
-
to PWM
SW
FB
R
OPTO
BUS
D
AUX
V
COMPL
from R
SENSE
R
C
Package mechanical data VIPER06
22/28 Doc ID 022794 Rev 1
16 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Note: 1 The lead size includes the thickness of the lead finishing material.
2 Dimensions do not include mold protrusion, not to exceed 0.25 mm in total (both sides).
3 Package outline exclusive of metal burr dimensions.
4 Datum plane “H” coincident with the bottom of lead, where lead exits body (refer to
Figure 29 on page 23).
Table 8. DIP-7 mechanical data
Dim.
mm
Typ Min Max
A 5.33
A1 0.38
A2 3.30 2.92 4.95
b 0.46 0.36 0.56
b2 1.52 1.14 1.78
c 0.25 0.20 0.36
D 9.27 9.02 10.16
E 7.87 7.62 8.26
E1 6.35 6.10 7.11
e 2.54
eA 7.62
eB 10.92
L 3.30 2.92 3.81
M(1)(2)
1. Creepage distance > 800 V.
2. Creepage distance as given in the 664-1 CEI / IEC standard.
2.508
N 0.50 0.40 0.60
N1 0.60
O(2)(3)
3. Creepage distance 250 V.
0.548
VIPER06 Package mechanical data
Doc ID 022794 Rev 1 23/28
Figure 29. DIP-7 package dimensions
Package mechanical data VIPER06
24/28 Doc ID 022794 Rev 1
Table 9. SSO10 mechanical data
Dim.
Databook (mm.)
Typ Min. Max
A 1.75
A1 0.10 0.25
A2 1.25
b 0.31 0.51
c 0.17 0.25
D 4.90 4.80 5
E 6 5.80 6.20
E1 3.90 3.80 4
e 1
h 0.25 0.50
L 0.40 0.90
K 0° 8°
VIPER06 Package mechanical data
Doc ID 022794 Rev 1 25/28
Figure 30. SSO10 package dimensions
8140761 rev. A
Order codes VIPER06
26/28 Doc ID 022794 Rev 1
17 Order codes
Table 10. Ordering information
Order code Package Packaging
VIPER06XN
DIP-7 TubeVIPER06LN
VIPER06HN
VIPER06XS
SSO10
Tube
VIPER06XSTR Tape and reel
VIPER06LS Tube
VIPER06LSTR Tape and reel
VIPER06HS Tube
VIPER06HSTR Tape and reel
VIPER06 Revision history
Doc ID 022794 Rev 1 27/28
18 Revision history
s
Table 11. Document revision history
Date Revision Changes
08-Mar-2012 1Initial release.
VIPER06
28/28 Doc ID 022794 Rev 1
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VIPER06HN VIPER06HS VIPER06LN VIPER06LS VIPER06LSTR VIPER06XSTR VIPER06XS VIPER06XN
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