System integration solutions
aerospace
R
System Level
Integration
for the space
market
2000
ASICs for Aerospace
Atmel Wireless & Microcontollers
is a major supplier of radiation
hardened VLSI products for space
applications.
Committed since almost 20 years to
serve this demanding market,
we continuously improve our
technologies and products to provide
our customers the most advanced
integration solutions.
Being part of Atmel Corporation,
a leading semiconductor company,
Atmel Wireless & Microcontollers
has access to advanced technolo-
gies, manufacturing facilities and
product portfolio. This enable us to
extend our offer to the space indus-
try with a unique capability, paving
the way for System Level Integration.
The space market is currently
experiencing the development of new
applications like:
❶
encrypted communication networks
and very high resolution radar and
sonar for military applications,
❶
wide band communication satellites
based on LEO constellations,
requiring more and more integration
capability for the ASICs, including
embedded functionality while
achieving lower power consumption
and shorter design cycle times.
0.18 µm
0.6 µm
0.5 µm
0.35 µm
0.25 µm
FPGA
SEU immune
RAM
DPRAM
FIFO
An impressive heritage
❶
in the early 80's, the MART series allows integration to a few thousand gates,
❶
in the mid 80's, the MBRT series upgrades to 10K used gates,
❶
in the late 80's, the MCRT, series up to 45K used gates, first sub-micronic ASIC series ESA
qualified under the capability approval concept which pioneered the later QML concept,
❶
in the mid 90's, the MG1RT series tackles the 300K used gate level,
❶
in 97 and 98, MG2RT and MG2RTP series allow 500K used gate / 100 Krad and 350K
used gate / 350 Krad respectively,
❶
currently introduced, the MH1RT exhibits a gate complexity close to 2M used gates on
our qualified 0.35 µm CMOS process, 4 metal layers, characterized for 200 Krad,
❶
under development the hardening of 0.25 µm process allowing to introduce in 2001
the MH2RT series which will offer close to 5M used gates.
Technology
Libraries
Reusable IPs
Flash
Embedded cores
E2PROM
Dual use
Atmel Wireless & Microcontrollers dual-
use approach consists of adapting
commercial technologies that have
demonstrated their performance
in volume production, to meet
the stringent rad-hard application
requirements, while keeping
market compatibility.
This gives our customers access
to the latest innovations and allows
for competitive solutions
and fast time-to-market.
Meeting
communication
satellite
challenges
MG2RT MG2RTP MH1RT MH2RT
PPrroocceessssSSCCMMOOSS33RRTTSSCCMMOOSS33RRTTPPAATT5566KKRRTTAATT5577KKRRTT
Feature size (
µ
m) 0.5 0.5 0.35 0.25
Metal Layers 3 3 4 5
Isolation LOCOS LOCOS LOCOS STI
AASSIICCSSooGGSSooGGSSooGGSSooGG
Available gates 700K 495K 3300K 7800K
Used gates /mm22200 1600 8000 20000
Pad pitch (
µ
m) 94.6 110 94.6 80
I/O capacity 607 501 588 700
Availability available available 2Q2000 2Q2001
Libraries 3.3 V 0,3 V
5 V 10% 5 V 10% 3 V 10 % 2.5 V 5%
3 V 10% 3 V 10% 2.5 V 5% 1.8 V 5%
Power consumption 0.84 @ 1.1 @ 0.4 @ 0.1 @
(
µ
W/gate/MHz) 3 V 3 V 3 V 2.5 V
NAND2 typ. prop. delay (ps) 250 @ 3 V 200 @ 5 V 180 @ 3.3 V 115 @ 2.5 V
Max PLL speed (MHz) 130 @ 3 V 200 @ 5 V 300 @ 3.3 V 450 @ 2.5 V
Max toggle frequency (MHz) 410 @ 5 V 440 @ 5 V 800 @ 3.3 V 900 @ 2.5 V
RRaaddiiaattiioonn
Functional TID (Krads) 100 @ 5.5 V 350 @ 5.5 V 200 @ 3.3 V 300 @ 2.625 V
Latch up (MeV) >100 >100 >100 >100
SEU LET threshold (MeV) >100 @ 2.7 V* >100 @ 2.7 V* >100 @ 2.7 V* >100 @ 2.375 V*
QQuuaalliittyy fflloowwSSCCCC//QQMMLL//888833SSCCCC//QQMMLL//888833SSCCCC//QQMMLLSSCCCC//888833
**when using SEU free cell library
Placement
Routing
Static analysis
Power estimate
Test insertion
System
Level
Integration
System
Level
Integration
KGD
BGA
MQFPs
MCM
Flip chip
Wire bonding
CSP
Design tools
Packaging
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available
on going development
future development
ASICs series offering
A unique capability for integration
Abbreviations
BBGGAA- Ball Grid Array
CCSSPP --Chip Size Package
KKGGDD- Known Good Die
MMCCMM- Multi Chip Module
SSTTII- Shallow Trench Isolation
SSooGG- Sea of Gate
TTIIDD- Total Induced Dose
IIPP --Intellectual Property
Ref.: ASIC AERO / 02.2000 - ©Atmel Wireless & Microntrollers
, 2000
www.atmel-wm.com
Atmel Wireless & Microcontrollers
Atmel Wireless & Microcontrollers
La Chantrerie, BP 70602
44306 Nantes cedex 3, France
Tel : +33 2 40 18 18 18
Fax : +33 2 40 18 19 60
Main Sales Offices
France Tel : 33 1 30 60 70 00
Germany Tel : 49 89 31 97 00
Italy Tel : 39 2 38 03 71
Spain Tel : 34 91 564 51 81
Sweden Tel : 46 8 587 48 800
United Kingdom Tel : 44 1 344 707 300
USA - Eastern Tel : 1 908 730 7426
USA - Western Tel : 1 408 441 0311
Hong Kong Tel : 852 23 789 789
Korea Tel : 822 785 1136
Japan Tel : 81 3 35 23 3551
For technical questions
please contact:
micro@tatmel-wm.com
visit our web site:
www.atmel-wm.com/nt/ams
Developing
for the future
Our permanent evaluation and
development activities permit
forward movement in the fields of:
❶
new IPs focusing on communica-
tion protocol standards such as the
1553 bus controller recently added
to our portfolio,
❶
SRAM based FPGAs, SEU immune
will enable a couple thousand
gates to be embedded into any of
our ASIC series,
❶
E²PROM and Flash memory ,
❶
new assembly technologies allowing
to accommodate almost 1000 pads
with smaller packages: the flip chip
solution will allow us to break this
barrier,
❶
new package styles allowing more
interconnects into a smaller size
and lighter solution, like BGAs do,
reducing ball pitch from current
1.27 mm down to 0.5 mm,
❶
new solutions for emerging hybrid
and MCM applications requiring
either a new high density package
style, such as CSP (Chip Size/Scale
Package) or our KGD concept,
already available, combined with flip
chip capabilities.
Broad range
of products
Atmel Wireless & Microcontrollers
portfolio for aerospace also include:
❶
32-bit RISC microprocessors, based
on Sparc architecture. The latest
Getting outstanding support
Dedicated technical centers located in France, Germany, Italy, UK and USA allow us to
provide our customers with the best support during the ASIC development project. Also
manufacturing, assembly and test phases, are managed by a dedicated engineering team,
ensuring the respect of all necessary steps and screening according to quality flows such
as Mil 883, SCC9000 or QML Q or V.
product is a 25 MHz single chip
including the Integer Unit, Floating
Point unit, memory controller, and On
Chip Debugger with JTAG emulation,
❶
Floating Point DSP that is a
pin and code compatible
radiation hardened version of the
popular ADSP-21020, operating
at 60 MFLOPs,
❶
C51 Intel based 8-bit micro-
controllers,
❶
SRAMs, DPRs and FIFOs memories,
including optimized blocks and
embedded processor cores for ASIC.
