DS-11802D4-104S - Data Device Corporation

DS-11802

FOUR QUADRANT MULTIPLYING SIN/COS DAC,

MICROPROCESSOR COMPATIBLE, 16-BIT HYBRID

DESCRIPTION

The DS-11802 is a small size, high

accuracy, 16-bit digital-to-sine/cosine

converter. Available in accuracies up

to 1 arc minute, the DS-11802 is con-

tained in a 28-pin DDIP and requires

+15 Vdc and -15 Vdc power supplies.

The reference input is buffered

through an op-amp to minimize load-

ing on the input signal and can accept

up to ±10 V peak. The DS-11802 is

pin programmable for gains of 0.5,

1.0, and 2.0. Two registers for the

input of the 16-bit (CMOS/TTL) natur-

al binar y angle data allow for compat-

ibility with an 8-bit or 16-bit data bus.

Internally, the DS-11802 has a multi-

plying digital-to-sin/cos converter

consisting of two function generators

and a quadrant select network.

Quadrant information is available

from the two most significant bits

(MSBs). The two function generators

use the remaining angular data along

with the buffered reference voltage.

Similar to a multiplying DAC (digital-

to-analog converter), the DS-11802

uses high-accuracy resistive ladder

networks and solid-state switching to

control the attenuation of the refer-

ence voltage.The output buffer ampli-

fiers allow for up to 2 mA output drive.

APPLICATIONS

Due to the high accuracy, high reliabil-

ity, small size, low power consumption

and MIL-PRF-38534 processing avail-

able, the DS-11802 is suitable for

industrial and military g round or avion-

ic applications. Possible applications

include digital remote positioning,

resolver angle simulation, flight train-

ers, flight instrumentation, radar and

navigational systems, and PPI dis-

plays including moving target indica-

tors. Other applications are syn-

chro/resolver system development

and testing, and wraparound test of

synchro/resolver-to-digital conver ters.

FEATURES

•

28-Pin Ceramic DDIP Package

•

1 Arc Minute Accuracy

•

0.03% Radius Accuracy

•

Microprocessor Compatible -

8- and 16-Bit

•

Double-Buffered Inputs

•

Pin-Programmable Gain -

0.5, 1.0 or 2.0

•

Buffered Reference Input

•

DC-Coupled Reference and

Outputs

•

Requires Only ±15 V Power

Supplies

•

TTL and CMOS Compatible

•

Pin-for-Pin Replacement for

Natel’s HDSC2306

GND 20 23 24

VIN GC1 GC2

REFERENCE

CONDITIONER

BIT16

(LSB)

COSθ

SINθ

BUFFER

AMPLIFIERS

16-BIT

HIGH

ACCURACY

MULTIPLYING

DIGITAL

TO SIN / COS

CONVERTER

16-BIT

HOLDING

BIT 1

(MSB)

Q16

8-BIT

INPUT

8-BIT

INPUT

INPUT BUFFERS

–VS

HBE

(MSB) B1

B10

B11

B12

B13

B14

B15

(LSB) B16

LBE

LDC

TP1

FIGURE 1. DS-11802 BLOCK DIAGRAM

ANALOG OUTPUT GAIN CONTROL AND PHASING

The DS-11802 is pin-programmab le for gains of 0.5, 1.0 and 2.0.

TABLE 2 details the programming of gain control pins 23 (GC1)

and 24 (GC2). When both pins are left unconnected or open, the

gain of the conver ter is 2.0. The output signal would be: 2 Vin

sinθand 2 Vin cosθ. When GC2 is connected to GND and GC1

is left open, the conver ter gain is 1.0. When GC1 is connected

to GND and GC2 is left open, the conver ter gain is 0.5. When

looking at the equivalent gain circuit (see FIGURE 2) the gain of

the converter can be modified by adding a resistor betw een GC1

or GC2 and GND.

8 MSBs enter high

byte input register.

High byte register

remains unaffected.

8 LSBs enter low byte

input register.

Low byte register

remains unaffected.

Data from input regis-

ters transferred to

holding register.

Data in holding regis-

ter remains unaffected.

Logic 1

Logic 0

Logic 1

Logic 0

Logic 1

Logic 0

HBE

(High Byte Enable)

LBE

(Low Byte Enable)

LDC

(Load Converter)

No external logic volt-

ages required.

CMOS transient pro-

tected.

For less than 16 bits,

unused pins can be

left unconnected.

Pins not used can be

left unconnected.

DIGITAL INPUTS

Logic Voltage Levels

Logic 0

Logic 1

Input Current

Data Bits (B1-B16)

HBE, LBE, LDC

ANALOG OUTPUTS

SIN θ

COS θ

Converter Gain (K)

Radius Accuracy

Output Current

Output Impedance

Zero Offset (dc)

Offset Drift

Output Settling Time

Op amp buffer

0 to ±10 Vp ac or dc

dc to 1000 Hz

1 MΩmin

ANALOG INPUT

(VIN)

Voltage

Frequency Range

Input Resistance

16 Bits

±4 arc-minutes

±2 arc-minutes

±1 arc-minutes

DIGITAL ANGULAR

Resolution

Accuracy

REMARKSVALUEPARAMETER

TABLE 1. DS-11802 SPECIFICATIONS

For ±10 V pk output.±15 V dc ±10%

±25 mA max

80 db typ

POWER SUPPLIES

Supply Voltages (±Vs)

Supply Current

Supply Rejection

Before data transfer.

Before input data

changes.

200 ηsec min

(Continued)

Data Set-up Time

Data Hold Time

ABSOLUTE MAXIMUM RATINGS

Reference Input: -Vs to +Vs

Power Supply Voltage (±Vs): ±18 V dc

Digital Inputs: -0.3 V dc to +6.5 V dc

PHYSICAL

CHARACTERISTICS

Type

Size

Weight

REMARKSVALUEPARAMETER

TABLE 1. DS-11802 SPECIFICATIONS (CONTINUED)

Bit 1 = MSB, Bit 16 = LSB

Accuracy applies over

operating temperature

range.

K • Vin •SIN θ

K • Vin •COS θ

0.5 ±0.2%

1.0 ±0.2%

2.0 ±0.2%

±0.1%

2 mA rms

< 1 ohm

±10 mV typical

±25 mV max

25 µV/°C

30 µsec max to

accuracy of con-

verter

±10 Vp A C or DC

Pin 23 connected to gnd.

Pin 24 no connection.

Pin 24 connected to gnd.

Pin 23 no connection.

Pin 23 and 24 floating.

Guaranteed, but not

tested.

Op amp output.

For any digital step

change.

28 Pin Double DIP

0.6 x 1.4 x 0.2 in.

(15 x 36 x 5) mm

0.5 oz

(15 gm) max

GC1

(PIN 23) GC2

(PIN 24) GAIN

(K)

Open Open 2.0

Gnd Open 0.5

Open Gnd 1.0

TABLE 2. GAIN CONTROL PINS

0°C to +70°C

-40°C to +85°C

-55°C to +125°C

-65°C to +135°C

-0.3 V DC to 0.8 V DC

2.4 V DC to 5.5 V DC

0.1 TTL load

15 µA typ, “active”

pull-down to gnd

-15 µA typ, “active”

pull-up to internal

logic supply

TEMPEATURE RANGES

Operating Case

-3XX and -8XX

-5XX and -2XX

-1XX and -4XX

Storage

Users are cautioned against using a large value resistor to

modify the gain, as the temperature coefficient of the exter-

nal resistor will not be matched with the TCR of the internal

resistor. The internal gain resistors have an accuracy of 0.05%.

FIGURE 3 illustrates the output phasing between the reference

voltage Vin and the analog output signals as a function of the

digital angle and the converter gain K (0.5, 1.0, or 2.0).

DATA TRANSFER FROM AN 8-BIT DATA BUS

Applications with a 8-bit data bus require two-byte loading of the

digital input (see FIGURE 4).

FIGURE 5 shows the timing for two-byte data transfers.

DIGITAL INTERFACE

The DS-11802 has double-buffered input registers which allow

easy implementation of an interface with 8-bit or 16-bit data

buses. The DS-11802 can also be set up f or asynchronous data

inputs. If the LBE, HBE and LDC input pins are left open, the

internal pull-up circuitry will set these pins to a high state and the

information at the data inputs (B1-B16) is continuously conver t-

ed to sinθand cosθat the analog outputs. For applications

requiring less than 16-bit resolution, the unused data bit pins can

be left open.The data bits (B1-B16) are internally pulled-down to

apply a logic “0” to unconnected data inputs.

90 180 270 360 θ (DEGREES)

In Phase with V

SIN θ

COS θ

- V

MAX

+ V

MAX

SIN OUTPUT = K • Vin •(1+n) SINθ

COS OUTPUT = K • Vin •(1+n) COSθ

WHERE:K IS THE GAIN OF THE CONVERTER.

n IS THE SCALE FACTOR VARIATION AS A

FUNCTION OF DIGITAL ANGLE(± 0.2%)

FIGURE 3. OUTPUT PHASING

LBE

HBE

LDC LOAD

CONVERTER

LOAD MSBs

LOAD LSBs

DS-11802

(MSB)

(LSB)

HBE

LBE

DATA BUS 19

21K

2.33K

2.92K

8.75K

INTERNAL

REFERENCE

GC2

GC1

VIN

TP1

FIGURE 2. REFERENCE CONDITIONER FIGURE 4. DATA TRANSFER FROM 8-BIT BUS

PULSE

WIDTH

800 ns

MIN

PULSE

WIDTH

600ns

MIN

DATA TRANSFERRED TO

HOLDING REGISTERS

8 MSBs TRANSFERRED

TO INPUT REGISTERS

DATA

CHANGING DATA

STEADY

(LSBs)

DATA SET UP

DATA HOLD

200ns

MIN

(MSBs)

8 LSBs TRANSFERRED

TO INPUT REGISTERS

DATA

LBE

LDC

HBE

Data Hold

200 ns

MIN

PULSE

WIDTH

800 ns

MIN

FIGURE 5. TIMING FOR 8-BIT BUS TRANSFER

DIGITAL-TO-RESOLVER/SYNCHRO CONVERTERS

The output of the DS-11802 is a single-ended sin/cos.

FIGURE 8 illustrates a schematic for a 4-Wire Digital-to-Resolv er

Conver ter (S1, S2, S3, and S4) using external power amplifiers

and transformers.

FIGURE 9 illustrates a schematic for 3-Wire Digital-to-Synchro

Converter (S1, S2, and S3) using an additional power stage and

external transformers.

A benefit to the designs shown in FIGURES 8 and 9 is the abili-

ty to keep the converters near the digital data and control sig-

nals, and to mount the power amplifiers and transformers in a

better thermal location. This would isolate heat dissipating cir-

cuits from high-accuracy computing circuits.

1.The LDC is low (logic 0) so that the contents of the holding reg-

ister are latched and will remain unaffected by the changes on

the input registers.

2. When the LBE is set high (logic 1) the 8 LSBs (B9-B16) are

transferred to the low byte. The LBE must remain high for a min-

imum of 800 nsec after the data is stable. The data should

remain stable for 200 nsec after the LBE is set low (logic 0).

3. When the HBE is set high (logic 1) the 8 MSBs (B1-B8) are

transf erred to the lo w b yte. The HBE m ust remain high f or a min-

imum of 800 nsec after the data is stable. The data should

remain stable for 200 nsec after the HBE is set low (logic 0).

4.When the LDC is set high (logic 1) the data is transferred from

the two input registers to the holding register. The LDC should

be held high for 600 nsec minimum. Once the LDC is set low,

the cycle can begin again.

Note: LBE, HBE, and LDC are level-actuated functions. Refer to

TABLE 3 for bit values.

B13

B12

B11

B10

B14

B15

B16 (LSB)

(MSB) 1

DS-11802

LBE

HBE

LDC LOAD

CONVERTER

NOT CONNECTED

OR LOAD DATA PULSE

FIGURE 6. DATA TRANSFER FROM 16-BIT BUS

600 ns

MIN

DATA TRANSFERRED TO

HOLDING REGISTERS

DATA

CHANGING DATA

STEADY

ALL 16 BITS

DATA TRANSFERRED

TO INPUT REGISTERS

DATA

HBE LBE

LDC

200 ns

MIN 200 ns

MIN

800 ns

MIN

FIGURE 7. TIMING FOR 16-BIT BUS TRANSFER

Note: HBE enables the MSBs and LBE enables the LSBs.

10800.0

5400.0

2700.0

1350.0

675.0

337.5

168.75

84.38

42.19

21.09

10.55

5.27

2.64

1.32

0.66

0.33

180.0

90.0

45.0

22.5

11.25

5.625

2.813

1.406

0.7031

0.3516

0.1758

0.0879

0.0439

0.0220

0.0110

0.0055

1 MSB

MIN/BITDEG/BITBIT

TABLE 3. DIGITAL ANGLE INPUTS

DATA TRANSFER FROM A 16-BIT DATA BUS

Applications interf acing with a 16-bit data bus require only single

byte loading (see FIGURE 6). LBE and HBE are either uncon-

nected or tied together and pulsed high to load data.

As shown in the timing diagram (see FIGURE 7) 200 nsec after

the data has been stable, the LDC is set high (logic 1) to trans-

fer the data to the holding register. Since LDC is level actuated,

it must remain high for the time specified (600 nsec).

LOW FREQUENCY SINE WAVE OSCILLATOR

The DS-11802 can be used to create a low frequency sine wave

oscillator with very low distor tion (see FIGURE 10). The output

amplitude is determined by the amplitude of the dc reference

input and the gain control pin configuration. When using a 16-bit

counter and a square wave of 65,536 Hz (2N, where N = 16 bit

resolution) the output will be at 1 Hz.

REFERENCE

INPUT

DIGITAL

INPUT

DS-11802

16-BIT

COUNTER

DC REFERENCE

(Vref)

SQUARE WAVE

OSCILLATOR

K · Vref · SIN θ

SINE WAVE OUTPUT

K · Vref · COS θ

QUADRATURE OUTPUT

FIGURE 10. LO W FREQUENCY SINEWAVE OSCILLATOR

DS-11802

SIN θ

COS θ

1:N S1

P.A.

P.A. 1: √ 3

2 N

RH1:n VIN

DIGITAL

ANGLE

INTERFACE

CONTROLS

RH1:n VIN

DIGITAL

ANGLE

INTERFACE

CONTROLS

DS-11802

SIN θ

COS θ

1:N

P.A.

FIGURE 9. 3-WIRE DIGITAL-TO-SYNCHR O CONVER TER

FIGURE 8. 4-WIRE DIGITAL-TO-RESOLVER CONVERTER

POWER SUPPLY DECOUPLING

Decoupling capacitors are recommended on the +Vs and -Vs.

supplies. A 1 µF tantalum capacitor in parallel with a 0.01 µF

ceramic capacitor should be mounted as close to the supply as

possible.

FIGURE 11. DS-11802 MECHANICAL OUTLINE

TABLE 4. DS-11802 PINOUTS

PIN FUNCTION PIN FUNCTION

1B1 15 B13

2B2 16 B14

3B3 17 B15

4B4 18 B16

5B5 19 LDC

6B6 20 VIN

7B7 21 COS θ

8B8 22 TP1

9 HBE 23 GC1

10 LBE 24 GC2

11 B9 25 GND

12 B10 26 -Vs

13 B11 27 +Vs

14 B12 28 SIN θ

1.400

(35.56)

± .015 .18

(4.57)

.594

(15.1) .600

(15.2)

.010

(.254)

.050 TYP

(1.25)

.150 MIN

(3.81)

.050

(1.27)

± .015

.100

(2.54)

± .002

.020

(.51)

± .002

PIN #1 I.D. ± .002

TOLERANCES

.XX = ± .02 (± .50)

.XXX = ± .005 (± .25)

NOTES:

1. CASE IS ELECTRICALLY FLOATING

2. PINS ARE ALLOY 42 WITH GOLD PLATED

60µ INCH MIN OVER 100µ INCH NICKEL

3. CASE & LID ARE 91% PURE ALUMINA CERAMIC

4. DIMENSIONS SHOWN IN INCHES AND (MM).

114

TOP VIEW

SIDE VIEW

ORDERING INFORMATION

DS-11802DX-XXXX

Supplemental Process Requirements:

S = Pre-Cap Source Inspection

L = Pull Test

Q = Pull Test and Pre-Cap Inspection

K = One Lot Date Code

W = One Lot Date Code and PreCap Source

Y = One Lot Date Code and 100% Pull Test

Z = One Lot Date Code, PreCap Source and 100% Pull Test

Blank = None of the Above

Accuracy:

3 = ±4 Minutes

4 = ±2 Minutes

5 = ±1 Minute

Process Requirements*:

0 = Standard DDC Processing, no Burn-In (See table below.)

2 = B*

6 = B* with PIND Testing

7 = B* with Solder Dip

8 = B* with PIND Testing and Solder Dip

9 = Standard DDC Processing with Solder Dip, no Burn-In (See table below.)

Temperature Grade/Data Requirements:

1 = -55°C to +125°C

2 = -40°C to +85°C

3 = 0°C to +70°C

4 = -55°C to +125°C with Var iables Test Data

5 = -40°C to +85°C with Var iables Test Data

8 = 0°C to +70°C with Var iables Test Data

Frequency Range:

4 = DC to 1 kHz

* For availability of Fully Compliant MIL-PRF-38534 parts, please contact the DDC office nearest you.

**Standard DDC Processing with burn-in and full temperature test — see table below.

—1015, Table 1BURN-IN

A2001CONSTANT ACCELERATION

C1010TEMPERATURE CYCLE

A and C1014SEAL

—2009, 2010, 2017, and 2032INSPECTION

CONDITION(S)METHOD(S)

TEST MIL-STD-883

STANDARD DDC PROCESSING

The information in this data sheet is believed to be accurate; however, no responsibility is

assumed by Data Device Corporation for its use, and no license or rights are

granted by implication or otherwise in connection therewith.

Specifications are subject to change without notice.

A-03/98-1M PRINTED IN THE U.S.A.

ILC DATA DEVICE CORPORATION

REGISTERED TO ISO 9001

FILE NO. A5976

105 Wilbur Place, Bohemia, New York 11716-2482

For Technical Suppor t - 1-800-DDC-5757 ext. 7389 or 7413

Headquarters - Tel: (631) 567-5600 ext.7389 or 7413, Fax: (631) 567-7358

Southeast - Tel: (703) 450-7900, Fax: (703) 450-6610

West Coast - Tel: (714) 895-9777, Fax: (714) 895-4988

Europe - Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264

Asia/Pacific - Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689

W orld Wide W eb - http://www.ddc-web.com