200n
400n
600n
800n
1000n
1200n
-40 -25 -10 5 20 35 50 65 80 95 110 125
Propagation Delay (s)
Temperature (C)
18 V Low-to-High
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
C020
VOD = 100 mV
VPULLUP
t
t
RPULLUP
VTH-
VTH+
VIN
VTH-
VTH+ VOUT
+
_
VS
½
TLV1702
+
_
VS
½
TLV1702
VIN
VOUT
VPULLUP
GND
GND
Product
Folder
Sample &
Buy
Technical
Documents
Tools &
Software
Support &
Community
Reference
Design
TLV1701
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,
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TLV170x 2.2-V to 36-V, microPower Comparator
1 Features 3 Description
The TLV170x family of devices offers a wide supply
1• Supply Range: range, rail-to-rail inputs, low quiescent current, and
+2.2 V to +36 V or ±1.1 V to ±18 V low propagation delay. All these features come in
• Low Quiescent Current: industry-standard, extremely-small packages, making
55 µA per Comparator these devices the best general-purpose comparators
available.
• Input Common-Mode Range Includes Both Rails
• Low Propagation Delay: 560 ns The open collector output offers the advantage of
allowing the output to be pulled to any voltage rail up
• Low Input Offset Voltage: 300 µV to +36 V above the negative power supply,
• Open Collector Outputs: regardless of the TLV170x supply voltage.
– Up to 36 V Above Negative Supply Regardless These devices are available in single (TLV1701), dual
of Supply Voltage (TLV1702), and quad (TLV1704) channel versions.
• Industrial Temperature Range: Low input offset voltage, low input bias currents, low
–40°C to +125°C supply current, and open-collector configuration make
• Small Packages: the TLV170x family flexible enough to handle almost
any application, from simple voltage detection to
– Single: SC70-5, SOT-23-5, SOT553-5 driving a single relay.
– Dual: VSSOP-8, X2QFN-8 All devices are specified for operation across the
– Quad: TSSOP-14 expanded industrial temperature range of –40°C to
+125°C.
2 Applications
• Overvoltage and Undervoltage Detectors Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
• Window Comparators SOT553 (5) 1.20 mm × 1.60 mm
• Overcurrent Detectors TLV1701 SC-70 (5) 1.25 mm × 2.00 mm
• Zero-Crossing Detectors SOT-23 (5) 1.60 mm × 2.90 mm
• System Monitoring for: X2QFN (8) 1.50 mm × 1.50 mm
– Power Supplies TLV1702 VSSOP (8)(2) 3.00 mm × 3.00 mm
– White Goods TLV1704 TSSOP (14) 4.40 mm × 5.00 mm
– Industrial Sensors (1) For all available packages, see the package option addendum
– Automotive at the end of the datasheet.
– Medical (2) The VSSOP package is the same as the MSOP package.
TLV1702 as a Window Comparator Stable Propagation Delay vs Temperature
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TLV1701
,
TLV1702
,
TLV1704
SBOS589D –DECEMBER 2013–REVISED JUNE 2015
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Table of Contents
8.3 Feature Description................................................. 12
1 Features.................................................................. 18.4 Device Functional Modes........................................ 12
2 Applications ........................................................... 19 Applications and Implementation ...................... 13
3 Description............................................................. 19.1 Application Information............................................ 13
4 Revision History..................................................... 29.2 Typical Application ................................................. 13
5 Device Comparison ............................................... 410 Power Supply Recommendations ..................... 14
6 Pin Configuration and Functions......................... 511 Layout................................................................... 15
7 Specifications......................................................... 611.1 Layout Guidelines ................................................. 15
7.1 Absolute Maximum Ratings ...................................... 611.2 Layout Example .................................................... 15
7.2 ESD Ratings.............................................................. 612 Device and Documentation Support................. 16
7.3 Recommended Operating Conditions....................... 612.1 Documentation Support ........................................ 16
7.4 Thermal Information: TLV1701................................. 612.2 Related Links ........................................................ 16
7.5 Thermal Information: TLV1702 and TLV1704........... 712.3 Community Resources.......................................... 16
7.6 Electrical Characteristics........................................... 712.4 Trademarks........................................................... 16
7.7 Switching Characteristics.......................................... 712.5 Electrostatic Discharge Caution............................ 16
7.8 Typical Characteristics.............................................. 812.6 Glossary................................................................ 16
8 Detailed Description............................................ 11 13 Mechanical, Packaging, and Orderable
8.1 Overview................................................................. 11 Information ........................................................... 16
8.2 Functional Block Diagram....................................... 11
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (December 2014) to Revision D Page
• Changed document status to Production Data from Mixed Status ........................................................................................ 1
• Changed status of TLV1702 RUG package to Production Data............................................................................................ 1
Changes from Revision B (October 2014) to Revision C Page
• Changed TLV1701 DCK package from preview to production data ...................................................................................... 1
• Changed Handling Ratings table to ESD Ratings table, and moved storage temperature to Absolute Maximum
Ratings table........................................................................................................................................................................... 6
Changes from Revision A (September 2014) to Revision B Page
• Changed footnote 2 in Device Information table: added TLV1701 to list of available devices.............................................. 1
• Added TLV1701 to list of production data packages in footnote for the Pin Configuration and Functions section .............. 5
• Added TLV1701 row to V(ESD) parameter in Handling Ratings table...................................................................................... 6
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Changes from Original (December 2013) to Revision A Page
• Changed document format to latest data sheet standards; added new sections and moved existing sections.................... 1
• Changed TLV1704 PW (TSSOP-14) package from preview to production data ................................................................... 1
• Added sub-bullet to the Open Collector Outputs feature ....................................................................................................... 1
• Added second paragraph to the Description section.............................................................................................................. 1
• Deleted package information from Description section; redundant information..................................................................... 1
• Changed Related Products table to Device Comparison table, moved from page 1, and added TLV370x family................ 4
• Added TLV1701, TLV1702 RUG, and TLV704 package drawings........................................................................................ 5
• Added thermal information for TLV1702 RUG, TLV1704 PW, and all TLV1701 packages................................................... 6
• Moved switching characteristics parameters from Electrical Characteristics table to new Switching Characteristics table.. 7
• Changed all typical values in Switching Characteristics table................................................................................................ 7
• Changed title for Figure 1....................................................................................................................................................... 8
• Changed Figure 8................................................................................................................................................................... 8
• Changed Figure 9 .................................................................................................................................................................. 8
• Changed Figure 10................................................................................................................................................................. 8
• Changed Figure 11................................................................................................................................................................. 8
• Changed Figure 12................................................................................................................................................................. 8
• Changed Figure 13................................................................................................................................................................. 9
• Changed Figure 14................................................................................................................................................................. 9
• Changed Application Information and moved section ......................................................................................................... 13
• Deleted Application Examples section ................................................................................................................................. 13
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5 Device Comparison
DEVICE FEATURES
TLV3201 40-ns, 40-µA, push-pull comparator
TLV3202
TLV3501 4.5-ns, rail-to-rail, push-pull, high-speed comparator
TLV3502
TLV3401
TLV3402 Nanopower open-drain output comparator
TLV3404
TLV3701
TLV3702 Nanopower push-pull output comparator
TLV3704
REF3325
REF3330 3.9-µA, SC70-3 voltage reference
REF3333
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1
2
3
4
5
6
7
1IN±
1IN+
2IN±
2IN+
V+
1OUT
2OUT
4IN±
3IN+
3IN±
V-
4OUT
3OUT
4IN+
14
13
12
11
10
9
8
1
2
3
4
8
7
6
5
V+
2OUT
2IN±
2IN+
1OUT
1IN±
1IN+
V-
2OUT
2IN±
2IN+
6
5
1OUT
1IN±
1IN+
1
2
3
87
V+
V-
4
1
2
3
5
4
V+
OUT
IN+
V-
IN±
TLV1701
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,
TLV1704
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6 Pin Configuration and Functions
TLV1701 TLV1702
DBV (SOT-23-5), DCK (SC70-5), DRL (SOT553-5) Packages RUG (X2QFN-8) Package
Top View Top View
TLV1702
DGK (VSSOP-8) Package
Top View TLV1704
PW (TSSOP-14) Package
Top View
Pin Functions
PIN
NO.
TLV1701 TLV1702 TLV1704
NAME DBV, DCK, DRL DGK, RUG PW I/O DESCRIPTION
IN+ 1 — — I Noninverting input
1IN+ — 3 5 I Noninverting input, channel 1
2IN+ — 5 7 I Noninverting input, channel 2
3IN+ — — 9 I Noninverting input, channel 3
4IN+ — — 11 I Noninverting input, channel 4
IN– 3 — — I Inverting input
1IN– — 2 4 I Inverting input, channel 1
2IN– — 6 6 I Inverting input, channel 2
3IN– — — 8 I Inverting input, channel 3
4IN– — — 10 I Inverting input, channel 4
OUT 4 — — O Output
1OUT — 1 2 O Output, channel 1
2OUT — 7 1 O Output, channel 2
3OUT — — 14 O Output, channel 3
4OUT — — 13 O Output, channel 4
V+ 5 8 3 — Positive (highest) power supply
V– 2 4 12 — Negative (lowest) power supply
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7 Specifications
7.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT
Supply voltage +40 (±20) V
Voltage(2) (VS–) – 0.5 (VS+) + 0.5 V
Signal input pins Current(2) ±10 mA
Output short-circuit(3) Continuous mA
Operating temperature range –55 +150 °C
Junction temperature, TJ150 °C
Storage temperature, Tstg –65 +150 °C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be
current limited to 10 mA or less.
(3) Short-circuit to ground; one comparator per package.
7.2 ESD Ratings VALUE UNIT
TLV1701 and TLV1702 Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
TLV1704 Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1000
V(ESD) Electrostatic discharge V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) MIN NOM MAX UNIT
Supply voltage VS= (VS+) – (VS–) 2.2 (±1.1) 36 (±18) V
Specified temperature –40 125 °C
7.4 Thermal Information: TLV1701 TLV1701
THERMAL METRIC(1) DRL (SOT553) DCK (SC70) DBV (SOT23) UNIT
5 PINS 5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 271.5 283.6 233.1 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 115.6 94.1 156.4 °C/W
RθJB Junction-to-board thermal resistance 89.7 61.3 60.6 °C/W
ψJT Junction-to-top characterization parameter 17.6 1.9 35.7 °C/W
ψJB Junction-to-board characterization parameter 89.2 60.5 59.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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7.5 Thermal Information: TLV1702 and TLV1704 TLV1702 TLV1704
THERMAL METRIC(1) RUG (QFN) DGK (VSSOP) PW (TSSOP) UNIT
8 PINS 8 PINS 14 PINS
θJA Junction-to-ambient thermal resistance 205.6 199 128.1 °C/W
θJCtop Junction-to-case (top) thermal resistance 77.1 89.5 56.5 °C/W
θJB Junction-to-board thermal resistance 107.0 120.4 69.9 °C/W
ψJT Junction-to-top characterization parameter 2.0 22.0 9.1 °C/W
ψJB Junction-to-board characterization parameter 107.0 118.7 69.3 °C/W
θJCbot Junction-to-case (bottom) thermal resistance N/A N/A N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
7.6 Electrical Characteristics
at TA= +25°C, VS= +2.2 V to +36 V, CL= 15 pF, RPULLUP = 5.1 kΩ, VCM = VS/ 2, and VS= VPULLUP (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
TA= 25°C, VS= 2.2 V ±0.5 ±3.5 mV
VOS Input offset voltage TA= 25°C, VS= 36 V ±0.3 ±2.5 mV
TA= –40°C to +125°C ±5.5 mV
dVOS/dT Input offset voltage drift TA= –40°C to +125°C ±4 ±20 μV/°C
15 100 μV/V
PSRR Power-supply rejection ratio TA= –40°C to +125°C 20 μV/V
INPUT VOLTAGE RANGE
VCM Common-mode voltage range TA= –40°C to +125°C (V–) (V+) V
INPUT BIAS CURRENT
5 15 nA
IBInput bias current TA= –40°C to +125°C 20 nA
IOS Input offset current 0.5 nA
CLOAD Capacitive load drive See Typical Characteristics
OUTPUT
IO≤4 mA, input overdrive = 100 mV, 900 mV
VS= 36 V
VOVoltage output swing from rail IO= 0 mA, input overdrive = 100 mV, 600 mV
VS= 36 V
ISC Short circuit sink current 20 mA
Output leakage current VIN+ > VIN– 70 nA
POWER SUPPLY
VSSpecified voltage range 2.2 36 V
IO= 0 A 55 75 μA
IQQuiescent current (per channel) IO= 0 A, TA= –40°C to +125°C 100 μA
7.7 Switching Characteristics
at TA= +25°C, VS= +2.2 V to +36 V, CL= 15 pF, RPULLUP = 5.1 kΩ, VCM = VS/ 2, and VS= VPULLUP (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tpHL Propagation delay time, high-to-low Input overdrive = 100 mV 460 ns
tpLH Propagation delay time, low-to-high Input overdrive = 100 mV 560 ns
tRRise time Input overdrive = 100 mV 365 ns
tFFall time Input overdrive = 100 mV 240 ns
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±3
±2
±1
0
1
2
3
0 6 12 18 24 30 36
Offset Voltage (mV)
Common-Mode Voltage (V)
C027
VS = ±18 V
14 Typical Units Shown
±3
±2
±1
0
1
2
3
0 0.5 1 1.5 2
Offset Voltage (mV)
Common-Mode Voltage (V)
C028
VS = 2.2 V
13 Typical Units Shown
0
0.25
0.5
0.75
1
±50 ±25 0 25 50 75 100 125
Input Offset Current (nA)
Temperature (C)
C007
VS = ±18 V
VS = 2.2 V
±18
±16
±14
±12
±10
±8
±6
±4
±2
0
0 5 10 15 20
Output Voltage (V)
Output Current (mA)
C011
VS = ±1.1 V
VS = ±18 V
35
40
45
50
55
60
65
70
75
±40 ±25 ±10 5 20 35 50 65 80 95 110 125
Quiescent Current (A)
Temperature (C)
C028
VS = 2.2 V
VS = ±18 V
0
2
4
6
±50 ±25 0 25 50 75 100 125
Input Bias Current (nA)
Temperature (C)
Ibn
Ibp
C007
VS = ±18 V
VS = 2.2 V
TLV1701
,
TLV1702
,
TLV1704
SBOS589D –DECEMBER 2013–REVISED JUNE 2015
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7.8 Typical Characteristics
at TA= +25°C, VS= +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
Figure 1. Quiescent Current vs Temperature Figure 2. Input Bias Current vs Temperature
Figure 3. Input Offset Current vs Temperature Figure 4. Output Voltage vs Output Current
Figure 5. Offset Voltage vs Common-Mode Voltage Figure 6. Offset Voltage vs Common-Mode Voltage
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Output Voltage (10 V/div)
Input Voltage (50 mV/div)
Time (150 ns/div)
C021
Output Voltage
Input Voltage
VS = 36 V, Overdrive = 100 mV
tPLH = 440 ns
Output Voltage (10 V/div)
Input Voltage (50 mV/div)
Time (150 ns/div)
C021
Output Voltage
Input Voltage
VS = 36 V, Overdrive = 100 mV
tPLH = 400 ns
20p 200p 2n
Propagation Delay (s)
Output Capacitive Load (F)
2.2 V Supply
18 V Supply
C020
tPLH
tPHL
200n
400n
600n
800n
1000n
1200n
-40 -25 -10 5 20 35 50 65 80 95 110 125
Propagation Delay (s)
Temperature (C)
18 V Low-to-High
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
C020
VOD = 100 mV
±3
±2
±1
0
1
2
3
0 6 12 18 24 30 36
Offset Voltage (mV)
Supply Voltage (V)
C028
16 Typical Units Shown
200n
400n
600n
800n
1000n
0 200 400 600 800 1000
Propagation Delay (s)
Input Overdrive (mV)
18 V Low-to-High
18 V High-to-Low
2.2 V Low-to-High
2.2 V High-to-Low
C020
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Typical Characteristics (continued)
at TA= +25°C, VS= +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
Figure 7. Offset Voltage vs Supply Voltage Figure 8. Propagation Delay vs Input Overdrive
Figure 9. Propagation Delay vs Capacitive Load Figure 10. Propagation Delay vs Temperature
Figure 11. Propagation Delay (TpLH) Figure 12. Propagation Delay (TpHL)
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0
5
10
15
20
25
30
0 6 12 18 24 30 36
Short Circuit Current (mA)
Supply Voltage (V)
C002
VS = 2.2 V
Sink Current
0
5
10
15
20
25
30
-2.5
-1.8
-1.6
-1.4
-1.2
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2.5
Percentage of Comparators (%)
Offset Voltage (mV)
C019
VS = ±18 V
Distribution Taken from 2524 Comparators
0
5
10
15
20
25
30
35
-3.5
-2.8
-2.4
-2
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
2
2.4
2.8
3.5
Percentage of Comparators (%)
Offset Voltage (mV)
C019
VS = 2.2 V
Distribution Taken from 2524 Comparators
Output Voltage (500 mV/div)
Input Voltage (50 mV/div)
Time (150 ns/div)
C021
Output Voltage
Input Voltage
VS = 2.2 V, Overdrive = 100 mV
tPLH = 560 ns
Output Voltage (500 mV/div)
Input Voltage (50 mV/div)
Time (150 ns/div)
C021
Output Voltage
Input Voltage
VS = 2.2 V, Overdrive = 100 mV
tPLH = 460 ns
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Typical Characteristics (continued)
at TA= +25°C, VS= +5 V, RPULLUP = 5.1 kΩ, and input overdrive = 100 mV (unless otherwise noted)
Figure 13. Propagation Delay (TpLH) Figure 14. Propagation Delay (TpHL)
Figure 15. Offset Voltage Production Distribution Figure 16. Offset Voltage Production Distribution
Figure 17. Short-Circuit Current vs Supply Voltage
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IN+
IN+
IN-
IN-
OUT
V+
V-
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SBOS589D –DECEMBER 2013–REVISED JUNE 2015
8 Detailed Description
8.1 Overview
The TLV170x comparators features rail-to-rail input and output on supply voltages as high as 36 V. The rail-to-
rail input stage enables detection of signals close to the supply and ground. The open collector configuration
allows the device to be used in wired-OR configurations, such as a window comparator. A low supply current of
55 μA per channel with small, space-saving packages, makes these comparators versatile for use in a wide
range of applications, from portable to industrial.
8.2 Functional Block Diagram
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VIN
+
_
VS+
TLV1701
VS-
REF3333
VS
RPULLUP
VOUT
VPULLUP
GND
Voltage (5 V/div)
Time (5 ms/div)
Output Voltage
Input Voltage
C030
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8.3 Feature Description
8.3.1 Comparator Inputs
The TLV170x are rail-to-rail input comparators, with an input common-mode range that includes the supply rails.
The TLV170x is designed to prevent phase inversion when the input pins exceed the supply voltage. Figure 18
shows the TLV170x response when input voltages exceed the supply, resulting in no phase inversion.
Figure 18. No Phase Inversion: Comparator Response to Input Voltage
(Propagation Delay Included)
8.4 Device Functional Modes
8.4.1 Setting Reference Voltage
Using a stable reference is important when setting the transition point for the TLV170x. The REF3333, as shown
in Figure 19, provides a 3.3-V reference voltage with low drift and only 3.9 μA of quiescent current.
Figure 19. Reference Voltage for the TLV170x
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+
Vin 5 V
5 V
Rh
576 k
Rx
100 k
Ry
100 k
Vout
-
++V
5 V
Rp
5 k
TLV1701
,
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,
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SBOS589D –DECEMBER 2013–REVISED JUNE 2015
9 Applications and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TLV170x can be used in a wide variety of applications, such as zero crossing detectors, window
comparators, over and undervoltage detectors, and high-side voltage sense circuits.
9.2 Typical Application
Comparators are used to differentiate between two different signal levels. For example, a comparator
differentiates between an overtemperature and normal-temperature condition. However, noise or signal variation
at the comparison threshold causes multiple transitions. This application example sets upper and lower
hysteresis thresholds to eliminate the multiple transitions caused by noise.
Figure 20. Comparator Schematic with Hysteresis
9.2.1 Design Requirements
The design requirements are as follows:
• Supply voltage: 5 V
• Input: 0 V to 5 V
• Lower threshold (VL) = 2.3 V ±0.1 V
• Upper threshold (VH) = 2.7 V ±0.1 V
• VH – VL = 2.4 V ±0.1 V
• Low power consumption
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TLV1701
,
TLV1702
,
TLV1704
SBOS589D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com
Typical Application (continued)
9.2.2 Detailed Design Procedure
Make a small change to the comparator circuit to add hysteresis. Hysteresis uses two different threshold voltages
to avoid the multiple transitions introduced in the previous circuit. The input signal must exceed the upper
threshold (VH) to transition low, or below the lower threshold (VL) to transition high.
Figure 20 illustrates hysteresis on a comparator. Resistor Rh sets the hysteresis level. An open-collector output
stage requires a pullup resistor (Rp). The pullup resistor creates a voltage divider at the comparator output that
introduces an error when the output is at logic high. This error can be minimized if Rh > 100Rp.
When the output is at a logic high (5 V), Rh is in parallel with Rx (ignoring Rp). This configuration drives more
current into Ry, and raises the threshold voltage (VH) to 2.7 V. The input signal must drive above VH = 2.7 V to
cause the output to transition to logic low (0 V).
When the output is at logic low (0 V), Rh is in parallel with Ry. This configuration reduces the current into Ry, and
reduces the threshold voltage to 2.3 V. The input signal must drive below VL = 2.3 V to cause the output to
transition to logic high (5 V).
For more details on this design and other alternative devices that can be used in place of the TLV1702, refer to
Precision Design TIPD144,Comparator with Hysteresis Reference Design.
9.2.3 Application Curve
Figure 21 shows the upper and lower thresholds for hysteresis. The upper threshold is 2.76 V and the lower
threshold is 2.34 V, both of which are close to the design target.
Figure 21. TLV1701 Upper and Lower Threshold with Hysteresis
10 Power Supply Recommendations
The TLV170x is specified for operation from 2.2 V to 36 V (±1.1 to ±18 V); many specifications apply from –40°C
to +125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are
presented in the Typical Characteristics section.
CAUTION
Supply voltages larger than 40 V can permanently damage the device; see the
Absolute Maximum Ratings.
Place 0.1-μF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-
impedance power supplies. For more detailed information on bypass capacitor placement; see the Layout
Guidelines section.
14 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: TLV1701 TLV1702 TLV1704
IN+
IN-
V±
V+
OUT
VS+
GND
GND
Only needed for
dual-supply
operation
OUT
IN-
IN+
Run the input traces
as far away from
the supply lines
as possible Use low-ESR, ceramic
bypass capacitor
+
IN+ OUT
(Schematic Representation)
IN-
VS± or GND
V+
V-
TLV1701
,
TLV1702
,
TLV1704
www.ti.com
SBOS589D –DECEMBER 2013–REVISED JUNE 2015
11 Layout
11.1 Layout Guidelines
Comparators are very sensitive to input noise. For best results, maintain the following layout guidelines:
• Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. Proper grounding (use
of ground plane) helps maintain specified performance of the TLV170x.
• To minimize supply noise, place a decoupling capacitor (0.1-μF ceramic, surface-mount capacitor) as close
as possible to VSas shown in Figure 22.
• On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback
around the comparator. Keep inputs away from the output.
• Solder the device directly to the PCB rather than using a socket.
• For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less)
placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some
degradation to propagation delay when the impedance is low. Run the topside ground plane between the
output and inputs.
• Run the ground pin ground trace under the device up to the bypass capacitor, shielding the inputs from the
outputs.
11.2 Layout Example
Figure 22. Comparator Board Layout
Copyright © 2013–2015, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: TLV1701 TLV1702 TLV1704
TLV1701
,
TLV1702
,
TLV1704
SBOS589D –DECEMBER 2013–REVISED JUNE 2015
www.ti.com
12 Device and Documentation Support
12.1 Documentation Support
12.1.1 Related Documentation
TIDU020 —Precision Design, Comparator with Hysteresis Reference Design.
SBOS392 — REF3333 Data Sheet
12.2 Related Links
Table 1 lists quick access links. Categories include technical documents, support and community resources,
tools and software, and quick access to sample or buy.
Table 1. Related Links
TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY DOCUMENTS SOFTWARE COMMUNITY
TLV1701 Click here Click here Click here Click here Click here
TLV1702 Click here Click here Click here Click here Click here
TLV1704 Click here Click here Click here Click here Click here
12.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.4 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
12.6 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
16 Submit Documentation Feedback Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: TLV1701 TLV1702 TLV1704
PACKAGE OPTION ADDENDUM
www.ti.com 4-May-2017
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
TLV1701AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ZAYF
TLV1701AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 ZAYF
TLV1701AIDCKR ACTIVE SC70 DCK 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SIR
TLV1701AIDCKT ACTIVE SC70 DCK 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 SIR
TLV1701AIDRLR ACTIVE SOT-5X3 DRL 5 4000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIS
TLV1701AIDRLT ACTIVE SOT-5X3 DRL 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 SIS
TLV1702AIDGK ACTIVE VSSOP DGK 8 80 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 1702
TLV1702AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 125 1702
TLV1702AIRUGR ACTIVE X2QFN RUG 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAUAG | Call TI Level-1-260C-UNLIM -40 to 125 FC
TLV1704AIPW ACTIVE TSSOP PW 14 90 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 TL1704
TLV1704AIPWR ACTIVE TSSOP PW 14 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 TL1704
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
PACKAGE OPTION ADDENDUM
www.ti.com 4-May-2017
Addendum-Page 2
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV1702, TLV1704 :
•Automotive: TLV1702-Q1, TLV1704-Q1
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLV1701AIDBVR SOT-23 DBV 5 3000 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV1701AIDBVT SOT-23 DBV 5 250 178.0 9.0 3.23 3.17 1.37 4.0 8.0 Q3
TLV1701AIDCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
TLV1701AIDCKT SC70 DCK 5 250 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3
TLV1701AIDRLR SOT-5X3 DRL 5 4000 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3
TLV1701AIDRLT SOT-5X3 DRL 5 250 180.0 8.4 1.98 1.78 0.69 4.0 8.0 Q3
TLV1702AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
TLV1702AIRUGR X2QFN RUG 8 3000 180.0 8.4 1.6 1.6 0.66 4.0 8.0 Q2
TLV1704AIPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jan-2018
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLV1701AIDBVR SOT-23 DBV 5 3000 180.0 180.0 18.0
TLV1701AIDBVT SOT-23 DBV 5 250 180.0 180.0 18.0
TLV1701AIDCKR SC70 DCK 5 3000 190.0 190.0 30.0
TLV1701AIDCKT SC70 DCK 5 250 190.0 190.0 30.0
TLV1701AIDRLR SOT-5X3 DRL 5 4000 202.0 201.0 28.0
TLV1701AIDRLT SOT-5X3 DRL 5 250 202.0 201.0 28.0
TLV1702AIDGKR VSSOP DGK 8 2500 364.0 364.0 27.0
TLV1702AIRUGR X2QFN RUG 8 3000 202.0 201.0 28.0
TLV1704AIPWR TSSOP PW 14 2000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jan-2018
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
www.ti.com
PACKAGE OUTLINE
C
TYP
0.22
0.08
0.25
3.0
2.6
2X 0.95
1.9
1.45 MAX
TYP
0.15
0.00
5X 0.5
0.3
TYP
0.6
0.3
TYP
8
0
1.9
A
3.05
2.75
B
1.75
1.45
(1.1)
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Refernce JEDEC MO-178.
0.2 C A B
1
34
5
2
INDEX AREA
PIN 1
GAGE PLANE
SEATING PLANE
0.1 C
SCALE 4.000
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MAX
ARROUND 0.07 MIN
ARROUND
5X (1.1)
5X (0.6)
(2.6)
(1.9)
2X (0.95)
(R0.05) TYP
4214839/C 04/2017
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
PKG
1
34
5
2
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
EXPOSED METAL
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
EXPOSED METAL
www.ti.com
EXAMPLE STENCIL DESIGN
(2.6)
(1.9)
2X(0.95)
5X (1.1)
5X (0.6)
(R0.05) TYP
SOT-23 - 1.45 mm max heightDBV0005A
SMALL OUTLINE TRANSISTOR
4214839/C 04/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
SYMM
PKG
1
34
5
2
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