SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator Features Benefits * Extremely low RMS phase jitter (random) * <1 ps (typical) * Wide frequency range * 1 MHz to 220 MHz * 220 MHz to 800 MHz refer to SiT9107 * High frequency stability * 10 PPM, 15 PPM, 20 PPM * 25 PPM, 50 PPM * Operating voltage * 1.8, 2.5 or 3.3 V * Other voltages up to 3.63 V (contact SiTime) * Operating temperature range * Industrial, -40 to 85 C * Extended Commercial, -20 to 70 C * Commercial, 0 to 70 C * Small footprint * 5.0 x 3.2 x 0.75 mm * 7.0 x 5.0 x 0.90 mm * Pb-free and RoHS compliant * For Spread Spectrum see SiT9002 * Ultra-reliable start up and greater immunity from inter ference * * * * * Ultra fast lead time: 2 to 3 weeks No crystal or capacitors required Eliminates crystal qualification time 50% + board saving space More cost effective than quartz oscillators, quartz crystals and clock ICs. * Completely quartz-free Applications * * * * * * * * * * * Server Router RAID controller Gigabit Ethernet 10 Gigabit Ethernet Fiber Channel SATA / SAS PCI-Express Fully Buffered DIMM System clock Networking and computing Block Diagram Pinout OUT- OUT+ VDD MEMS Resonator Rev. 1.52 1 6 VDD NC 2 5 OUT- GND 3 4 OUT+ High Performance Phase Lock Loop ST/OE SiTime Corporation ST/OE GND 990 Almanor Avenue Sunnyvale, CA 94085 (408) 328-4400 www.sitime.com Revised June 23, 2010 SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator Pin Description Pin No. Name Pin Description 1 ST/OE Input 2 NC NA Do Not connect pin, leave it floating. 3 GND Power VDD power supply ground. Connect to Ground 4 OUT+ Output 1 to 220 MHz programmable clock output . 5 OUT- Output 6 VDD Power Standby or Output Enable pin for OUT+ and OUT-. OE: When High or Open : OUT+ and OUT- = active When Low : OUT+ and OUT- = High Impedance state ST: When High or Open : OUT+ and OUT- = active When Low : OUT+ and OUT- = Output is low (weak pull down), oscillation stops Power supply Absolute Maximum Ratings Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings. Absolute Maximum Table Min. Max. Unit Storage Temperature Parameter -65 150 C VDD -0.5 4 V Vin GND - 0.5 VDD + 0.5 V Theta JA ( with copper plane on VDD and GND) 5.0 x 3.2 package 7.0 x 5.0 package when center pad is soldered down 7.0 x 5.0 package when center pad is not soldered down - 68 C/W - 38 C/W - 90 C/W Theta JC (with PCB traces of 0.010 inch to all pins) 5.0 x 3.2 package 7.0 x 5.0 package when center pad is soldered down 7.0 x 5.0 package when center pad is not soldered down - 45 C/W - 35 C/W - 48 C/W Soldering Temperature (follow standard Pb free soldering guidelines) - 260 C Number of Program Writes - 1 NA Program Retention over -40 to 125C, Process, VDD (0 to 3.6V) - 1,000+ years Human Body Model (JESD22-A114) 2000 - - Charged Device Model (JESD22-C101) 750 - - Machine Model (JESD22-A115) 200 - - Environmental Compliance Parameter Mechanical Shock Condition/Test Method MIL-STD-883F, Method 2002 Mechanical Vibration MIL-STD-883F, Method 2007 Temperature Cycle MIL-STD-883F, Method 1010-65-150C (1000 cycle) Solderability MIL-STD-883F, Method 2003 Moisture Sensitivity Level MSL1 @ 260C Rev. 1.52 Page 2 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator DC Electrical Specifications LVCMOS input, OE or ST pin, 3.3V 10% or 2.5V 10% or 1.8V 5%, -40 to 85C Symbol Parameter Condition Min. Typ. Max. Unit VIH Input High Voltage 70 - - %Vdd VIL Input Low Voltage - - 30 %Vdd IIH Input High Current OE or ST pin - - 10 A IIL Input Low Current OE or ST pin -10 - - A Tpu Power Up Time Time from minimum power supply voltage to the first cycle (Guaranteed no runt pulses) - - 10 ms Min. Typ. Max. Unit LVPECL, 3.3V 10% or 2.5V 10%, -40 to 85C Symbol VDD IDD Parameter Condition Supply Voltage Supply Current VOH Output High Voltage VOL Output Low Voltage Vswing Pk-Pk Output Voltage Swing 2.97 3.3 3.63 V 2.25 2.5 2.75 V VDD = 3.3, Excluding Load Termination Current - 68 74 mA VDD = 2.5, Excluding Load Termination Current - 65 71 mA 50 Ohm termination to VDD - 2.0V See Figure 2, 3. VDD-1.1 - VDD-0.7 V VDD-2.0 - VDD-1.4 V 600 800 1000 mV Min. Typ. Max. Unit 2.97 3.3 3.63 V 2.25 2.5 2.75 V - 65 70 mA - 62 67 mA 600 - 950 mV HCSL, 3.3V 10% or 2.5V 10%, -40 to 85C Symbol Parameter VDD Supply Voltage IDD Supply Current VOH Output High Voltage VOL Output Low Voltage Vswing Pk-Pk Output Voltage Swing Condition VDD = 3.3, Excluding Load Termination Current VDD = 2.5, Excluding Load Termination Current 50 Ohm termination to GND See Figure 4. 0.0 - 50 mV 600 - 950 mV Min. Typ. Max. Unit LVDS, 3.3V 10% or 2.5V 10%, -40 to 85C Symbol VDD IDD VOD1 Parameter Supply Voltage Supply Current Differential Output Voltage VOD1 VOD Magnitude Change VOS1 Offset Voltage VOS1 VOS Magnitude Change VOD2 Differential Output Voltage VOD2 VOD Magnitude Change VOS2 Offset Voltage VOS2 VOS Magnitude Change VOD3 Differential Output Voltage VOD3 VOD Magnitude Change VOS3 Offset Voltage VOS3 Rev. 1.52 Condition 2.97 3.3 3.63 V 2.25 2.5 2.75 V VDD = 3.3, Excluding Load Termination Current - 73 79 mA VDD = 2.5, Excluding Load Termination Current - 70 76 mA 250 350 450 mV - - 50 mV - 1.2 - V - - 50 mV 500 700 900 mV - - 50 mV - 1.2 - V - - 50 mV 250 350 450 mV - - 50 mV - 1.2 - V - - 50 mV Swing Mode = Normal Single load termination. See Figure 5. Swing Mode = High Single load termination. See Figure 5. Swing Mode = High Double load termination. See Figure 6. VOS Magnitude Change Page 3 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator CML, 3.3V 10% or 2.5V 10% or 1.8V 5%, -40 to 85C Symbol VDD IDD Parameter Condition Min. Typ. Max. Unit 2.97 3.3 3.63 V 2.25 2.5 2.75 V 1.71 1.8 1.89 V - 48 51 mA - 47 50 mA - 38 41 mA Swing Mode = Normal Single Load Termination See Figure 7. VDD-0.1 - 300 Swing Mode = High Single Load Termination See Figure 7. VDD-0.1 Swing Mode = High Double Load Termination See Figure 8. Supply Voltage Supply Current VDD = 3.3V Excluding Load Termination Current VDD = 2.5V VDD = 1.8V VOH1 Output High Voltage VOL1 Output Low Voltage Vswing1 Pk-Pk Output Voltage Swing VOH2 Output High Voltage VOL2 Output Low Voltage Vswing2 Pk-Pk Output Voltage Swing VOH3 Output High Voltage VOL3 Output Low Voltage Vswing3 Pk-Pk Output Voltage Swing VDD V VDD-0.3 V 425 550 mV - VDD V VDD-1.1 VDD-0.85 VDD-0.6 V 600 850 1100 mV VDD-0.1 - VDD VDD-0.3 V VDD-0.55 VDD-0.425 VDD-0.55 VDD-0.425 V 300 425 550 mV Min. Typ. Max. Unit AC Electrical Specifications LVPECL, 3.3V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change 1.0 - 220 MHz 0 to 70C -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging DC Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz PJ Rev. 1.52 RMS Period Jitter First year @ 25C - - 1 PPM 45 - 55 % 100 150 300 ps - 1.6 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.5 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.7 - ps Fout = 106.25 MHz - 1.8 2.3 ps Fout = 156.25 MHz - 1.3 1.8 ps Fout = 200 MHz - 1.3 1.8 ps Page 4 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator LVPECL, 2.5V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change Min. Unit 1.0 - 220 MHz -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz RMS Period Jitter Max. 0 to 70C DC PJ Typ. First year @ 25C - - 1 PPM 45 - 55 % 100 150 300 ps - 1.6 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.5 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.7 - ps Fout = 106.25 MHz - 1.8 2.3 ps Fout = 156.25 MHz - 1.3 1.8 ps Fout = 200 MHz - 1.3 1.8 ps Min. Typ. Max. HCSL, 3.3V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change 1.0 - 220 MHz 0 to 70C -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging DC Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 100 MHz @ BW: 1.5 MHz to 22 MHz PJ RMS Period Jitter Rev. 1.52 Unit First year @ 25C - - 1 PPM 45 - 55 % 200 280 375 ps - 0.8 - ps Fout = 200 MHz @ BW: 1.5 MHz to 22 MHz - 0.4 - ps Fout = 100 MHz - 1.6 2.2 ps Fout = 200 MHz - 1.5 1.9 ps Page 5 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator HCSL, 2.5V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change Max. Unit 1.0 - 220 MHz -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 100 MHz @ BW: 1.5 MHz to 22 MHz RMS Period Jitter Typ. 0 to 70C DC PJ Min. First year @ 25C - - 1 PPM 45 - 55 % 200 300 400 ps - 0.8 - ps Fout = 200 MHz @ BW: 1.5 MHz to 22 MHz - 0.4 - ps Fout = 100 MHz - 1.6 2.2 ps Fout = 200 MHz - 1.5 2.1 ps Min. Typ. Max. Unit LVDS, 3.3V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change 10 - 220 MHz 0 to 70C -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM PPM Fage Aging DC Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz PJ Rev. 1.52 RMS Period Jitter First year @ 25C - - 1 45 - 55 % 100 200 325 ps - 1.7 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.7 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.7 - ps Fout = 106.25 MHz - 2.0 2.7 ps Fout = 156.25 MHz - 1.8 2.5 ps Fout = 200 MHz - 1.8 2.5 ps Page 6 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator LVDS, 2.5V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change Min. Unit 1.0 - 220 MHz -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz RMS Period Jitter Max. 0 to 70C DC PJ Typ. First year @ 25C - - 1 PPM 45 - 55 % 100 260 325 ps - 1.7 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.7 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.7 - ps Fout = 106.25 MHz - 2.5 3.3 ps Fout = 156.25 MHz - 2.4 3.5 ps Fout = 200 MHz - 2.4 3.5 ps Min. Typ. Max. Unit CML, 3.3V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change 1.0 - 220 MHz 0 to 70C -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging DC Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz PJ Rev. 1.52 RMS Period Jitter First year @ 25C - - 1 PPM 45 - 55 % 150 220 300 ps - 1.6 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.6 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.8 - ps Fout = 106.25 MHz - 2 2.5 ps Fout = 156.25 MHz - 1.9 2.5 ps Fout = 200 MHz - 1.9 2.4 ps Page 7 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator CML, 2.5V 10%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Min. Inclusive of initial stability, operating temp., rated power supply voltage change, load change Unit 1.0 - 220 MHz -10 - +10 PPM -20 to 70C -40 to 85C -15 - +15 PPM -20 - +20 PPM -25 +25 PPM -50 +50 PPM Fage Aging Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz RMS Period Jitter Max. 0 to 70C DC PJ Typ. First year @ 25C - - 1 PPM 45 - 55 % 150 230 300 ps - 1.6 - ps Fout = 156.25 MHz @ BW: 1.875 to 20 MHz - 0.6 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.8 - ps Fout = 106.25 MHz - 2.1 2.5 ps Fout = 156.25 MHz - 1.9 2.5 ps Fout = 200 MHz - 1.9 2.5 ps Min. Typ. Max. Unit CML, 1.8V 5%, -40 to 85C Symbol Parameter Fout Output Frequency Fstab Frequency Stability Condition Inclusive of initial stability, operating temp., rated power supply voltage change, load change 1.0 - 220 MHz 0 to 70C -15 - +15 PPM -20 to 70C -40 to 85C -20 - Fage Aging DC Duty Cycle tR/tF Output Rise/Fall Time 20% to 80% PHJ RMS Phase Jitter (random) Fout = 106.25 MHz @ BW: 637 kHz to10 MHz PJ Rev. 1.52 RMS Period Jitter First year @ 25C +20 PPM -25 +25 PPM -50 +50 PPM - - 1 PPM 45 - 55 % 150 240 325 ps - 1.7 - ps Fout = 156.25 MHz @ BW: 1.87 to 20 MHz - 0.6 - ps Fout = 200 MHz @ BW: 1 to 20 MHz - 0.8 - ps Fout = 106.25 MHz - 2.3 2.9 ps Fout = 156.25 MHz - 2.1 2.7 ps Fout = 200 MHz - 2.1 2.7 ps Page 8 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator Termination Diagrams SiT9102, LVPECL-0 100 nF OUT+ Z0 = 50 Ohm D+ VDD = 3.3V R1 = 150 Ohm Receiver Device Drive Device VDD = 2.5V 100 nF R1 = 120 Ohm Z0 = 50 Ohm OUTR1 R1 D50 Ohm 50 Ohm VTT Figure 1. LVPECL AC Coupled Typical Termination SiT9102, LVPECL-1 O UT+ Z0 = 50O hm D+ Receiver D evice D rive Device O U T- Z0 = 50O hm D50O hm 50O hm VTT = VD D - 2.0 V Figure 2. LVPECL DC Coupled Typical Termination with Termination Voltage VD D SiT9102, LVPEC L-1 VDD = 3.3V R1 R3 R1 = R3 = 133 Ohm R2 = R4 = 82 Ohm VDD = 2.5V O U T+ Z0 = 50O hm D+ R1 = R3 = 250 Ohm R2 = R4 = 62.5 Ohm R eceiver D evice D rive D evice O U T- Z0 = 50O hm DR2 R4 Figure 3. LVPECL DC Coupled Typical Termination without Termination Voltage Rev. 1.52 Page 9 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator SiT9102 OUT+ Z0 = 50 Ohm D+ RS RS = 10 Ohm to 35 Ohm Receiver Device Drive Device Z0 = 50 Ohm OUT- D- RS 50 Ohm 50 Ohm Figure 4. HCSL Typical Termination Note: 1. All the tests are done with RS = 20 Ohm (recommended). SiT9102 OUT+ Z0 = 50 Ohm D+ 100 Ohm Drive Device OUT- Receiver Device Z0 = 50 Ohm D- Figure 5. LVDS Single Termination (Load Terminated) SiT9102 A B OUT+ Z0 = 50 Ohm 100 Ohm Drive Device OUT- A D+ 100 Ohm Z0 = 50 Ohm Receiver Device B D- Note: For AC coupled operation, include/insert decoupling caps at points A or B Figure 6. LVDS Double Termination (Source + Load Terminated) Rev. 1.52 Page 10 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator SiT9102 OUT+ Z0 = 50 Ohm D+ Receiver Device Drive Device OUT- Z0 = 50 Ohm D50 Ohm 50 Ohm VDD < VT < 3.63V Figure 7. CML Single Load Termination S iT 9 1 0 2 A OUT+ B Z0 = 50 O hm D+ R e c e iv e r D e v ic e D riv e D e v ic e A OUT50 O hm VDD B Z0 = 50 O hm 50 O hm < V T 1 < 3 .6 3 V 50 Ohm VDD D- 50 O hm < V T 2 < 3.6 3 V N o te s : 1 . F o r D C -c o u p le d o p e ra tio n , V T 1 = V T 2 2 . F o r A C c o u p le d o p e ra tio n , in c lu d e /in s e rt d e c o u p lin g c a p s a t p o in ts A o r B 2 . F o r A C -c o u p le d o p e ra tio n w ith c a p a cito rs p la c e d a t p o in t A , V T 2 s e ts th e in p u t c o m m o n m o d e o f R e c e iv e r D e v ic e a n d n e e d n o t to b e re la te d to V T 1 Figure 8. CML Double Load Termination Rev. 1.52 Page 11 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator Ordering Information The Part No. Guide is for reference only. For real-time customization and exact part number, use the SiTime Part Number Generator. SiT9102AC - 1 3 2 N 33E 123.12345T Part Family Packaging "T" for Tape & Reel (3 Ku Reel) "Y" for Tape & Reel (1 Ku Reel) Blank for Bulk "SiT9102" Revision Letter "A" is the revision of Silicon Frequency 1.00000 to 220.00000 MHz Temperature Range "N" Commercial, 0 to 70C "C" Extended Commercial, -20 to 70C "I" Industrial, -40 to 85C Feature Pin "E" for Output Enable "S" for Standby Signalling Type Voltage Supply "0" = LVPECL-0 (Figure 1) "1" = LVPECL-1 (Figure 2, 3) "2" = LVDS "3" = CML "4" = HCSL "18" for 1.8 V 5% (CML only) "25" for 2.5 V 10% "33" for 3.3 V 10% Swing Select Package Size "N" = Normal "3" 5.0 x 3.2 mm "4" 7.0 x 5.0 mm "8" 7.0 x 5.0 mm[1] "H" = High (LVDS & CML only) Frequency Stability "F" for 10 PPM "H" for 15 PPM "1" for 20 PPM "2" for 25 PPM "3" for 50 PPM Frequency Stability vs. Temperature Range Options Frequency Stability (PPM) 10 15 20 1.8 V 2.5 V 3.3 V N (0 to +70C) - 3 3 C (-20 to +70C) - - - I (-40 to +85C) - - - N (0 to +70C) 3 C (-20 to +70C) - I (-40 to +85C) - N (0 to +70C) 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 C (-20 to +70C) I (-40 to +85C) N (0 to +70C) 25 C (-20 to +70C) I (-40 to +85C) N (0 to +70C) 50 Supply Voltage Temperature Range C (-20 to +70C) I (-40 to +85C) Signaling Type vs. Swing Select Options Signaling Type LVPECL-0 LVPECL-1 LVDS CML HCSL Supply Voltage Swing Select 1.8 V 2.5 V 3.3 V Normal - 3 3 High - - - Normal - 3 3 High - - - Normal - High - Normal High 3 3 Normal - 3 3 3 3 3 3 3 3 3 3 High - - - Note: 1. Without Center Pad. Rev. 1.52 Page 12 of 13 www.sitime.com SiT9102 LVPECL / HCSL / LVDS / CML 1 to 220 MHz High Performance Oscillator Package Information [2] Land Pattern[3] (recommended) (mm) Dimension (mm) 5.0 x 3.2 x 0.75mm #5 #4 #2 #3 #4 #5 #6 1.20 #6 YXXXX #1 #3 #2 #1 0.750.05 7.0 x 5.0 x 0.90mm 7.00.10 #2 0.90 0.10 2.30 1.47 2.60 #3 #3 #1 1.60 #2 2.30 #6 #5 1.10 YXXXX #1 #4 3.80 #4 1.47 #5 5.00.10 #6 5.08 5.08 1.40 No Connect or Connect to GND (recommended) [4] 1.60 Notes: 2. "Y" denotes manufacturing origin and "XXXX" denotes manufacturing lot number. The value of "Y" depend on the assembly location of the device. 3. A capacitor of value 0.1F between VDD and GND is recommended. 4. The 7050 package with part number designation "-8" has NO center pad. (c) SiTime Corporation 2010. The information contained herein is subject to change at any time without notice. SiTime assumes no responsibility or liability for any loss, damage or defect of a Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii) unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress. Disclaimer: SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any sitime product and any product documentation. products sold by sitme are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved or at stake. all sales are made conditioned upon compliance with the critical uses policy set forth below. CRITICAL USE EXCLUSION POLICY BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR FACILITIES OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE. SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products does not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to the sale of products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be strictly prohibited. Rev. 1.52 Page 13 of 13 Revised June 23, 2010