SCG2030-002.048M - Connor-Winfield

Application

The Connor-Winfield SCG2000 Series

provides high precision phase lock loop

frequency translation for the

telecommunication applications.

SCG2000 Series is well suited for use in

line cards, service termination cards and

similar functions to provide reliable

reference, phase locked, synchronization

and low phase gain for TDM, PDH, SONET

and SDH network equipment. The

SCG2000 Series provides a jitter filtered,

wander following output signal

synchronized to a superior Stratum or peer

input reference signal.

Features

•3.3V High

Precision PLL

•Tri-State Capability

•Active Alarms

•Guaranteed Free

Run ±20ppm

•1 Sec. Acquisition

Time

SCG2000 Series

Synchronous Clock

Generators

PLL

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851-4722

Fax: 630- 851-5040

www.conwin.com

Bulletin SG035

Page 1 of 20

Revision 00

Date 23 AUG 04

Issued By MBATTS

Data Sheet #: SG035 Page 2 of 20 Rev: 00 Date: 08/23/04

Functional Block Diagram

Figure 1

ALARM

DETECTION

Reference Input

(Pin 8) DIVIDER DPFD ANALOG

FILTER

DIVIDER

FREE RUN

CONTROL

Free Run Enable

(Pin 5)

Input Freq. Select A

(Pin 14)

LOL Alarm Output

(Pin 7)

VCXO

LOR Alarm Output

(Pin 6)

Oscillator Output

(Pin 9)

Optional Oscillator Output

(Pin 1)

Reference Output

(Pin 1)

(Not available on

models with optional

oscillator output)

Input Freq. Select B

(Pin 13)

Tri-State Enable

(Pin 10)

also enter a Free Run state which will guarantee a 20 ppm

accurate output. Additionally the Free Run mode may be

entered manually by asserting a high signal to the Free

Run Enable pin. The outputs, except the oscillator output,

may be put into the tri-state high impedance condition for

external testing purposes by asserting a high signal to the

Tri-State Enable pin.

The SCG2000 Series are 3.3 Volt components that

typically draw less than 100 mA. All models have an

acquisition time of approximately 1.0 second and can be

used in applications that require temperature rating of 0° -

70° C. All models have a 33Ω resistor in series with the

oscillator output. The SCG2000 maximum package

dimensions are .78” x .83” x .35” on a six layer FR4 board

with surface mount pins. Parts are assembled using high

temperature solder to withstand surface mount reflow

process.

General Description

The SCG2000 Series provides high precision phase lock loop

frequency translation for the telecommunication applications.

The SCG2000 products generate a CMOS output from an

intrinsically low jitter, voltage controlled crystal oscillator. Most

models provide a jitter attenuated, internal reference that is

connected to a Reference Output pin.

SCG2000 Series is well suited for use in line cards, service

termination cards and similar functions to provide reliable

reference, phase locked, synchronization for TDM, PDH, SONET

and SDH network equipment . The SCG2000 Series provides a

low phase gain (<0.2dB), jitter filtered, wander following output

signal synchronized to a superior Stratum or peer input reference

signal.

The SCG2000 Series include the following features: Free

Run, Tri-state and alarm outputs for Loss-of-Reference, (LOR),

Loss-of-Lock, (LOL). During the LOR alarm, the SCG2000 will

Model Comparison Table

Tab le 1

Max

Model Input Duty Reference Output Oscillator Output Notes

Ref Freq Cycle (Pin #1) (Pin #9)

SCG2000 8-64 kHz 40/60 = Input Ref Freq. 1.544 MHz to 125.0 MHz Basic Model

SCG2010 19.44 MHz 40/60 8 kHz 19.44 MHz

SCG2020 19.44 MHz 40/60 19.44 MHz 77.76 MHz

SCG2030 8-64 kHz 45/55 = Input Ref Freq. 1.544 MHz to 125.0 MHz Tight Duty Cycle

SCG2050 8-64 kHz 40/60 19.44 MHz 77.76 MHz

SCG2070 19.44 MHz 40/60 51.84 MHz, 77.76 MHz 51.84 MHz, 77.76 MHz Ref Output = Osc Output

*Features which differentiate a model from the base model (SCG2000) are highlighted in boldface color and in the notes column.

Data Sheet #: SG035 Page 3 of 20 Rev: 00 Date: 08/23/04

Typical Application

Figure 2

Pin Description

Table 2 All SCG2000 Models

Pin # Connection Description

1 Reference Output Output frequency is dependent on SCG model

2 TCK JTAG pin that is used only by Connor-Winfield for programming. Do not connect

3 TMS JTAG pin that is used only by Connor-Winfield for programming. Do not connect

4 Ground Ground

5 Free Run Enable/TDI Free Run enable pin. 1 = Free Run at nominal frequency ±20ppm. Input is pulled to

GND

6 Loss of Reference (LOR) Alarm indicator. 1 = The reference has been lost.

7 Loss of Lock (LOL) Alarm indicator. 1 = Phase lock has been lost

8 Reference Input Input reference frequency

9 Oscillator Output Output frequency is dependent on SCG model

10 Tri-State enable Tri State control for all outputs except Oscillator Output. 1 = Hi-Z, 0 = normal.

Input is pulled to GND.

11 Vcc 3.3V Supply Voltage.

12 TDO JTAG pin that is used only by Connor-Winfield for programming. Do not connect

13 Input Freq. Select B Control pin B used to select input frequency. Input is pulled to GND.

14 Input Freq. Select A Control pin A used to select input frequency. Input is pulled to GND.

Input Select

MUX

System Select

BITS

System

Signal

CW's STM/MSTM module

CW's SCG

2000/4000

CW's SCG

2000/4000

A

B

S

Y

A

B

Y

S

A

B

A

B

S

Y

S

Y

Timing Card #1

Timing Card #N

Line Card 1

RCV

Clock out

Line Card #N

Data Sheet #: SG035 Page 4 of 20 Rev: 00 Date: 08/23/04

Absolute Maximum Rating

Table 3 All SCG2000 Models

Symbol Parameter Minimum Nominal Maximum Units Notes

Vcc Power Supply Voltage -0.5 4 Volts

V1 Input Voltage -0.5 5.5 Volts

Ts Storage Temperature -65 150 deg. C

Input And Output Characteristics

Table 5 All SCG2000 Models

Symbol Parameter Minimum Nominal Maximum Units Notes

VIH High Level Input Voltage 2 5.5 V

VIL Low Level Input Voltage 0 0.8 V

TIO I/O to Output Valid 10 nS

COOutput Capacitance 10 pF

VHO High Level Output Voltage loH = -4mA 2.4 Vcc Min.

VIO Low Level Output Voltage loL

= 8mA 0.4 Vcc Max.

TIR Input Reference Signal Pulse Width 30 nS

Specifications

Table 4 All SCG2000 Models

Parameter Specifications Notes

Voltage 3.3V ±5% 1.0

Current 100 mA Typical

Temperature Range 0 to 70°C

Input Jitter Tolerance ≥31.25us Typical (SCG2000, SCG2030, SCG2050)

(Input Jitter Frequencies > 10 Hz)

>1 us Typical (SCG2010, SCG2015, SCG2020, SCG2070)

Jitter Bandwidth <15 Hz

Acquisition Time Approx 1.0 second 2.0

Capture/Pull-in Range ±25 ppm Minimum

Output Duty Cycle 40/60 % Min/Max @ 50% Level

Output Rise and Fall Time 3 ns @ 20% to 80% output level

Output Load 30 pF

Alarms LOR, LOL Status on seperate outputs

Free Run Accuracy ±20 ppm

Package Fr4 SM 0.78" x .83" x 0.35" (maximum)

TDEV 60 ps Typical

MTIE 750 ps Typical

Reference Output/Oscillator Output Offset ≤ 8 ns

Static Offset ± 26 ns Maximum 3.0, 5.0

Dynamic Offset ± 20 ns Maximum 4.0, 5.0

NOTES: 1.0: Requires external regulation

` 2.0: From a 20 ppm offset in reference frequency

3.0: Offset between Reference Input and Reference Output @ room temp.

4.0: Offset change between Reference Input and Reference Output over temperature range from room temperature.

5.0: The SCG2015 will maintain an offset/skew, between the reference input and the oscillator output, of X ± 1ns. X is TBD.

Data Sheet #: SG035 Page 5 of 20 Rev: 00 Date: 08/23/04

Maximum Package Dimensions

Figure 3

Recommended Footprint Dimensions

Figure 4

0.640" [16.26mm]

0.800" [20.32mm]

0.080" [2.03mm]

0.650"

[16.51mm]

0.050"

[1.27mm]

0.100" [2.54mm]

0.050"

[1.27mm]

Output Jitter Specifications

Table 6 All SCG2000 Models

Jitter BW 10 Hz - 20 MHz SONET Jitter BW 12 KHz - 20 MHz

Frequency (MHz) pS (RMS) m UI pS (RMS) m UI

1.544 30 Typ. 0.046 Typ. 4 Typ. 0.006

2.048 30 Typ. 0.061 Typ. 4 Typ. 0.008

8.448 10 Typ. 0.084 Typ. 1 Max., 0.5 Typ. 0.008 Max.

16.384 10 Typ. 0.164 Typ. 1 Max., 0.5 Typ. 0.016 Max.

19.44 10 Typ. 0.194 Typ. 1 Max., 0.5 Typ. 0.019 Max.

20.48 10 Typ. 0.205 Typ. 1 Max., 0.5 Typ. 0.020 Max.

37.056 10 Typ. 0.371 Typ. 1 Max., 0.5 Typ. 0.037 Max.

44.736 10 Typ. 0.457 Typ. 1 Max., 0.5 Typ. 0.045 Max.

49.152 10 Typ. 0.492 Typ. 1 Max., 0.5 Typ. 0.049 Max.

51.84 10 Typ. 0.518 Typ. 1 Max., 0.5 Typ. 0.052 Max.

77.76 10 Typ. 0.778 Typ. 1 Max., 0.5 Typ. 0.078 Max.

125.0 10 Typ. 1.25 Typ. 1 Max., 0.5 Typ. 0.125 Max.

* Note: These jitter specs only apply to version 2 models

Output Programming

Table 7 All SCG2000 Models

Tristate Free Run Output

0 0 Locked to reference selected (default)

1 X Hi-Z Tristate condition

0 1 Free run at nominal frequency

Alarm Status

Table 8 All SCG2000 Models

LOL Output LOR Output Alarm Output

0 0 No alarm

1 0 Loss-of-Lock

X 1 Loss-of-Reference

Data Sheet #: SG035 Page 6 of 20 Rev: 00 Date: 08/23/04

Tape and Reel Dimensions

Figure 5

Data Sheet #: SG035 Page 7 of 20 Rev: 00 Date: 08/23/04

10.0E-12

100.0E-12

1.0E-3 10.0E-3 100.0E-3 1.0E+0 10.0E+0

Integration Time (τ)

(seconds)

TDEV

(seconds)

SCG2000 Typical TDEV

Figure 6

SCG2000 Typical MTIE

Figure 7

100.0E-12

1.0E-9

1.0E-3 10.0E-3 100.0E-3 1.0E+0 10.0E+0 100.0E+0

Observation Window (S)

(seconds)

MTIE

(seconds)

Data Sheet #: SG035 Page 8 of 20 Rev: 00 Date: 08/23/04

SCG2000 Switch from Free Run to a new Reference

Figure 8

-60.0E-6

-50.0E-6

-40.0E-6

-30.0E-6

-20.0E-6

-10.0E-6

000.0E+0

012345678

Time (sec)

Phase Deviation (sec)

-8.0E-6

-7.0E-6

-6.0E-6

-5.0E-6

-4.0E-6

-3.0E-6

-2.0E-6

-1.0E-6

000.0E+0

1.0E-6

2.0E-6

01234567891011

Time (sec)

Phase Deviation (sec)

SCG2000 Switch from a Reference to Free Run

Figure 9

Data Sheet #: SG035 Page 9 of 20 Rev: 00 Date: 08/23/04

-200.0E-9

000.0E+0

200.0E-9

400.0E-9

600.0E-9

800.0E-9

1.0E-6

1.2E-6

45678

Time (sec)

-1.8E+3

-1.6E+3

-1.4E+3

-1.2E+3

-1.0E+3

-800.0E+0

-600.0E+0

-400.0E+0

-200.0E+0

000.0E+0

200.0E+0

4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6

Time (sec)

Frequency (Hz)

SCG2000 1µs Phase Transient Response

Figure 11

SCG2000 Step Response due to a -20ppm Freq. Step

Figure 10

Data Sheet #: SG035 Page 10 of 20 Rev: 00 Date: 08/23/04

SCG2000 Jitter Attenuation

Figure 12

Typical System Test Setup

Figure 13

Target System Under Test

Possible Choice :

Stanford Research Model: FS700

Ar bit rary

Waveform

Genera tor

External

R e f e r e nc e I n pu t

Ar bit rary

Waveform

Genera tor

[Noise

Source]

DS1 rate RZ (1.544 MHz) , E1 rate RZ or 8 kHz

clock RZ with noise modulation

Cloc k or BITS l ogic l evel c lock

input (TTL, CMOS, etc.)

HP53310A

Modulation Analyzer / Time Interval Analyzer

DS1 rate [1.544 MHz] BITS Bipolar

Phase Er ror data output

Sample Wander G e ne rat i on (TDEV) fo r STM /MSTM-S3

100.0E-12

1.0E-9

10.0E-9

100.0E-9

1.0E-6

10.0E-3 100 .0E-3 1.0E+0 10.0E+0 100.0E+01.0E+3

Integration Time (sec)

TD E V (se

c

TDEV

GR1244-Fig5.1

GR1244

-

Fig5

-

3

Typical response - 3000 second test - Jitter applied (2 UI @ 10 Hz)

ref date APR 22 1998

kdh

Sample MTIE Data fo r ST M -S 3/ M ST M -S 3

1.0E-9

10.0E-9

100.0E-9

1.0E-6

100.0E-31.0E+0 10.0E+0100.0E+0 1.0E+3 10.0E+3

Obs e

rv

at

i

o

n Tim

e

(s)

MTIE (s

MTIE

1244-

5

.2 M

as

k

(

A

)

1244-

5

.2 M

as

k

(

B

)

1244-5.6 Mask

GR253-5.4.4.3.2

Typical response - 3000 second test - Jitter applied (2 UI @ 10 Hz)

ref date APR 22 1998

kdh

Standar ds

Compliance

Documents

Time-stamped ensemble

based on absolute time

refer ence (10MHz input)

DS-1, OC-3, OC-12 el ectrical or optical signals

Wander Analyzer data (IEEE-488)

10

MHz

This device supplies system time

information. It can be thought of as

supplying "absolute time" reference

information

10

MHz

External

R e f e r e nc e I n pu t

Noise Modulation Input

10

MHz

External

R e f e r e nc e I n pu t I E EE - 4 88 Co nt r ol le r

Platform for software

HP 53305A Phase Analyzer

HP E1748A Sync Measurement

Tektronix Wander Analyzer

10

MHz

External

Reference Input

Timing Card

Line Card

Timing Card

OC- 3 Line Car d

OC- 12 Li ne Card

OC- 48 Li ne Card

DS-1 Li ne Card

. . . . ...

MTIE, TDEV, Wander Transfer,

and Wander Generati on Plots

Tektronix

SJ300E

GPS or LORAN

Timing Source

Jitter Attenuation vs. Input Frequency

-45.0

-40.0

-35.0

-30.0

-25.0

-20.0

-15.0

-10.0

-5.0

0.0

1 10 100 1000

INPUT Jitter frequency (Hz)

Jitter attenuation (dB)

Data Sheet #: SG035 Page 11 of 20 Rev: 00 Date: 08/23/04

Alarm Timing Diagram

Figure 14

LOL

Output

Phase

Detector

External

Reference

Internal

Reference

LOR

Output 4

2 2 2 2 2 2 2 2 2 2 2 2 2 2

3

2

Start-up

Region

Start-up Region

LOL

Output

Phase

Detector

External

Reference

Internal

Reference

LOR

Output

33

2

2222 22

22 2

11 1 1

2 2

1 1

2 2

1

5

1

19.44 MHz &77.76 MHz

Reference Input Units 8 kHz Reference Input Units

< 31.25 µsec

31.25 µsec

> 31.25 µsec

< 1 µsec

> 1 µsec

1 µsec

2

3

4

125 µsec wide rangeLOR is active when LOL is active

5

Minimum pulse width = 2 µsec Minimum pulse width = 62.5 µsec

During Start-up, The LOL Alarm will pulse

during the first second of operation

Data Sheet #: SG035 Page 12 of 20 Rev: 00 Date: 08/23/04

Solder Profile

Figure 15

Temp

0

100

150

200

250

50

12345678

Time (minutes)

(Deg C)

Recommended Reflow Profile

Peak Temp: 217 Deg C

Max Rise Slope: 1.5 Deg

C/Sec

Time Above 150 C: 100 Sec

Ordering Information

SCG{XXXX}-{FFF.FFF}{M}

XXXX equals a specific model (2000, 2010, 2020, 2030, 2050, 2070)

FFF.FFF equals the Oscillator Output frequency (001.544, 002.048, 008.448, 016.384, 019.44,

020.48, 037.056, 044.736, 049.152, 051.84, 077.76, 125.0)

M equals MHZ and is added to all part numbers

Example: To order an SCG2000 with an Oscillator Output of 77.76 MHz,

Order part number SCG2000-077.76M

Please contact Connor-Winfield for other frequencies that may be available.

Data Sheet #: SG035 Page 13 of 20 Rev: 00 Date: 08/23/04

SCG2000

SCG2000 Individual Features:

•Four selectable References:

8, 16, 32, and 64 kHz.

•Oscillator Output Available:

1.544 MHz to 125.0 MHz.

The SCG2000 is Connor-Winfield’s base model

for the SCG2000 Series product line. The

SCG2000 can lock to one of four input

reference frequencies from 8 to 64 kHz which is

selectable using two input control pins.

Notes:

Note 4.0: Not available with 19.44 MHz output.

Input Reference Selection

Table 9 SCG2000

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

0 0 8 kHz (default)

1 0 16 kHz

0 1 32 kHz (see note 4.0)

1 1 64 kHz (see note 4.0)

Reference and Output Availability

Table 10 SCG2000

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

8 kHz 19.44 MHz 8 kHz

16 kHz 16 kHz

8 kHz 8 kHz

16 kHz 38.88 MHz 16 kHz

32 kHz 32 kHz

8 kHz 8 kHz

16 kHz 1.544, 2.048, 16.384 20.48, 37.056, 16 kHz

32 kHz 44.736, 49.152, 51.84 and 77.76 MHz 32 kHz

64 kHz 64 kHz

8 kHz 125.0 MHz 8 kHz

Data Sheet #: SG035 Page 14 of 20 Rev: 00 Date: 08/23/04

SCG2010

SCG2010 Individual Features:

•Input References (Pin #8) at 19.44 MHz.

•Oscillator Output (Pin #9) at 19.44 MHz.

•Reference Output (Pin #1) at 8 kHz.

The SCG2010 is designed as a clean-up PLL

with the input reference frequency (Pin #8)

equal to the oscillator output (Pin #9). The

reference output frequency (Pin #1) is 8 kHz.

The LOL alarm is designed to tolerate 1µs

p-p of jitter on the reference. Jitter greater

than 1µs p-p will result in LOL alarm pulses.

Input Reference Selection

Table 11 SCG2010

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

X X 19.44 MHz (Default)

X= Don’t Care

Reference and Output Availability

Table 12 SCG2010

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

19.44 MHz 19.44 MHz 8 kHz

Data Sheet #: SG035 Page 15 of 20 Rev: 00 Date: 08/23/04

SCG2020 Individual Features:

•Input References (Pin #8) at 19.44 MHz.

•Oscillator Output (Pin #9) at 77.76 MHz.

•Reference Output (Pin #1) at 19.44 MHz.

The SCG2020 accepts a 19.44 MHz Input

Reference (Pin #8) and provides a 19.44

MHz Output Reference (Pin #1) and a

77.76 MHz signal output on Output #2.

The LOL alarm is designed to tolerate 1µs

p-p of jitter on the reference. Jitter greater

than 1µs p-p will result in LOL alarm

pulses.

SCG2020

Input Reference Selection

Table 15 SCG2020

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

X X 19.44 MHz (Default)

X= Don’t Care

Reference and Output Availability

Table 16 SCG2020

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

19.44 MHz 77.76 MHz 19.44 MHz

Data Sheet #: SG035 Page 16 of 20 Rev: 00 Date: 08/23/04

The SCG2030 is similar to the SCG2000

but with a tighter duty cycle of 45/55.

SCG2030 Individual Features:

•Four selectable References:

8, 16, 32, and 64 kHz.

•Oscillator Output Available:

1.544 MHz to 125.0 MHz.

•Tight Duty cycle

SCG2030

Notes:

Note 4.0: Not available with 19.44 MHz output.

Input Reference Selection

Table 17 SCG2030

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

0 0 8 kHz (default)

1 0 16 kHz

0 1 32 kHz (see note 4.0)

1 1 64 kHz (see note 4.0)

Reference and Output Availability

Table 18 SCG2030

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

8 kHz 19.44 MHz 8 kHz

16 kHz 16 kHz

8 kHz 1.544, 2.048, 8.448, 16.384,17.408 MHz 8 kHz

16 kHz 1.544, 2.048, 8.448, 20.48, 37.056 MHz 16 kHz

32 kHz 8.448, 16.384, 44.736, 49.152 MHz 32 kHz

64 kHz 8.448, 51.84 and 77.76 MHz 64 kHz

8 kHz 125.0 MHz 8 kHz

Data Sheet #: SG035 Page 17 of 20 Rev: 00 Date: 08/23/04

SCG2050 Individual Features:

•Four selectable References:

8, 16, 32, and 64 kHz.

•Oscillator Output Available:

77.76 MHz only

The SCG2050 can use any 1 of 4

selectable Input Reference frequencies

with an Oscillator output of 77.76 MHz and

a Reference Output of 19.44 MHz

SCG2050

Input Reference Selection

Table 19 SCG2050

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

0 0 8 kHz (default)

1 0 16 kHz

0 1 32 kHz

1 1 64 kHz

Reference and Output Availability

Table 20 SCG2050

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

8 kHz 77.76 MHz 19.44 MHz

16 kHz 77.76 MHz 19.44 MHz

32 kHz 77.76 MHz 19.44 MHz

64 kHz 77.76 MHz 19.44 MHz

Data Sheet #: SG035 Page 18 of 20 Rev: 00 Date: 08/23/04

SCG2070 Individual Features:

•Input References (Pin #8) at 19.44 MHz.

•Oscillator Output (Pin #9) equals Reference

Output (Pin #1)

The SCG2070 is designed to provide two

output frequencies that are equal. The

Reference Output is actually a second

Oscillator Output. SCG2070 is available

with either 77.76 MHz outputs or with

51.84 MHz outputs. The LOL alarm is

designed to tolerate 1µs p-p

of jitter on the reference. Jitter greater than

1µs p-p will result in LOL alarm pulses.

SCG2070

Input Reference Selection

Table 21 SCG2070

Input Sel A Input Sel B Reference Frequency

(Pin #14) (Pin #13) (Pin #8)

X X 19.44 MHz (Default)

X= Don’t Care

Reference and Output Availability

Table 22 SCG2070

Input Reference Oscillator Output Reference Output

(Pin #8) (Pin #9) (Pin #1)

19.44 MHz 77.76 MHz 77.76 MHz

19.44 MHz 51.84 MHz 51.84 MHz

Data Sheet #: SG035 Page 19 of 20 Rev: 00 Date: 08/23/04

2111 Comprehensive Drive

Aurora, Illinois 60505

Phone: 630-851- 4722

Fax: 630-851-5040

www.conwin.com

Revision Revision Date Note

00 8/23/04 Final Release