TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
CURRENT-LIMITED LOAD SWITCH WITH LOW NOISE REGULATION CAPABILITY
Check for Samples: TPS22949,TPS22949A
1FEATURES DESCRIPTION
• Integrated Current Limiter
– Input Voltage Range: 1.62 V to 4.5 V The TPS22949 and TPS22949A are devices that
provides protection to systems and loads in
– Low ON-Resistance high-current conditions. The device contains a
– rON = 300-mΩat VIN = 4.5 V 500-mΩcurrent-limited P-channel MOSFET that can
– rON = 350-mΩat VIN = 3.3 V operate over an input voltage range of 1.62 V to
4.5 V as well as a low-dropout (LDO) regulator with a
– rON = 400-mΩat VIN = 2.5 V fixed output voltage of 1.8 V.
– rON = 600-mΩat VIN = 1.8 V The switch is controlled by an on/off input (EN1),
– Integrated 100-mA Minimum Current Limit which is capable of interfacing directly with
– Undervoltage Lockout low-voltage control signals. When the switch current
– Fast-Current Limit Response Time reaches the maximum limit, the
TPS22949/TPS22949A operates in a
– Integrated Fault Blanking and Auto Restart constant-current mode to prohibit excessive currents
• Stable Without Current Limiter Output from causing damage. If the constant current
Capacitor (TPS22949A Only) condition still persists after 12 ms, these devices shut
• Integrated Low-Noise RF LDO off the switch and pull the fault signal pin (OC) low.
The TPS22949/TPS22949A has an auto-restart
– Input Voltage Range: 1.62 V to 4.5 V feature that turns the switch on again after 70 ms if
– Low Noise: 50 μVrms (10 Hz to 100 kHz) the EN1 pin is still active.
– 80-dB VIN PSRR (10 Hz to 10 kHz) The output of the current limiter is internally
– Fast Start-Up Time: 130 μsconnected to a RF low-dropout (LDO) regulator that
– Low Dropout 100 mV at Iload =100 mA offers good ac performance with very low ground
current, good power-supply rejection ratio (PSRR),
– Integrated Output Discharge low noise, fast start-up, and excellent line and load
– Stable With 2.2-μF Output Capacitor transient response. The output of the regulator is
• 1.8-V Compatible Control Input Threshold stable with ceramic capacitors. This LDO uses a
precision voltage reference and feedback loop to
• ESD Performance Tested Per JESD 22 achieve overall accuracy of 2% over all load, line,
– 3500-V Human-Body Model process, and temperature variations.
(A114-B, Class II) The TPS22949A integrates additional internal
– 1000-V Charged-Device Model circuitry that increases the current limit of the switch
(C101) during the power-up sequence. This feature allows
• Tiny 8-Terminal YZP Package (1.9 mm × the TPS22949A to operate without a storage
0.9 mm, 0.5-mm Pitch, 0.5-mm Height) and capacitor at the input of the LDO.
SON-8 (DRG) 3.0 mm × 3.0 mm The TPS22949 and TPS22949A are available in a
space-saving 8-terminal WCSP (YZP) or in a 8-pin
APPLICATIONS SON package (DRG). Both are characterized for
• Fingerprint Module Protection operation over the free-air temperature range of
• Portable Consumer Electronics –40°C to 85°C.
• Smart Phone
• Notebooks
• Control Access Systems
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright © 2009–2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Bump View
12
B
C
D
A
Laser Marking View
21
B
C
D
A
EN2 V+
18
Exposed
Thermal
Die Pad
on
Underside
VIN VOUTCL
3 6
GND VOUTLDO
27
EN1 OC
45
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
ORDERING INFORMATION(1)
TAPACKAGE(2) ORDERABLE PART NUMBER TOP-SIDE MARKING(3)
SON – DRG Tape and reel TPS22949ADRGR ZUG
–40°C to 85°C TPS22949YZPR _ _ _4Y_
WCSP – YZP Tape and reel TPS22949AYZPR _ _ _4Z_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
YZP PACKAGE Table 1. YZP PACKAGE TERMINAL
ASSIGNMENTS
DEN1 OC
CVIN VOUTCL
BGND VOUTLDO
AEN2 V+
2 1
DRG PACKAGE
(TOP VIEW)
The exposed center pad, if used, must be connected as a secondary GND or left electrically open.
TERMINAL FUNCTIONS
TERMINAL
NO. DESCRIPTION
NAME
YZP DRG
A1 8 V+Supply voltage
A2 1 EN2 LDO control input. Active high. Do not leave floating.
B1 7 VOUTLDO LDO output. Output of the RF LDO fixed to 1.8 V(1).
B2 2 GND Ground
C1 6 VOUTCL Switch output. Output of the power switch
C2 3 VIN Supply input. Input to the power switch; bypass this input with a ceramic capacitor to ground.
Over current output flag. Active low, open-drain output that indicates an over-current, supply
D1 5 OC undervoltage, or over-temperature state.
D2 4 EN1 Power switch control input. Active high. Do not leave floating.
(1) Output voltages from 0.9 V to 3.6 V in 50-mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
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Product Folder Link(s): TPS22949 TPS22949A
VIN
RPU
VOUTLDO
OC
VOUTCL
V+
CIN = 4.7 FµCCL = 4.7 Fµ
CLDO = 2.2 Fµ
EN1
EN2
VIN
GND
TPS22949
V+VOUTLDO
OC
VOUTCL
VIN
RPU
VOUTLDO
OC
VOUTCL
V+
CIN = 4.7 FµCCL = 0.1 Fµ
CLDO = 2.2 Fµ
EN1
EN2
VIN
GND
TPS22949A
V+VOUTLDO
OC
VOUTCL
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
FUNCTION TABLE
STATE OF THE DEVICE EN1 EN2
Current limiter and LDO disabled 0 X
Current limiter enabled/LDO disabled 1 0
Current limiter and LDO enabled 1 1
TYPICAL APPLICATIONS
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS22949 TPS22949A
V , Supply bias
(2.5 V to 5.5 V)
+
GND
EN2, Active high
EN1, Active high
V , Current limiter input
(1.62 V to 4.5 V)
IN
OC, Over-current flag
V , Current limiter output
OUTCL
V
(Fixed, 1.8 V max, 100 mA)
OUTLDO, LDO output
Low-Noise LDO
Current Limiter
with
Auto-Restart Feature
GND
OC
output discharge
VOUTCL
VOUTLDO
Control
Logic
Bandgap
UVLO
Current
Limit
Thermal
Shutdown
A2 (1)
D1 (5)
B1 (7)
C1 (6)
A1 (8)
D2 (4)
V+
EN2
EN1
VIN
C2 (3)
+
–
+
–
UVLO
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
BLOCK DIAGRAMS
Figure 1. Simplified Block Diagram
Figure 2. Detailed Block Diagram
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Product Folder Link(s): TPS22949 TPS22949A
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
ABSOLUTE MAXIMUM RATINGS(1)
MIN MAX UNIT
VIInput voltage VIN, EN1, EN2, V+–0.3 6 V
VOUTCL Current limiter output voltage VIN + 0.3 V
TJOperating junction temperature range –40 105 °C
Tstg Storage temperature range –65 150 °C
Human-Body Model 3.5
Electrostatic discharge protection (ESD) kV
Charged-Device Model 1
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS DERATING FACTOR ABOVE
BOARD PACKAGE RθJC RθJA TA= 25°C TA< 25°C TA= 70°C TA= 85°C
High-K (JESD 51-7) YZP 13.79°C/W 101.92°C/W 98.1 mW/°C 784 mW 343 mW 196 mW
High-K (JESD 51-5) DRG 56.6°C/W 52.44°C/W 19 mW/°C 1525 mW 667 mW 381 mW
RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT
VIN Input voltage(1) 1.62 4.5 V
VOUTCL Current limiter output voltage VIN V
V+Supply voltage 2.6 5.5 V
CIN Input capacitor 1 μF
TAAmbient free-air temperature –40 85 °C
Control Inputs (EN1, EN2)
VIH High-level input voltage 1.4 5.5 V
VIL Low-level input voltage 0.4 V
(1) See the Application Information section
ELECTRICAL CHARACTERISTICS
TA= –40°C to 85°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT
EN1 and EN2 = V+
V+= VOUT + 1.4 V or 2.5, whichever > 5.5 V,
IGND Ground pin current 85 110 μA
VOUTCL ≥VOUTLDO + 0.5 V
IOUT2 = 0 mA
Ground pin current (current
IGNDCL EN1 = V+and EN2 = 0 40 75 μA
limiter only) EN1 and EN2 = GND, VIN = V+= 3.3 V 2
IGND(OFF) OFF-state ground pin current VOUTCL = Open, μA
VIN = 3.6 V, V+= 5.5 V 6
VOUTLDO = Open
IEN2 Enable pin 2 current, enabled VEN2 = V+=5.5 V, VIN = 4.5 V 1 μA
IEN1 Enable pin 1 current, enabled VEN1 = V+= 5.5 V, VIN = 4.5 V 1 μA
TPS22949 122
Shutdown threshold (TA)TPS22949A 135
TPS22949 112
Thermal Return from shutdown °C
shutdown TPS22949A 120
TPS22949 10
Hysteresis TPS22949A 10
(1) Typical values are at VIN = 3.3 V and TA= 25°C.
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS22949 TPS22949A
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
CURRENT LIMITER ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, V+= 3.3 V, EN1 = V+, EN2 = GND (unless otherwise noted)
YZP PACKAGE DRG PACKAGE
PARAMETER TEST CONDITIONS TAUNIT
MIN TYP MAX MIN TYP MAX
25°C 0.3 0.4 0.4 0.5
VIN = 4.5 V Full 0.5 0.6
25°C 0.35 0.6 0.45 0.7
VIN = 3.3 V Full 0.7 0.8
25°C 0.4 0.7 0.5 0.8
rON ON-state resistance IOUT = 20 mA VIN = 2.5 V Ω
Full 0.8 0.9
25°C 0.6 0.9 0.7 1
VIN = 1.8 V Full 1.0 1.1
25°C 0.7 1.0 0.8 1.1
VIN = 1.62
VFull 1.1 1.2
ILIM Current limit VOUT = 3 V VIN = 3.3 V Full 100 150 200 100 150 200
Power-ON inrush mA
ILIM (INRUSH) current limit VOUT = 3 V VIN = 3.3 V Full 750 750
(TPS22949A only)
Undervoltage
UVLO-CL VIN increasing 1.39 1.49 1.59 1.39 1.49 1.59 V
shutdown
Undervoltage 30 30 mV
shutdown hysteresis VIN = 4.5 V 0.1 0.3 0.1 0.3
OC output logic low ISINK = 10 mA Full V
voltage VIN = 1.8 V 0.2 0.4 0.2 0.4
CURRENT LIMITER SWITCHING CHARACTERISTICS
VIN = 3.3 V, TA= 25°C, RL= 500 Ω, CL= 0.1 μF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tON Turn-ON time RL= 500 Ω, CCL = 0.1 μF 95 μs
tOFF Turn-OFF time RL= 500 Ω, CCL = 0.1 μF 2 μs
trVOUT rise time RL= 500 Ω, CCL = 0.1 μF 25 μs
tfVOUT fall time RL= 500 Ω, CCL = 0.1 μF 10 μs
tBLANK Overcurrent blanking time 6 12 18 ms
tRSTRT Auto-restart time 40 80 120 ms
Power-ON inrush current limit time
tINRUSH RL= 500 Ω, CCL = 0.1 μF 150 μs
(TPS22949A only) VIN = VEN1 = 3.3 V, moderate over-current condition 11
Short-circuit response time μs
VIN = VEN1 = 3.3 V, hard short 5
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Product Folder Link(s): TPS22949 TPS22949A
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
LOW-NOISE LDO REGULATOR ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOUTLDO Output voltage(1) 1.76 1.8 1.84 V
VIN line regulation VIN = VOUTLDO + 0.5 V to 4.5 V, IOUT = 1 mA ±0.1 %/V
ΔVOUTLDO/ΔVIN VIN line transient ΔVIN = 400 mV, tr= tf= 1 μs ±2 mV
VIN = VOUTLDO + 1.4 V or 2.5 V, whichever is > 5.5 V,
V+line regulation ±0.1 %/V
IOUT = 1 mA
ΔVOUTLDO/ΔV+V+line transient ΔVIN = 600 mV, tr= tf= 1 μs ±5 mV
Load regulation IOUT2 = 0 to 100 mA (no load to full load) ±0.01 %/V
ΔVOUTLDO/ΔIOUT2 Load transient IOUT2 = 0 to 100 mA, tr= tf= 1 μs ±35 mV
Dropout voltage VIN = VOUTLDO(NOM) – 0.1 V, V+– VOUTLDO(NOM) = 1.4 V,
VDO 110 200 mV
(VDO = VIN – VOUTLDO) IOUT = 100 mA f = 10 Hz 75
f = 100 Hz 75
VOUTCL – VOUTLDO ≥0.5 V, f = 1 kHz 80
Power-supply
VIN PSRR V+= VOUTLDO + 1.4 V, dB
rejection ratio f = 10 kHz 80
IOUT = 100 mA, f = 100 kHz 85
f = 1 MHz 85
f = 10 Hz 80
f = 100 Hz 80
VOUTCL – VOUTLDO ≥0.5 V, f = 1 kHz 75
Power-supply
V+PSRR V+= VOUTLDO + 1.4 V, dB
rejection ratio f = 10 kHz 65
IOUT = 100 mA, f = 100 kHz 55
f = 1 MHz 35
V+≥2.5 V,
VNOutput noise voltage BW = 10 Hz to 100 kHz 50 μVrms
VOUTLDO = VOUTCL + 0.5 V
VOUT = 95%,
tSTR Startup time 130 250 μs
VOUT(NOM), IOUT = 100 mA, COUT = 2.2 μF
Undervoltage lockout V+rising 2.3 2.45 2.55 V
UVLO-V+Hysteresis V+falling 150 mV
(1) LDO output voltage is fixed at 1.8 V. However, output voltages from 0.9 V to 3.6 V in 50 mV increments are available through the use of
innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability.
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS22949 TPS22949A
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.5 2.5 3.5 4.5 5.5
Input Voltage, V (V)
IN
ON-State Resistance, r ( )
ON W
V = 2.5 V
+
V = 4.5 V
+
V = 3.3 V
+
0.3
0.4
0.5
0.6
0.7
0.8
0.9
ON-State Resistance, r ( )
ON W
–40 –10 25 55 85
Temperature, T (°C)
A
V = 1.8 V
IN
V = 3.6 V
V = 4.5 V
V = 5 V
IN
IN
IN
2.2 2.4 2.6 2.8 3.0 3.2 3.4
I ( A)
GND m
Input Voltage, V (V)
IN
–150
–130
–110
–90
–70
–50
–30
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS
Figure 3. ON-State Resistance vs Input Voltage, TA= 25°C Figure 4. ON-State Resistance vs Temperature, V+= 5.5 V
Figure 5. Ground Pin Current vs Input Voltage V+= 5.5 V Figure 6. Ground Pin Current vs Input Voltage, V+= 3.3 V
8Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
I ( A)
GND m
Input Voltage, V (V)
IN
-42.5
-42.0
-41.5
-41.0
-40.5
-40.0
-39.5
-39.0
-38.5
-38.0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
I ( A)
GND m
–40 –10 25 55 85
Temperature, T (°C)
A
–120
–115
–110
–105
–100
–95
–90
–85
–80
V = 3.3 V
IN
V = 4.5 V
IN
I (nA)
GND(OFF)
Input Voltage, V (V)
IN
-3.50
-3.45
-3.40
-3.35
-3.30
-3.25
-3.20
-3.15
-3.10
-3.05
-3.00
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
I ( A)
GND m
–40 –10 25 55 85
Temperature, T (°C)
A
V = 1.8 V
V = 4.5 V
IN
IN
V = 3.3 V
IN
-50
-45
-40
-35
-30
-25
-20
-15
-10
-5
0
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS (continued)
Figure 7. Ground Pin Current vs Temperature, V+= 5.5 V Figure 8. Ground Pin Current vs Input Voltage (Current Limiter
Only), V+= 5.5 V
Figure 9. Ground Pin Current vs Temperature (Current Limiter Figure 10. OFF-State Ground Current vs Input Voltage, V+= 5.5
Only), V+= 5.5 V V
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Product Folder Link(s): TPS22949 TPS22949A
I ( A)
GND(OFF) m
–40 –10 25 55 85
Temperature, T (°C)
A
-4.5
-4.0
-3.5
-3.0
-2.5
-2.0
-1.5
-1.0
-0.5
0
V = 3.6 V
IN
V = 4.5 V
IN
V (V)
OUTLDO
–40 –10 25 55 85
Temperature, T (°C)
A
1.760
1.765
1.770
1.775
1.780
1.785
1.790
1.795
1.800
I = 0 mA
OUT
I = 1 mA
I = 100 mA
OUT
OUT
0.00
0.02
0.04
0.06
0.08
0.10
0.12
0.14
0.16
0.18
-0.10
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0.00
LDO Output Current, I (A)
OUTLDO
LDO Dropout Voltage, VLDO (V)
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 11. OFF-State Ground Current vs Input Voltage, VIN = V+Figure 12. OFF-State Ground Current vs Temperature
Figure 13. Output Voltage vs Temperature Figure 14. LDO Dropout Voltage vs Output Current
10 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
Input Voltage, VIN (V)
VOUTLDO (V)
2.0 2.5 3.0 3.5 4.0 4.5 5.0
1.72
1.74
1.76
1.78
1.80
1.82
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
1.791
1.792
1.793
1.794
1.795
1.796
1.797
2.0 2.5 3.0 3.5 4.0 4.5 5.0
Input Voltage, VIN (V)
VOUTLDO (V)
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
1.791
1.792
1.793
1.794
1.795
1.796
1.797
3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage, V+(V)
VOUTLDO (V)
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
1.774
1.775
1.776
1.777
1.778
1.779
3.0 3.5 4.0 4.5 5.0 5.5 6.0
Input Voltage, V+(V)
VOUTLDO (V)
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS (continued)
Figure 15. Input Voltage, VIN, Line Regulation, IOUT = 0 mA Figure 16. Input Voltage, VIN, Line Regulation, IOUT = 100 mA
Figure 17. Input Voltage, V+, Line Regulation, IOUT = 0 mA Figure 18. Input Voltage, V+, Line Regulation, IOUT = 100 mA
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Link(s): TPS22949 TPS22949A
IOUTLDO (A)
VOUTLDO (V)
1.770
1.780
1.785
1.790
1.795
1.800
-0.10
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0.00
1.775
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
IOUTLDO (A)
VOUTLDO (V)
1.790
1.792
1.793
1.794
1.795
1.796
1.797
-0.10
-0.09
-0.08
-0.07
-0.06
-0.05
-0.04
-0.03
-0.02
-0.01
0.00
1.791
T = –40°C
A
T = –10°C
T = 25°C
T = 55°C
T = 85°C
A
A
A
A
100 s/DIVµ
Load Transient Signal,LDO Output Response
50 mV/DIV
Load Transient Signal
LDO Output Response
100 s/DIVµ
Load Transient Signal,LDO Output Response
50 mV/DIV
Load Transient Signal
LDO Output Response
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 19. Load Regulation, IOUT = 100 mA Figure 20. Load Regulation Under Light Loads, IOUT = 10 mA
Figure 21. Load Transient Figure 22. VIN Load Transient
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Product Folder Link(s): TPS22949 TPS22949A
10E-9
210E-9
410E-9
610E-9
810E-9
1.01E-6
1.21E-6
1.41E-6
100 1000 10000 100000
Frequency (Hz)
Output Spectral Noise Density ( Vrms/RTHz)
100 s/DIVµ
VOUTLDO
VIN
1 mV/div
200 mV/div
V = 2.1 V to 2.5 V
V = 1.8 V
V = 3.2 V
I = 100 mA
IN
OUT
+
OUTLDO
-110
-90
-70
-50
-30
-10
10 100 1000 10000 100000 1000000
Frequency (Hz)
PSRR (dB)
I = 0 mA
OUTLDO
I = 50 mA
I = 100 mA
OUTLDO
OUTLDO
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
10 100 1000 10000 100000 1000000
0
Frequency (Hz)
PSRR
I = 1 mA
OUTLDO
I = 100 mA
OUTLDO
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS (continued)
Figure 23. V+Load Transient Figure 24. Output Spectral Noise Density vs Frequency
Figure 25. PSRR vs Frequency Figure 26. V+PSRR vs Frequency
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): TPS22949 TPS22949A
10
20
30
40
50
60
70
80
-50 -25 0 25 50 75 100
Temperature (°C)
trise /t (µs)
fall
Trise
Tfall
C = 0.1 µF
I = 10 mA
L
LOAD
R = 330
LΩ
20
40
60
80
100
120
140
160
180
-50 -25 0 25 50 75 100
Temperature (°C)
tON /t (µs)
OFF
TON
TOFF
C = 0.1 µF,
I = 10 mA
V
L
LOAD
IN +
R = 330
LΩ
= V = 3.3 V
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0.0 0.5 1.0 1.5 2.0
Input Voltage, EN1 (V)
Vout (V)
Vin = 1.8V-
Vin = 2.5V-
Vin = 3.0V-
Vin = 3.3V-
Vin = 4.5V-
Vin = 5.0V-
-0.2
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0.0 0.5 1.0 1.5 2.0
Input Voltage, EN2 (V)
LDO_out (V)
V+ = 2.5V-
V+ = 3V-
V+ = 3.3V-
V + = 3.6V-
V+ = 4.5V-
V+ = 5V-
V + = 5.5V-
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 27. tON/tOFF vs Temperature Figure 28. trise/tfall vs Temperature
Figure 29. EN1 (Current Limiter) Input Thresholds, V+= 5.5 V Figure 30. EN2 (LDO) Input Thresholds, VIN = 3.3 V
A. VDRV signal forces the device to go into over-current mode
B. VDRV signal forces the device to go into over-current mode
14 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
VOC
2 V/DIV
2 ms/DIV
IOUTCL
100 mA/DIV
VOUTCL
2 V/DIV
VDRV
(A)
2 V/DIV
VOC
2V/DIV
20 ms/DIV
IOUTCL
100mA/DIV
VOUTCL
2V/DIV
VDRV
(*)
2V/DIV
COUTCL = 0.1uF
ROUTCL = 500-!
VIN = 3.3-V
VEN1 1V/DIV
IOUTCL 1mA/DIV
50uS/DIV
COUTCL = 0.1uF
ROUTCL = 500-W
VIN = 3.3 V
V
1V/DIV
EN1
I
1 mA/DIV
OUTCL
50 us/DIV
VOUTCL
2V/DIV
IOUTCL
400mA/DIV
VIN
2V/DIV
10uS/DIV
CIN = 10uF
COUTCL = 1uF
VOUTLDO
2V/DIV
IOUTLDO
400mA/DIV
VIN
2V/DIV
10uS/DIV
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS (continued)
Figure 31. tBLANK Response Figure 32. tRESTART Response
Figure 33. Current Limiter tON Response Figure 34. Current Limiter tOFF Response
Figure 35. Short-Circuit Response Time (VOUTCL Shorted to Figure 36. Short-Circuit Response Time (VOUTLDO Shorted to
GND) GND)
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): TPS22949 TPS22949A
IOUTLDO
100mA/DIV
VIN/VEN2
1V/DIV
20uS/DIV
IOUTCL
100mA/DIV
VIN/VEN1
1V/DIV
20uS/DIV
CIN = 10uF
COUTCL = 1uF
IOUTLDO
200mA/DIV
VIN
1V/DIV
20uS/DIV
CIN =10uF
COUTCL =0.1uF
IOUTCL
200mA/DIV
VIN
1V/DIV
20uS/DIV
CIN =10uF
COUTCL =1uF
CIN =10uF
COUTCL =0.1uF
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
Figure 37. Short-Circuit Response Time (Switch Power-Up to Figure 38. Short-Circuit Response Time (LDO Power-Up to
Hard Short) (TPS22949) Hard Short) (TPS22949)
Figure 39. Short-Circuit Response Time (Switch Power-Up to Figure 40. Short-Circuit Response Time (LDO Power-Up to Hard
Hard Short) (TPS22949A) Short) (TPS22949A)
16 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
VOUTCL
(Shorted to
Ground)
IOUTCL
100mA/DIV
VIN
2V/DIV
20uS/DIV
CIN = 10uF
COUTCL = 1uF
VEN1
2V/DIV
VOUTLDO
(Shorted to
Ground)
IOUTLDO
100mA/DIV
VIN
2V/DIV
20uS/DIV
VEN2
2V/DIV
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
TYPICAL CHARACTERISTICS (continued)
Figure 41. Current Limit Response Time (Current Limiter) Figure 42. Current Limit Response Time (LDO)
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TPS22949 TPS22949A
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
APPLICATION INFORMATION
Undervoltage Lockout (UVLO)
The undervoltage lockout turns off the switch if the input voltage drops below the undervoltage lockout threshold.
With the ON pin active, the input voltage rising above the undervoltage lockout threshold causes a controlled
turn-on of the switch, which limits current over-shoots. The TPS22949/TPS22949A also has a UVLO on the V+
bias voltage and keep the output of the LDO shut off until the internal circuitry is operating properly.
Fault Reporting
When an overcurrent, input undervoltage, or overtemperature condition is detected, OC is set active low to signal
the fault mode. OC is an open-drain MOSFET and requires a pullup resistor between VIN and OC. During
shutdown, the pulldown on OC is disabled, reducing current draw from the supply.
Current Limiting
When the switch current reaches the maximum limit, the TPS22949/TPS22949A operates in a constant-current
mode to prohibit excessive currents from causing damage. TPS22949/TPS22949A has a minimum current limit
of 100 mA.
Input Voltage
The input voltage (VIN) of the current limiter is set from 1.62 V to 4.5 V, however if both the current limiter and the
LDO are enabled, the user must be careful to keep the input voltage (VIN) greater than 1.8 V + (voltage drop
through the switch) + (voltage drop through the LDO); otherwise, the LDO does not have a high enough internal
input signal to operate properly.
A current limiter input voltage ramp time less than the blanking time (~10 ms typical) is recommended. If the
ramp time extends beyond the blanking period, then the current limiter goes into recycle, and the system may not
start or operate properly.
Input/Output Capacitors
Although an input capacitor is not required for stability of on the input pin (VIN), it is good analog design practice
to connect a 0.1-μF to 1-μF low equivalent series resistance (ESR) capacitor across the IN pin input supply near
the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection,
and ripple rejection. A higher value capacitor may be necessary if large, fast rise time load transients are
anticipated, or if the device is located close to the power source. If source impedance is not sufficiently low, a
0.1-μF input capacitor may be necessary to ensure stability. The V+bias pin does not require an input capacitor
because it does not source high currents. However, if source impedance is not sufficiently low, a small 0.1-μF
bypass capacitor is recommended.
A 0.1-μF capacitor CCL, should be placed between VOUTCL and GND. This capacitor prevents parasitic board
inductances from forcing VOUTCL below GND when the switch turns off. For the TPS22949, the total output
capacitance must be kept below a maximum value, CCL(max), to prevent the part from registering an over-current
condition and turning off the switch. The maximum output capacitance can be determined from the following
formula:
CCL = ILIM(MAX) × tBLANK(MIN) ÷ VIN
Due to the integral body diode in the PMOS switch, a CIN greater than CCL is highly recommended. A CCL greater
than CIN can cause VOUTCL to exceed VIN when the system supply is removed. This could result in current flow
through the body diode from VOUTCL to VIN.
On TPS22949, a storage capacitor (CCL) at the output of the current limiter is recommended to provide enough
current to the LDO during the start-up sequence. The storage capacitor is needed to reduce the amount of inrush
current supplied through the current-limited load switch to the LDO during the power-up sequence (see
Figure 44). If the CCL capacitor is too small, the inrush current needed to start the LDO and charge CLDO could be
interpreted by the current limiter as an over-current and, therefore, trigger the current-limiting feature of the
switch. The switch would then try to limit the current to the 100-mA limit, and the user would see an undesired
drop on the supply line (see Figure 45).
18 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
VIN
RPU
V
(1.8 V, 100 mA)
OUTLDO
OC
VOUTCL
V+
CIN CCL
CLDO
EN1
EN2
VIN
GND
TPS22949
TPS22949A
V+VOUTLDO
OC
VOUTCL
0 0.0005 0.001 0.0015 0.002 0.0025
Time (s)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Voltage(V)
VIN VOUTCL VLDO
V = V = V = V = 3.3 V
C = 4.7 F, C = 2.2 F
C = 2.2 F
IN + EN1 EN2
IN CL
LDO
m m
m
TPS22949
TPS22949A
www.ti.com
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
On TPS22949A, the storage capacitor (CCL) is not required. TPS22949A integrates an additional internal circuitry
that increases the current limit of the switch to approximately 750 mA (i.e ILIM(INRUSH)) for about 250 μs (i.e
tINRUSH), initiated when the internal circuitry of the LDO is operating properly (i.e., when the UVLO of the LDO
bias (V+) is disabled (V+> 2.6 V). Because the current limit is increased during the power-up sequence, a
potential inrush current through the LDO is not interpreted by the current limiter as an over-current. The current
needed by the LDO is then be supplied by the input capacitor (CIN) of the current limiter (see Figure 45).
The TPS22949 LDO (VOUTLDO) is designed to be stable with standard ceramic capacitors with values of 2.2 μF or
larger at the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and
ESR over temperature. Maximum ESR should be less than 250 mΩ.Figure 43,Figure 44, and Figure 45
illustrate the behavior of the TPS22949 and TPS22949A with a 100-mA sinking load and different capacitor
values for a typical application where both enables are tied to the same input voltage (see Figure 43).
Figure 43. TPS22949/TPS22949A Typical Application With Both Enable Pins Tied to the Input Voltage
Figure 44. TPS22949 Power-Up Sequence
Copyright © 2009–2010, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): TPS22949 TPS22949A
0 0.0005 0.001 0.0015 0.002 0.0025
Time (s)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Voltage (V)
VIN VOUTCL VLDO
V = V = V = V = 3.3 V
C = 4.7 F, C = 0 F
C = 2.2 F
IN + EN1 EN2
IN CL
LDO
m m
m
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Time (s)
Voltage (V)
VIN VOUTCL VLDO
V = V = V = V = 3.3 V
C = 4.7 F, C = 0 F
C = 2.2 F
IN + EN1 EN2
IN CL
LDO
m m
m
0 0.0005 0.001 0.0015 0.002 0.0025
TPS22949
TPS22949A
SLVS908C –FEBRUARY 2009–REVISED JANUARY 2010
www.ti.com
Figure 45. TPS22949 Power-Up Sequence
Figure 46. TPS22949A Power-Up Sequence
20 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS22949 TPS22949A
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS22949ADRGR ACTIVE SON DRG 8 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
TPS22949AYZPR ACTIVE DSBGA YZP 8 3000 Green (RoHS &
no Sb/Br) SNAGCU Level-1-260C-UNLIM
TPS22949YZPR ACTIVE DSBGA YZP 8 3000 Green (RoHS &
no Sb/Br) SNAGCU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 5-Jan-2010
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS22949ADRGR SON DRG 8 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2
TPS22949AYZPR DSBGA YZP 8 3000 180.0 8.4 1.02 2.02 0.63 4.0 8.0 Q1
TPS22949YZPR DSBGA YZP 8 3000 180.0 8.4 1.02 2.02 0.63 4.0 8.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS22949ADRGR SON DRG 8 3000 367.0 367.0 35.0
TPS22949AYZPR DSBGA YZP 8 3000 220.0 220.0 34.0
TPS22949YZPR DSBGA YZP 8 3000 220.0 220.0 34.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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