PRELIMINARY CY24126 MediaClockTM for LCD Projectors 1CY2295 Features Benefits * Integrated phase-locked loop High-performance PLL tailored for projector applications * Low jitter, high accuracy outputs Meets critical timing requirements in complex system designs * 3.3V operation Enables application compatibility * 8-pin SOIC package Industry standard package saves on board space Part Number Outputs Input Frequency Output Frequencies CY24126 2 24 MHz 24 MHz, 48.00 MHz/120.00 MHz (selectable) Logic Block Diagram REF XIN OSC Q XOUT VCO OUTPUT DIVIDERS CLK P PLL S0 S1 VSS VDD Pin Configurations Table 1. CY24126 8-pin SOIC XIN 1 8 XOUT VDD S0 2 7 S1 3 6 REF VSS 4 5 CLK Cypress Semiconductor Corporation Document #: 38-07326 Rev. *A XIN (MHz) S1[1] S0 CLK (MHz) Note 24.00 L L 120.00 x5 24.00 H L 48.00 x2 24.00 X H disable - Note: 1. X = don't care. * 3901 North First Street * San Jose * CA 95134 * 408-943-2600 Revised December 14, 2002 PRELIMINARY CY24126 Pin Summary Name Pin Number Description XIN 1 Reference Input (24-MHz crystal or external input) VDD 2 3.3V Voltage Supply S0 3 CLK Select Line, see Table 1 VSS 4 Ground CLK 5 48.00 MHz/120.00 MHz (frequency selectable). See Table 1 REF 6 Reference output S1 7 Clock select line, see Table 1 XOUT[2] 8 Drives an external crystal Absolute Maximum Conditions Parameter Description Min. Max. Unit -0.5 7.0 V -65 125 C 125 C Supply Voltage VDD Temperature[3] TS Storage TJ Junction Temperature Digital Inputs VSS - 0.3 VDD + 0.3 V Digital Outputs referred to VDD VSS - 0.3 VDD + 0.3 V Electro-Static Discharge 2 kV Recommended Operating Conditions Parameter Description VDD Operating Voltage Min. Typ. Max. Unit 3.14 3.3 3.47 V TA Ambient Temperature 0 - 70 C CLOAD Max. Load Capacitance - - 15 pF fREF Reference Frequency - 24 - MHz tPU Power-up time for all VDD's to reach minimum specified voltage (power ramps must be monotonic) 500 ms 0.05 DC Electrical Characteristics Parameter Name Description Min. Typ. Max. Unit IOH Output High Current VOH = VDD - 0.5, VDD = 3.3V 12 24 - mA IOL Output Low Current VOL = 0.5, VDD = 3.3V 12 24 - mA CIN Input Capacitance - - 7 pF IIZ Input Leakage Current - 5 - A IDD Supply Current - - 35 mA Typ Max Unit No output load AC Electrical Characteristics (VDD = 3.3V) Parameter[4] Name Description Min Output Duty Cycle Duty Cycle is defined in Figure 1, 50% of VDD 45 50 55 % t3 Rising Edge Slew Rate Output Clock Rise Time, 20% - 80% of VDD 0.8 1.4 - V/ns t4 Falling Edge Slew Rate Output Clock Fall Time, 80% - 20% of VDD 0.8 1.4 - V/ns t9 Clock Jitter Peak to Peak period jitter - - 350 ps t10 PLL Lock Time - - 3 ms DC Document #: 38-07326 Rev. *A Page 2 of 5 PRELIMINARY CY24126 Notes: 2. Float XOUT if XIN is externally driven. 3. Rated for 10 years. 4. Not 100% tested. Test Circuit VDD CLK out 0.1 F CLOAD OUTPUTS GND t1 t2 CLK 50% 50% Figure 1. Duty Cycle Definition; DC = t2/t1 t3 t4 80% CLK 20% Figure 2. Rise and Fall Time Definitions Ordering Information Ordering Code Package Name Package Type Operating Range Operating Voltage CY24126SC S8 8-Pin SOIC Commercial 3.3V MediaClock is a trademark of Cypress Semiconductor Corporation. All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07326 Rev. *A Page 3 of 5 PRELIMINARY CY24126 Package Diagram 8-Lead (150-Mil) SOIC S8 51-85066-A Document #: 38-07326 Rev. *A Page 4 of 5 (c) Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY CY24126 Document Title: CY24126 MediaClockTM for LCD Projectors Document Number: 38-07326 REV. ECN NO. Issue Date Orig. of Change ** 111595 03/01/02 CKN New data sheet *A 121889 12/14/02 RBI Power up requirements added to Operating Conditions Information Document #: 38-07326 Rev. *A Description of Change Page 5 of 5