Rev.3.00, May 10, 2006, page 1 of 5
HD74LS75
Quadruple Bistable Latches REJ03D0416-0300
Rev.3.00
May 10, 2006
The HD74LS75 is ideally suited for use as temporary storage for binary information between processing units and
input / output or indicator units. Information present at a data (D) input is transferred to the Q output when the enable
(G) is high and the Q output will follow the data input as long as the enable remains high. When the enable goes low,
the information (that was present at the data input at the time the transition occurred) is retain ed at the Q output until the
enable is permitted to go high. This device features complementary Q and Q outputs from a 4-bit latch.
Features
• Ordering Information
Part Name Package Type Package Code
(Previous Code) Package
Abbreviation Taping Abbreviation
(Quantity)
HD74LS75P DILP-16 pin PRDP0016AE-B
(DP-16FV) P —
HD74LS75FPEL SOP-16 pin (JEITA) PRSP0016DH-B
(FP-16DAV) FP EL (2,000 pcs/reel)
Note: Please consult the sales office for the above packa ge availability.
Pin Arrangement
(Top view)
1Q
4Q
1Q
1D
2D
Enable 3-4
VCC
3D
4D
2Q
2Q
GND
Enable 1-2
3Q
3Q
4Q
15
161
2
3
4
5
6
7
14
89
10
11
12
13
QQ
QQ
DG
DG
QQ
DG
QQ
DG
HD74LS75
Rev.3.00, May 10, 2006, page 2 of 5
Function Table
Inputs Outputs
D G Q Q
L H L H
H H H L
X L Q0 Q0
H; high level, L; low level, X; irrelevant
Q0; level of Q before the indicated steady-state input conditions were established.
Q0; complement of Q0 or level of Q0 before the indicated steady-state input conditions were established.
Circuit Schematic (1/4)
Enable
Data
To Other
Latch
Q
Q
Absolute Maximum Ratings
Item Symbol Ratings Unit
Supply voltage VCC 7 V
Input voltage VIN 7 V
Power dissipation PT 400 mW
Storage temperature Tstg –65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Symbol Min Typ Max Unit
Supply voltage VCC 4.75 5.00 5.25 V
IOH — — –400 µA
Output current IOL — — 8 mA
Operating temperature Topr –20 25 75 °C
Pulse width tw 20 — — ns
Setup time tsu 15 — — ns
Hold time th 5 — — ns
HD74LS75
Rev.3.00, May 10, 2006, page 3 of 5
Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
VIH 2.0 — — V
Input voltage VIL — — 0.8 V
VOH 2.7 — — V
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,
IOH = –400 µA
— — 0.4 IOL = 4 mA
Output voltage VOL — — 0.5 V IOL = 8 mA VCC = 4.75 V, VIH = 2 V,
VIL = 0.8 V
D input — — 20
G input IIH — — 80 µA VCC = 5.25 V, VI = 2.7 V
D input — — –0.4
G input IIL — — –1.6
mA VCC = 5.25 V, VI = 0.4 V
D input — — 0.1
Input
current
G input II — — 0.4
mA VCC = 5.25 V, VI = 7 V
Short-circuit output
current IOS –20 — –100 mA VCC = 5.25 V
Supply current** ICC — 6.3 12 mA VCC = 5.25 V
Input clamp voltage VIK — — –1.5 V VCC = 4.75 V, IIN = –18 mA
Notes: * VCC = 5 V, Ta = 25°C
** ICC is measured with all outputs open and all inputs grounded.
Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol Inputs Outputs min. typ. max. Unit Condition
tPLH — 15 27
tPHL D Q
— 9 17
ns
tPLH — 12 20
tPHL D Q — 7 15
ns
tPLH — 15 27
tPHL G Q
— 14 25 ns
tPLH — 16 30
Propagation delay time
tPHL G Q — 7 15
ns
CL = 15 pF,
RL = 2 kΩ
HD74LS75
Rev.3.00, May 10, 2006, page 4 of 5
Testing Method
Test Circuit
DQ
Q
VCC
RL
CL
Q
Q
RL
CL
D
P.G.
Zout = 50Ω
G
G
P.G.
Zout = 50Ω
Notes: 1. Test is put into the each flip-flop.
2. CL includes probe and jig capacitance.
3. All diodes are 1S2074(H).
Waveform
V
OH
V
OL
V
OH
V
OL
0V
3V
0V
3V
D
G
Q
Q
t
TLH
t
THL
10%
90%
1.3 V 1.3 V 1.3 V
1.3 V
1.3 V
10%
90%
t
THL
t
PHL
t
PHL
t
PLH
t
PLH
t
PHL
t
PHL
1.3 V
10%
90%
t
TLH
t
su
t
h
t
su
1µs 1µs
t
h
t
PLH
t
PLH
10%
500ns 500ns
90%
1.3 V 1.3 V
1.3 V
1.3 V
1.3 V
Notes: 1. Input pulse; D input: PRR = 500 kHz, G input; PRR = 1 MHz, tTHL ≤ 10 ns,tTLH ≤ 10 ns.
2. When measuring propugation delay times from the D input, the corresponding G input must be
held high.
HD74LS75
Rev.3.00, May 10, 2006, page 5 of 5
Package Dimensions
7.62
MaxNomMin
Dimension in Millimeters
Symbol
Reference
19.2
6.3
5.06
A1
Z
b3
D
E
A
bp
c
θ
e
L
e1
0.51
0.56
1.30
0.19 0.25 0.31
2.29 2.54 2.79
0° 15°
20.32
7.4
0.40 0.48
1.12
2.54
1
p
1
3
1 8
16 9
e
b
A
LA
Z
e c
E
D
b
0.89
θ
( Ni/Pd/Au plating )
P-DIP16-6.3x19.2-2.54 1.05g
MASS[Typ.]
DP-16FVPRDP0016AE-B
RENESAS CodeJEITA Package Code Previous Code
0.80
0.15
1.27
7.50 8.00
0.400.34
A1
10.5
MaxNomMin
Dimension in Millimeters
Symbol
Reference
2.20
0.900.700.50
5.50
0.200.100.00
0.46
0.250.200.15
7.80
8°0°
0.12
1.15
10.06
L1
Z
HE
y
x
θ
c
bp
A2
E
D
b1
c1
e
L
A
*1
*2
E
81
16 9
xM
p
*3
y
F
Index mark
b
D
E
H
Z
A
Terminal cross section
( Ni/Pd/Au plating )
p
c
b
1
1
Detail F
L
L
A
θ
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
e
P-SOP16-5.5x10.06-1.27 0.24g
MASS[Typ.]
FP-16DAVPRSP0016DH-B
RENESAS CodeJEITA Package Code Previous Code
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