© Semiconductor Components Industries, LLC, 2016
August, 2016 − Rev. 0 1Publication Order Number:
NVMFS6B85NL/D
NVMFS6B85NL
Power MOSFET
100 V, 46 mW, 19 A, Single N−Channel
Features
•Small Footprint (5x6 mm) for Compact Design
•Low RDS(on) to Minimize Conduction Losses
•Low QG and Capacitance to Minimize Driver Losses
•NVMFS6B85NLWF − Wettable Flank Option for Enhanced Optical
Inspection
•AEC−Q101 Qualified and PPAP Capable
•These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 100 V
Gate−to−Source Voltage VGS ±16 V
Continuous Drain
Current RqJC
(Notes 1, 2, 3) Steady
State
TC = 25°CID19 A
TC = 100°C 14
Power Dissipation
RqJC (Notes 1, 2) TC = 25°CPD42 W
TC = 100°C 21
Continuous Drain
Current RqJA
(Notes 1, 2, 3) Steady
State
TA = 25°CID5.6 A
TA = 100°C 4.0
Power Dissipation
RqJA (Notes 1 & 2) TA = 25°CPD3.5 W
TA = 100°C 1.75
Pulsed Drain Current TA = 25°C, tp = 10 msIDM 93 A
Operating Junction and Storage Temperature TJ, Tstg −55 to
+ 175 °C
Source Current (Body Diode) IS32 A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 1.7 A) EAS 116 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case − Steady State RqJC 3.6 °C/W
Junction−to−Ambient − Steady State (Note 2) RqJA 43
1. The e ntire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
MARKING
DIAGRAM
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6B85xx
AYWZZ
V(BR)DSS RDS(ON) MAX ID MAX
100 V 46 mW @ 10 V 19 A
G (4)
S (1,2,3)
N−CHANNEL MOSFET
D (5,6)
S
S
S
G
D
D
D
D
DFN5
(SO−8FL)
CASE 488AA
STYLE 1
1
See detailed ordering, marking and shipping information on
page 5 of this data sheet.
ORDERING INFORMATION
72 mW @ 4.5 V
6B85NL = NVMFS6B85NL
6B85LW= NVMFS6B85NLWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
NVMFS6B85NL
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA100 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/
TJ64 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 80 V TJ = 25°C 10 mA
TJ = 125°C 250
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = 16 V 100 nA
ON CHARACTERISTICS (Note 4)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.2 2.4 V
Threshold Temperature Coefficient VGS(TH)/TJ−5.2 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 10 A 37 46 mW
VGS = 4.5 V 55 72
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance CISS
VGS = 0 V, f = 1 MHz, VDS = 25 V
480
pF
Output Capacitance COSS 170
Reverse Transfer Capacitance CRSS 15
Total Gate Charge QG(TOT) VGS = 4.5 V, VDS = 50 V; ID = 10 A 3.8
nC
VGS = 10 V, VDS = 50 V; ID = 10 A
7.9
Threshold Gate Charge QG(TH) 1.1
Gate−to−Source Charge QGS 2.4
Gate−to−Drain Charge QGD 1.1
Plateau Voltage VGP 4.0 V
SWITCHING CHARACTERISTICS (Note 5)
T urn−On Delay Time td(ON)
VGS = 4.5 V, VDS = 50 V,
ID = 10 A, RG = 2.5 W
6.9
ns
Rise Time tr66.9
T urn−Off Delay Time td(OFF) 12.5
Fall Time tf55.9
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 10 A TJ = 25°C 0.88 1.2 V
TJ = 125°C 0.76
Reverse Recovery Time tRR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 10 A
39.4
ns
Charge Time ta22.7
Discharge Time tb16.7
Reverse Recovery Charge QRR 40 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
5. Switching characteristics are independent of operating junction temperatures.
NVMFS6B85NL
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3
TYPICAL CHARACTERISTICS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
3.01.00
0
10
54210
Figure 3. On−Resistance vs. Gate−to−Source
Voltage Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
61075 10 15
35
70
30
Figure 5. On−Resistance Variation with
Temperature Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
15012510075250−25−50
1.0
1.2
55453525155
10K
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
IDSS, LEAKAGE (nA)
4.5 V VDS = 10 V
TJ = 25°C
TJ = 125°CTJ = −55°C
ID = 10 A
TJ = 25°C
VGS = 4.5 V
TJ = 25°C
VGS = 10 V
50
ID = 10 A
VGS = 10 V
TJ = 85°C
TJ = 125°C
3
0.6
1.4
32 5
3.6 V
2.0 0
16
10
36
1.8
2.0
2.5
3.0 V
VGS = 10 V
to 5 V
15
20 20
0.8
100
10
1
0.5 1.5
489
50
1.6
TJ = 150°C
1K
3.4 V
2.8 V
3.2 V
40
2.2
12
6
18
958565175
5
34
20
2.4
75
50
45
38
44
48
42
40
46 60
65
14
8
4
2
55
NVMFS6B85NL
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4
TYPICAL CHARACTERISTICS
Figure 7. Capacitance Variation Figure 8. Gate−to−Source Voltage vs. Total
Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
100
1
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
1
10
100
1000
1.31.10.50.3
1
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
VGS = 0 V
TJ = 25°C
f = 1 MHz
Ciss
Coss
Crss
VDS = 50 V
ID = 10 A
VGS = 4.5 V
td(on)
tr
tf
TJ = 125°C
1000
100
0
2
10
06
28
TJ = 25°C
VDS = 50 V
ID = 10 A
100
3
6
8
4Qgs Qgd
td(off)
0.9
100 4
10
7
1
9
5
7
3
20 30 40 50 60 70 80 90
TJ = 25°C
TJ = −55°C
0.7
5
1
10
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
10001010.1
0.1
1
10
100
1000
ID, DRAIN CURRENT (A)
VGS ≤ 10 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
500 ms
1 ms
10 ms
Figure 12. IPEAK vs. TAV
TAV, TIME IN AVALANCHE (sec)
0.0010.0001
0.1
10
100
IPEAK, DRAIN CURRENT (A)
0.01
TJ(initial) = 25°C
TJ(initial) = 100°C
100
10 ms1
NVMFS6B85NL
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5
TYPICAL CHARACTERISTICS
Figure 13. Thermal Response
PULSE TIME (sec)
0.010.001 1010.00010.00001 0.10.000001
0.01
0.1
1
10
100
R(t) (°C/W)
100 1000
50% Duty Cycle
20%
10%
5%
2%
1%
Single Pulse
NVMFS6B85NL5x6 SOFL PCB Cu
Area 650 mm2 PCB Cu thk 2 oz
DEVICE ORDERING INFORMATION
Device Marking Package Shipping†
NVMFS6B85NLT1G 6B85NL DFN5
(Pb−Free) 1500 / Tape & Reel
NVMFS6B85NLWFT1G 6B85LW DFN5
(Pb−Free, Wettable Flanks) 1500 / Tape & Reel
NVMFS6B85NLT3G 6B85NL DFN5
(Pb−Free) 5000 / Tape & Reel
NVMFS6B85NLWFT3G 6B85LW DFN5
(Pb−Free, Wettable Flanks) 5000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
M3.00 3.40
q0 −−−
_
3.80
12
_
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE N DATE 25 JUN 201
8
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
XXXXXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceability
1234
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 q
D
E
2
2
B
A
0.20 C
0.20 C
2 X
2 X
DIM MIN NOM
MILLIMETERS
A0.90 1.00
A1 0.00 −−−
b0.33 0.41
c0.23 0.28
D5.15
D1 4.70 4.90
D2 3.80 4.00
E6.15
E1 5.70 5.90
E2 3.45 3.65
e1.27 BSC
G0.51 0.575
K1.20 1.35
L0.51 0.575
L1 0.125 REF
A
0.10 C
0.10 C
DETAIL A
14
L1
e/2
8X
D2
G
E2
K
b
A0.10 B
C
0.05 cL
DETAIL A
A1
c
4 X
C
SEATING
PLANE
GENERIC
MARKING DIAGRAM*
1
XXXXXX
AYWZZ
1
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.270
2X
0.750
1.000
0.905
4.530
1.530
4.5600.495
3.200
1.330
0.965
2X
2X
4X
4X
PIN 5
(EXPOSED PAD)
STYLE 2:
PIN 1. ANODE
2. ANODE
3. ANODE
4. NO CONNECT
5. CATHODE
5.00 5.30
6.00 6.30
PITCH
DIMENSIONS: MILLIMETERS
1
RECOMMENDED
e
2X
0.475
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some product
s
may not follow the Generic Marking.
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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98AON14036D
DOCUMENT NUMBER:
DESCRIPTION:
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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DFN5 5x6, 1.27P (SO−8FL)
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