Vishay Siliconix
DG611, DG612, DG613
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
1
High-Speed, Low-Glitch D/CMOS Analog Switches
FEATURES
• Fast switching - tON: 12 ns
• Low charge injection: ± 2 pC
• Wide bandwidth: 500 MHz
• 5 V CMOS logic compatible
• Low RDS(on): 18
• Low quiescent power : 1.2 nW
• Single supply operation
BENEFITS
• Improved data throughput
• Minimal switching transients
• Improved system performance
• Easily interfaced
• Low insertion loss
• Minimal power consumption
APPLICATIONS
• Fast sample-and-holds
• Synchronous demodulators
• Pixel-rate video switching
• Disk/tape drives
• DAC deglitching
• Switched capacitor filters
• GaAs FET drivers
• Satellite receivers
DESCRIPTION
The DG611, DG612, DG613 feature high-speed low-
capacitance lateral DMOS switches. Charge injection has
been minimized to optimize performance in fast sample-and-
hold applications.
Each switch conducts equally well in both directions when on
and blocks up to 16 Vp-p when off. Capacitances have been
minimized to ensure fast switching and low-glitch energy. To
achieve such fast and clean switching performance, the
DG611, DG612, DG613 are built on the Vishay Siliconix
proprietary D/CMOS process. This process combines
n-channel DMOS switching FETs with low-power CMOS
control logic and drivers. An epitaxial layer prevents latchup.
The DG611 and DG612 differ only in that they respond to
opposite logic levels. The versatile DG613 has two normally
open and two normally closed switches. It can be given
various configurations, including four SPST, two SPDT, one
DPDT.
For additional information see Applications Note AN207.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Four SPST Switches per Package
Logic “0” 1 V
Logic “1” 4 V
* Pb containing terminations are not RoHS compliant, exemptions may apply
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
IN1IN2
D1D2
S1S2
V- V+
GND VL
S4S3
D4D3
IN4IN3
Dual-In-Line
and SOIC
DG611
Top View
S1S2
V- V+
NC NC
GND VL
S4S3
LCC
NC IN3D3
D4IN4
NC IN2D2
D1IN1
Key
910111213
4
5
6
7
8
1231920
14
15
16
17
18
DG611
TRUTH TABLE
Logic DG611 DG612
0 ON OFF
1OFFON
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Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
Vishay Siliconix
DG611, DG612, DG613
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Four SPST Switches per Package
IN1IN2
D1D2
S1S2
V- V+
GND VL
S4S3
D4D3
IN4IN3
Dual-In-Line
and SOIC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Top View
DG613
NC
S3
NC
D4
NC
IN1
VL
IN4
S2
Key
S4
IN3
D1
Top View
D3
V-
NC LCC
IN2
V+
9
GND
10 11 12 13
4
D2
5
6
7
8
12
3 1920
14
15
16
17
18
S1
DG613
TRUTH TABLE
Logic SW1, SW4SW2, SW3
0 OFF ON
1ONOFF
ORDERING INFORMATION
Temp. Range Package Part Number
DG611, DG612
- 40 °C to 85 °C
16-Pin Plastic DIP
DG611DJ
DG611DJ-E3
DG612DJ
DG612DJ-E3
16-Pin Narrow SOIC
DG611DY
DG611DY-E3
DG611DY-T1
DG611DY-T1-E3
DG612DY
DG612DY-E3
DG612DY-T1
DG612DY-T1-E3
DG613
- 40 °C to 85 °C
16-Pin Plastic DIP DG613DJ
DG613DJ-E3
16-Pin Narrow SOIC
DG613DY
DG613DY-E3
DG613DY-T1
DG613DY-T1-E3
Logic “0” 1 V
Logic “1” 4 V
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
3
Vishay Siliconix
DG611, DG612, DG613
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 7.6 mW/°C above 75 °C.
e. Derate 12 mW/°C above 75 °C.
ABSOLUTE MAXIMUM RATINGS
Parameter Limit Unit
V+ to V- - 0.3 to 21
V
V+ to GND - 0.3 to 21
V- to GND - 19 to 0.3
VL to GND - 1 to (V+) + 1
or 20 mA, whichever occurs first
VINa(V-) - 1 to (V+) + 1
or 20 mA, whichever occurs first
VS, VDa(V-) - 0.3 to (V+) + 16
or 20 mA, whichever occurs first
Continuous Current (Any Terminal) ± 30 mA
Current, S or D (Pulsed at 1 µs, 10 % Duty Cycle) ± 100
Storage Temperature CerDIP - 65 to 150 °C
Plastic - 65 to 125
Power Dissipation (Package)b
16-Pin Plastic DIPc470
mW
16-Pin Narrow SOICd600
16-Pin CerDIPe900
20-Pin LCCe900
RECOMMENDED OPERATING RANGE
Parameter Limit Unit
V+ 5 to 21
V
V- - 10 to 0
VL4 to V+
VIN 0 to VL
VANALOG V- to (V+) - 5
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Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
Vishay Siliconix
DG611, DG612, DG613
SPECIFICATIONSa
Parameter Symbol
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 3 V
VL = 5 V, VIN = 4 V, 1 VfTemp.b Typ.c
A Suffix
- 55 °C to 125 °C
D Suffix
- 40 °C to 85 °C
Unit Min.d Max.dMin.d Max.d
Analog Switch
Analog Signal RangeeVANALOG V- = - 5 V, V+ = 12 V Full - 5 7 - 5 7 V
Switch On-Resistance RDS(on) IS = - 1 mA, VD = 0 V
Room
Full
18 45
60
45
60
Resistance Match Bet Ch. RDS(on) Room 2
Source Off Leakage IS(off) VS = 0 V, VD = 10 V Room
Hot
± 0.001 - 0.25
- 20
0.25
20
- 0.25
- 20
0.25
20
nADrain Off Leakage Current ID(off) VS = 10 V, VD = 0 V Room
Hot
± 0.001 - 0.25
- 20
0.25
20
- 0.25
- 20
0.25
20
Switch On Leakage Current ID(on) VS = VD = 0 V Room
Hot
± 0.001 - 0.4
- 40
0.4
40
- 0.4
- 40
0.4
40
Digital Control
Input Voltage High VIH Full 4 4 V
Input Voltage Low VIL Full 1 1
Input Current IIN
Room
Hot
0.005 - 1
- 20
1
20
- 1
- 20
1
20 µA
Input Capacitance CIN Room 5 pF
Dynamic Characteristics
Off State Input Capacitance CS(off) VS = 0 V Room 3
pFOff State Output Capacitance CD(off) VD = 0 V Room 2
On State Input Capacitance CS(on) VS = VD = 0 V Room 10
Bandwidth BW RL = 50  Room 500 MHz
Tur n - O n T i m e etON RL = 300 CL = 3 pF
VS = ± 2 V,
See test circuit, figure 2
Room 12 25 25
ns
Tur n - O f f T i m e etOFF Room 8 20 20
Tur n - O n T i m e tON RL = 300 CL = 75 pF
VS = ± 2 V,
See test circuit, figure 2
Room
Full
19 35
50
35
50
Tur n - O f f T i m e tOFF
Room
Full
16 25
35
25
35
Charge InjectioneQC
L = 1 nF, VS = 0 V Room 4 pC
Ch. Injection Changee,g QC
L = 1 nF, |VS| 3 V Room 3 4 4
Off IsolationeOIRR RIN = 50 RL = 50
f = 5 MHz Room 74
dB
CrosstalkeXTA L K
RIN = 10 , RL = 50
f = 5 MHz Room 87
Power Supplies
Positive Supply Current I+
VIN = 0 V or 5 V
Room
Full
0.005 1
5
1
5
µA
Negative Supply Current I- Room
Full
- 0.005 - 1
- 5
- 1
- 5
Logic Supply Current IL
Room
Full
0.005 1
5
1
5
Ground Current IGND
Room
Full
- 0.005 - 1
- 5
- 1
- 5
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
5
Vishay Siliconix
DG611, DG612, DG613
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. Q = |Q at VS = 3 V - Q at VS = - 3 V|.
Stresses beyond those listed under “A bsolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, an d functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
SPECIFICATIONS FOR UNIPOLAR SUPPLIESa
Parameter Symbol
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 3 V
VL = 5 V, VIN = 4 V, 1 VfTemp.b Ty.pc
A Suffix
- 55 °C to 125 °C
D Suffix
- 40 °C to 85 °C
Unit Min.d Max.dMin.d Max.d
Analog Switch
Analog Signal RangeeVANALOG Full 0 7 0 7 V
Switch On-Resistance RDS(on) IS = - 1 mA, VD = 1 V Room 25 60 60
Dynamic Characteristics
Tur n- O n T im e etON RL = 300 CL = 3 pF
VS = 2 V,
See test circuit, figure 2
Room 15 30 30
ns
Turn-Off TimeetOFF Room 10 25 25
RDS(on) vs. VD and Power Supply Voltages
RDS(on) - Drain-Source On-Resistance ()
- 4 - 2 0 2 4 6 8 10 12 - 5
400
350
300
250
200
150
100
50
0
VD - Drain Voltage (V)
V+ = 5 V
V- = - 5 V
V+ = 12 V
V- = - 5 V
V+ = 15 V
V- = - 3 V
I
S
= - 1 mA
Leakage Current vs. Analog Voltage
- 4 - 2 0 2 4 6 8 1 0
3
2
1
0
- 1
- 2
- 3
- Leakage Current (pA)
, I D
VD or VS - Drain or Source Voltage (V)
I
S(of f),
I
D(of f)
I
D(on)
V+ = 15 V
V- = - 3 V
IS
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Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
Vishay Siliconix
DG611, DG612, DG613
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Input Switching Threshold vs. VL
RDS(on) vs. VD and Temperature
Leakage Currents vs. Temperature
0 5 10 15
6
5
4
3
2
1
0
V
L
- Logic Supply Voltage (V)
V+ = 15 V
V- = - 3 V
VTH - Logic Input Voltage (V)
RDS(on) - Drain-Source On-Resistance ()
- 4 - 2 02468 1 0 12
400
350
300
250
200
150
100
50
0
V
D
- Drain Voltage (V)
25 °C
V+ = 15 V
V- = - 3 V
I
S
= - 1 mA
125 °C
- 55 °C
- 55 0 125
Temperature (°C)
- 25 25 50 75 100
10 nA
0.1 pA
100 pA
10 pA
1 pA
I
S(of f),
I
D(of f)
I
D(on)
1 nA
- Leakage (A)I, I
S(off) D(off)
Switching Times vs. Temperature
Charge Injection vs. Analog Voltage
- 3 dB Bandwidth/Insertion Loss vs. Frequency
16
14
12
10
8
6
4
2
0
24
22
20
18
- 55 - 35 - 15 5 25 45 65 85 105 125
V+ = 15 V
V- = - 3 V
RL = 300
CL = 10 pF
tON
tOFF
Time (ns)
Temperature (°C)
Charge (pC)
V
ANALO G
- Analog Voltage (V)
20
10
0
- 10
- 20
- 3 - 2 - 1 0123 456 789 1 0
Qd
Qs
V+ = 15 V
V- = - 3 V
Insertion Loss (dB)
1 1 0 100 1000
- 24
- 20
- 16
- 12
- 8
- 4
0
f - Frequency (MHz)
R
L
= 50
- 3 dB Point
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
7
Vishay Siliconix
DG611, DG612, DG613
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
SCHEMATIC DIAGRAM (Typical Channel)
TEST CIRCUITS
Crosstalk and Off Isolation vs. Frequency
1 1 0 100
- 20
- 40
- 60
- 80
- 100
- 120
f - Frequency (MHz)
V+ = 15 V
V- = - 3 V
(dB)
Crosstalk
Of f Isolation
Supply Currents vs. Switching Frequency
Supply Current (mA)
6
5
4
3
2
1
0
- 1
- 2
- 3
- 4
- 5
1K 100K 100K 1M 10M
V+ = 15 V
V- = - 3 V
V
L
= 5 V
C
X
= 0, 5 V
f - Frequency (Hz)
I+
I
L
I-
Figure 1.
V
L
V+
V-
S
D
DMOS Switch
Level
Translator
Input
Logic
IN
X
Driver
Figure 2. Switching Time
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Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
Vishay Siliconix
DG611, DG612, DG613
TEST CIRCUITS
APPLICATIONS
High-Speed Sample-and-Hold
In a fast sample-and-hold application, the analog switch
characteristics are critical. A fast switch reduces aperture
uncertainty. A low charge injection eliminates offset (step)
errors. A low leakage reduces droop errors. The CLC111, a
fast input buffer, helps to shorten acquisition and settling
times. A low leakage, low dielectric absorption hold capacitor
must be used. Polycarbonate, polystyrene and
polypropylene are good choices. The JFET output buffer
reduces droop due to its low input bias current.
(see figure 5.)
Pixel-Rate Switch
Windows, picture-in-picture, title overlays are economically
generated using a high-speed analog switch such as the
DG613. For this application the two video sources must be
sync locked. The glitch-less analog switch eliminates halos.
(see figure 6.)
GaAs FET Drivers
Figure 7 illustrates a high-speed GaAs FET driver. To turn
the GaAs FET on 0 V are applied to its gate via S1, whereas
to turn it off, - 8 V are applied via S2. This high-speed,
low-power driver is especially suited for applications that
require a large number of RF switches, such as phased array
radars.
Figure 3. Charge Injection
CL
1 nF
D
RgVO
V+
S
V-
5 V
IN
VL
Vg
- 3 V
GND
+ 15 V+ 5 V
Figure 4. Crosstalk
S1
D2
S2
VS
1 V, 4 V
VO
IN2
Rg = 50
1 V, 4 V
XTA L K Isolation = 20 log VS
VL
VO
V+
IN150
C = RF bypass
RL
D1
- 3 V
GND V-
NC
C
+ 15 V
C+ 5 V C
Figure 5. High-Speed Sample-and-Hold
CLC111
75
+
-
LF356
1/4 DG611
5 V Control
Analog
Input
Input Buffer
S
IN
D
Output Buffer
± 5 V Output
to A/D
+ 5 V + 12 V
- 5 V
CHOLD
650 pF Polystyrene
Document Number: 70057
S11-0154-Rev. I, 31-Jan-11
www.vishay.com
9
Vishay Siliconix
DG611, DG612, DG613
APPLICATIONS
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70057.
Figure 6. A Pixel-Rate Switch Creates Title Overlays
+
-
CLC410
75
1
/
2
DG613
Background
D
Output Buffer Composite
Output
+ 5 V + 12 V
- 5 V
75
Titles
5 V Control
75
250
1/2 CLC114
250
Figure 7. A High-Speed GaAs FET Driver that Saves Power
1/2 DG613
D1
+ 5 V
- 8 V
D2
S1
S2
IN1
IN2
GND V-
GaAs
RF
IN
RF
OUT
VLV+
5 V
All Leads
0.101 mm
0.004 IN
E
HC
D
e B A1 LĬ
4312 8756
131416 15 91012 11
Package Information
Vishay Siliconix
Document Number: 71194
02-Jul-01 www.vishay.com
1
SOIC (NARROW): 16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS INCHES
Dim Min Max Min Max
A1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B0.38 0.51 0.015 0.020
C0.18 0.23 0.007 0.009
D9.80 10.00 0.385 0.393
E3.80 4.00 0.149 0.157
e1.27 BS C 0.050 BSC
H5.80 6.20 0.228 0.244
L0.50 0.93 0.020 0.037
Ĭ0_8_0_8_
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
E1E
Q1
A
L
A1
e1B
B1
S
CeA
D
15°
MAX
12345678
16 15 14 13 12 11 10 9
Package Information
Vishay Siliconix
Document Number: 71261
06-Jul-01 www.vishay.com
1
PDIP: 16ĆLEAD
MILLIMETERS INCHES
Dim Min Max Min Max
A3.81 5.08 0.150 0.200
A10.38 1.27 0.015 0.050
B0.38 0.51 0.015 0.020
B10.89 1.65 0.035 0.065
C0.20 0.30 0.008 0.012
D18.93 21.33 0.745 0.840
E7.62 8.26 0.300 0.325
E15.59 7.11 0.220 0.280
e12.29 2.79 0.090 0.110
eA7.37 7.87 0.290 0.310
L2.79 3.81 0.110 0.150
Q11.27 2.03 0.050 0.080
S0.38 1.52 .015 0.060
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
E1E
Q1
A
L
A1
e1B
B1
L1
S
C
eA∝
D
12 3 4 5 6 78
16 15 14 13 12 11 10 9
Package Information
Vishay Siliconix
Document Number: 71282
03-Jul-01 www.vishay.com
1
CERDIP: 16ĆLEAD
MILLIMETERS INCHES
Dim Min Max Min Max
A4.06 5.08 0.160 0.200
A10.51 1.14 0.020 0.045
B0.38 0.51 0.015 0.020
B11.14 1.65 0.045 0.065
C0.20 0.30 0.008 0.012
D19.05 19.56 0.750 0.770
E7.62 8.26 0.300 0.325
E16.60 7.62 0.260 0.300
e12.54 BS C 0.100 BSC
eA7.62 BSC 0.300 BSC
L3.18 3.81 0.125 0.150
L13.81 5.08 0.150 0.200
Q11.27 2.16 0.050 0.085
S0.38 1.14 0.015 0.045
∝0°15°0°15°
ECN: S-03946—Rev. G, 09-Jul-01
DWG: 5403
D
L1
E
BL
e
A1
A
28
1
2
Packaging Information
Vishay Siliconix
Document Number: 71290
02-Jul-01 www.vishay.com
1
20ĆLEAD LCC
MILLIMETERS INCHES
Dim Min Max Min Max
A1.37 2.24 0.054 0.088
A11.63 2.54 0.064 0.100
B0.56 0.71 0.022 0.028
D8.69 9.09 0.342 0.358
E8.69 9.09 0.442 0.358
e1.27 BS C 0.050 BSC
L1.14 1.40 0.045 0.055
L11.96 2.36 0.077 0.093
ECN: S-03946—Rev. B, 09-Jul-01
DWG: 5321
Application Note 826
Vishay Siliconix
www.vishay.com Document Number: 72608
24 Revision: 21-Jan-08
APPLICATION NOTE
RECOMMENDED MINIMUM PADS FOR SO-16
RECOMMENDED MINIMUM PADS FOR SO-16
0.246
(6.248)
Recommended Minimum Pads
Dimensions in Inches/(mm)
0.152
(3.861)
0.047
(1.194)
0.028
(0.711)
0.050
(1.270)
0.022
(0.559)
0.372
(9.449)
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Revision: 02-Oct-12 1Document Number: 91000
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RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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