©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
File Number
4040.4
HGTP12N60C3, HGT1S12N60C3S
24A, 600V, UFS Series N-Channel IGBTs
The HGTP12N60C3 and HGT1S12N60C3S are MOS gated
high voltage switching devices combining the best features
of MOSFETs and bipolar transistors. These devices have the
high input impedance of a MOSFET and the low on-state
conduction loss of a bipolar transistor. The much lower
on-state voltage drop varies only moderately between 25
o
C
and 150
o
C.
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential, such as: AC and DC motor
controls, power supplies and drivers for solenoids, relays
and contactors.
Formerly Developmental Type TA49123.
Symbol
Features
• 24A, 600V at T
C
= 25
o
C
• 600V Switching SOA Capability
• Typical Fall Time . . . . . . . . . . . . . . . . 230ns at T
J
= 150
o
C
• Short Circuit Rating
• Low Conduction Loss
Packaging
JEDEC TO-220AB
JEDEC TO-263AB
Ordering Information
PART NUMBER PACKAGE BRAND
HGTP12N60C3 TO-220AB P12N60C3
HGT1S12N60C3S TO-263AB S12N60C3
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-263AB variant in Tape and Reel, i.e.,
HGT1S12N60C3S9A.
C
E
G
GATE
COLLECTOR
EMITTER
COLLECTOR
(FLANGE)
COLLECTOR
(FLANGE)
GATE
EMITTER
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713
4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637
4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986
4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767
4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027
Data Sheet January 2000
©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
HGTP12N60C3, HGT1S12N60C3S UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BV
CES
600 V
Collector Current Continuous
At T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C25
24 A
At T
C
= 110
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C110
12 A
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
CM
96 A
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GES
±
20 V
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
GEM
±
30 V
Switching Safe Operating Area at T
J
= 150
o
C (Figure 14) . . . . . . . . . . . . . . . . . . . . . . SSOA 24A at 600V
Power Dissipation Total at T
C
= 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
104 W
Power Dissipation Derating T
C
> 25
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.83 W/
o
C
Reverse Voltage Avalanche Energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
ARV
100 mJ
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . T
J
, T
STG
-40 to 150
o
C
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
260
o
C
Short Circuit Withstand Time (Note 2) at V
GE
= 15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t
SC
4
µ
s
Short Circuit Withstand Time (Note 2) at V
GE
= 10V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t
SC
13
µ
s
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. V
CE(PK)
= 360V, T
J
= 125
o
C, R
G
= 25
Ω.
Electrical Specifications
T
C
= 25
o
C, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Collector to Emitter Breakdown Voltage BV
CES
I
C
= 250
µ
A, V
GE
= 0V 600 - - V
Emitter-Collector Breakdown Voltage BV
ECS
I
C
= 10mA, V
GE
= 0V 24 30 - V
Collector to Emitter Leakage Current I
CES
V
CE
= BV
CES
T
C
= 25
o
C - - 250
µ
A
V
CE
= BV
CES
T
C
= 150
o
C--1.0mA
Collector to Emitter Saturation Voltage V
CE(SAT)
I
C
= I
C110
,
V
GE
= 15V
T
C
= 25
o
C - 1.65 2.0 V
T
C
= 150
o
C - 1.85 2.2 V
Gate to Emitter Threshold Voltage V
GE(TH)
I
C
= 250
µ
A,
V
CE
= V
GE
T
C
= 25
o
C 3.0 5.0 6.0 V
Gate to Emitter Leakage Current I
GES
V
GE
=
±
20V - -
±
100 nA
Switching SOA SSOA T
J
= 150
o
C
R
G
= 25
Ω
V
GE
= 15V
L = 100
µ
H
V
CE(PK)
= 480V 80 - - A
V
CE(PK)
= 600V 24 - - A
Gate to Emitter Plateau Voltage V
GEP
I
C
= I
C110
, V
CE
= 0.5 BV
CES
- 7.6 - V
On-State Gate Charge Q
G(ON)
I
C
= I
C110
,
V
CE
= 0.5 BV
CES
V
GE
= 15V - 48 55 nC
V
GE
= 20V - 62 71 nC
Current Turn-On Delay Time t
d(ON)I
T
J
= 150
o
C,
I
CE
= I
C110,
V
CE(PK)
= 0.8 BV
CES,
V
GE
= 15V,
R
G
= 25
Ω,
L = 100
µ
H
-14-ns
Current Rise Time t
rI
-16-ns
Current Turn-Off Delay Time t
d(OFF)I
- 270 400 ns
Current Fall Time t
fI
- 210 275 ns
Turn-On Energy E
ON
- 380 -
µ
J
Turn-Off Energy (Note 3) E
OFF
- 900 -
µ
J
Thermal Resistance R
θ
JC
- - 1.2
o
C/W
NOTE:
3. Turn-Off Energy Loss (E
OFF
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (I
CE
= 0A). The HGTP12N60C3 and HGT1S12N60C3S were tested per JEDEC standard
No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
Turn-On losses include diode losses.
HGTP12N60C3, HGT1S12N60C3S
©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
Typical Performance Curves
FIGURE 1. TRANSFER CHARACTERISTICS FIGURE 2. SATURATION CHARACTERISTICS
FIGURE 3. COLLECTOR TO EMITTER ON-STATE VOLTAGE FIGURE 4. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 5. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
FIGURE 6. SHORT CIRCUIT WITHSTAND TIME
ICE, COLLECTOR TO EMITTER CURRENT (A)
VGE , GATE TO EMITTER VOLTAGE (V)
46 81012
0
10
20
40
50
60
70
14
30
80
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VCE = 10V
TC = 25oC
TC = 150oC
TC = -40oC
I
CE
, COLLECTOR TO EMITTER CURRENT (A)
V
CE
, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs, DUTY CYCLE <0.5%, T
C
= 25
o
C
0
0246810
10
20
30
12.0V
8.5V
9.0V
8.0V
7.5V
7.0V
VGE = 15.0V
40
50
60
70
80
10.0V
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
012345
40
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
PULSE DURATION = 250µs
DUTY CYCLE <0.5%, VGE = 10V
TC = 150oC
TC = 25oC
TC = -40oC
10
20
50
70
80
60
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
30
012345
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
TC = 25oC
TC = -40oC
TC = 150oC
DUTY CYCLE <0.5%, VGE = 15V
PULSE DURATION = 250µs
10
20
40
50
60
70
80
25 50 75 100 125 150
0
5
10
15
20
25
ICE, DC COLLECTOR CURRENT (A)
TC, CASE TEMPERATURE (oC)
VGE = 15V
ISC, PEAK SHORT CIRCUIT CURRENT (A)
20
60
80
120
tSC, SHORT CIRCUIT WITHSTAND TIME (µs)
10 11 12
VGE , GATE TO EMITTER VOLTAGE (V)
14 1513
140
100
40
ISC
tSC
5
10
15
20
VCE = 360V, RG = 25Ω, TJ = 125oC
HGTP12N60C3, HGT1S12N60C3S
©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
FIGURE 7. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 9. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 10. TURN-OFF FALL TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 11. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 12. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
Typical Performance Curves
(Continued)
td(ON)I, TURN-ON DELAY TIME (ns)
10
20
30
5101520
ICE, COLLECTOR TO EMITTER CURRENT (A)
100
25 30
50
VGE = 10V
VGE = 15V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
td(OFF)I, TURN-OFF DELAY TIME (ns)
400
300
200
100
51015202530
TJ = 150oC, RG = 25Ω, L = 100mH, VCE(PK) = 480V
VGE = 10V
VGE = 15V
ICE, COLLECTOR TO EMITTER CURRENT (A)
trI, TURN-ON RISE TIME (ns)
5
10
100
51015202530
VGE = 15V
VGE = 10V
200
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
tfI, FALL TIME (ns)
100
5 1015202530
200
300
TJ = 150oC, RG = 25Ω, L = 100mH, VCE(PK) = 480V
VGE = 10V or 15V
90
80
ICE, COLLECTOR TO EMITTER CURRENT (A)
0
5101520
EON, TURN-ON ENERGY LOSS (mJ)
VGE = 15V
0.5
1.0
1.5
2.0
25 30
VGE = 10V
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
ICE, COLLECTOR TO EMITTER CURRENT (A)
EOFF, TURN-OFF ENERGY LOSS (mJ)
51015202530
0.5
1.0
1.5
2.0
2.5
3.0
0
TJ = 150oC, RG = 25Ω, L = 100µH, VCE(PK) = 480V
VGE = 10V or 15V
HGTP12N60C3, HGT1S12N60C3S
©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
FIGURE 13. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 14. SWITCHING SAFE OPERATING AREA
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
FIGURE 16. GATE CHARGE WAVEFORMS
FIGURE 17. IGBT NORMALIZED TRANSIENT THERMAL IMPEDANCE, JUNCTION TO CASE
Typical Performance Curves
(Continued)
ICE, COLLECTOR TO EMITTER CURRENT (A)
fMAX, OPERATING FREQUENCY (kHz)
5102030
10
100
200
1
fMAX2 = (PD - PC)/(EON + EOFF)
PD = ALLOWABLE DISSIPATION
PC = CONDUCTION DISSIPATION
fMAX1 = 0.05/(tD(OFF)I + tD(ON)I)
(DUTY FACTOR = 50%)
RθJC = 1.2oC/W
TJ = 150oC, TC = 75oC
RG = 25Ω, L = 100µH
VGE = 15V
VGE = 10V
VCE(PK), COLLECTOR TO EMITTER VOLTAGE (V)
ICE, COLLECTOR TO EMITTER CURRENT (A)
0 100 200 300 400 500 600
0
20
40
60
80
TJ = 150oC, VGE = 15V, RG = 25Ω, L = 100µH
100
LIMITED BY
CIRCUIT
COES
CRES
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
0 5 10 15 20 25
0
500
1000
1500
2000
2500
C, CAPACITANCE (pF)
CIES
FREQUENCY = 1MHz
VGE, GATE TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
QG, GATE CHARGE (nC)
IG(REF) = 1.276mA, RL = 50Ω, TC = 25oC
0
240
120
360
480
600 15
12
9
6
3
0
VCE = 600V
VCE = 400V
VCE = 200V
10 20 30 40 50 600
t1, RECTANGULAR PULSE DURATION (s)
10-5 10-3 100101
10-4 10-1
10-2
100
ZθJC, NORMALIZED THERMAL RESPONSE
10-1
10-2
DUTY FACTOR, D = t1 / t2
PEAK TJ = (PD X ZθJC X RθJC) + TC
t1
t2
PD
SINGLE PULSE
0.5
0.2
0.1
0.05
0.02
0.01
HGTP12N60C3, HGT1S12N60C3S
©2001 Fairchild Semiconductor Corporation HGTP12N60C3, HGT1S12N60C3S Rev. A
Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge built
in the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in military,
industrial and consumer applications, with virtually no
damage problems due to electrostatic discharge. IGBTs can
be handled safely if the following basic precautions are taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate
protection is required an external zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device
Figure 13) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 4, 7, 8, 11
and 12. The operating frequency plot (Figure 13) of a typical
device shows fMAX1 or fMAX2 whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
fMAX1 is defined by fMAX1 = 0.05/(tD(OFF)I+ tD(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on- state time for a 50% duty factor. Other definitions
are possible. tD(OFF)I and tD(ON)I are defined in Figure 19.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM. tD(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must not
exceed PD. A 50% duty factor was used (Figure 13) and the
conduction losses (PC) are approximated by
PC = (VCE x ICE)/2.
EON and EOFF are defined in the switching waveforms
shown in Figure 19. EON is the integral of the instantaneous
power loss (ICE x VCE) during turn-on and EOFF is the
integral of the instantaneous power loss (ICE x VCE) during
turn-off. All tail losses are included in the calculation for
EOFF; i.e. the collector current equals zero (ICE = 0).
Test Circuit and Waveform
FIGURE 18. INDUCTIVE SWITCHING TEST CIRCUIT FIGURE 19. SWITCHING TEST WAVEFORMS
RG = 25Ω
L = 100µH
VDD = 480V
+
-
RHRP1560
tfI
td(OFF)I trI
td(ON)I
10%
90%
10%
90%
VCE
ICE
VGE
EOFF EON
HGTP12N60C3, HGT1S12N60C3S
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF F AIRCHILD SEMICONDUCTOR CORPORA TION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT ST A TUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PA TENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
PACMAN™
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